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Searched defs:mmSDMA0_UTCL1_WR_XNACK1 (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/sdma0/
H A Dsdma0_4_1_offset.h152 #define mmSDMA0_UTCL1_WR_XNACK1 macro
H A Dsdma0_4_0_offset.h154 #define mmSDMA0_UTCL1_WR_XNACK1 0x0046 macro