1 /* -*- tab-width: 4 -*-
2 *
3 * Electric(tm) VLSI Design System
4 *
5 * File: tecmocmossub.c
6 * MOSIS CMOS Submicron technology description
7 * Written by: Steven M. Rubin, Static Free Software
8 * The MOSIS 6-metal, 2-poly submicron rules,
9 * interpreted by Richard "Bic" Schediwy
10 *
11 * Copyright (c) 2000 Static Free Software.
12 *
13 * Electric(tm) is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License as published by
15 * the Free Software Foundation; either version 2 of the License, or
16 * (at your option) any later version.
17 *
18 * Electric(tm) is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 * You should have received a copy of the GNU General Public License
24 * along with Electric(tm); see the file COPYING. If not, write to
25 * the Free Software Foundation, Inc., 59 Temple Place, Suite 330,
26 * Boston, Mass 02111-1307, USA.
27 *
28 * Static Free Software
29 * 4119 Alpine Road
30 * Portola Valley, California 94028
31 * info@staticfreesoft.com
32 */
33
34 /*
35 * Assumptions made from the MOSIS submicron design rules
36 * (MOSIS rule is in square brackets []):
37 *
38 * Arc widths (minimum sizes):
39 * metal1: 3 [7.1]
40 * metal2: 3 [9.1]
41 * metal3: 5 (if 3-metal process) [15.1]
42 * metal3: 3 (if 4-metal process) [15.1]
43 * metal4: 6 [22.1]
44 * poly1: 2 [3.1]
45 * poly2: 3 [11.1]
46 * p/n active (active&select&well):
47 * active: 3 [2.1], select extends by 2 [4.2], well extends by 6 [2.3]
48 * active: 3 [2.1]
49 *
50 * Pin/Node sizes (minimum sizes):
51 * metal1: 3 [7.1]
52 * metal2: 3 [9.1]
53 * metal3: 5 (if 3-metal process) [15.1]
54 * metal3: 3 (if 4-metal process) [15.1]
55 * metal4: 6 [22.1]
56 * poly1: 2 [3.1]
57 * poly2: 3 [11.1]
58 * active: 3 [2.1]
59 * select: 2 [4.4]
60 * well: 12 [1.1]
61 *
62 * Special nodes:
63 * p/n active-to-metal1 contact:
64 * cuts 2x2 [6.1], separated 3 [6.3]
65 * metal1 extends around cut by 1 (4x4) [7.3]
66 * active extends around cut by 1.5 (5x5) [6.2]
67 * select extends around active by 1 (7x7) [4.3] {CORRECTION: by 2 (8x8) [4.2]}
68 * well extends around active by 6 (17x17) [2.3]
69 * poly1-to-metal1 contact:
70 * cuts 2x2 [5.1], separated 3 [5.3]
71 * metal1 extends around cut by 1 (4x4) [7.3]
72 * poly1 extends around cut by 1.5 (5x5) [5.2]
73 * poly2-to-metal1 contact:
74 * cuts 2x2 [5.1], separated 3 [5.3]
75 * metal1 extends around cut by 1 (4x4) [7.3]
76 * poly2 size: 3 (3x3) [11.1]
77 * poly1-to-poly2 (capacitor) contact:
78 * cuts 2x2 [5.1], separated 3 [5.3]
79 * poly2 size: 3 (3x3) [11.1]
80 * poly1 extends around poly2 by 2 (7x7) [11.3]
81 * Transistors:
82 * active is 3 wide [2.1] and sticks out by 3 (3x8) [3.4]
83 * poly1 is 2 wide [3.1] and sticks out by 2 (7x2) [3.3]
84 * transistor area is 3x2
85 * select surrounds active by 2 (7x12) [4.2]
86 * well surrounds active by 6 (15x20) [2.3]
87 * Via1:
88 * cuts 2x2 [8.1], separated 3 [8.2]
89 * metal1 extends around cut by 1 (4x4) [8.3]
90 * metal2 extends around cut by 1 (4x4) [9.3]
91 * Via2:
92 * cuts 2x2 [14.1], separated 3 [14.2]
93 * metal2 extends around cut by 1 (4x4) [14.3]
94 * metal3 extends around cut by: 2 (6x6) (if 3-metal process) [15.3]
95 * metal3 extends around cut by: 1 (4x4) (if 4-metal process) [15.3]
96 * Via3:
97 * cuts 2x2 [21.1], separated 4 [21.2]
98 * metal3 extends around cut by: 1 (4x4) [21.3]
99 * metal4 extends around cut by: 2 (6x6) [22.3]
100 * Substrate/well contact:
101 * select extends around active by 2 [4.2]
102 * well extends around active by 6 [2.3]
103 *
104 * DRC:
105 * metal1-to-metal1: 3 [7.2]
106 * metal2-to-metal2: 4 [9.2]
107 * metal3-to-metal3: 3 [15.2]
108 * metal4-to-metal4: 6 [22.2]
109 * poly1-to-poly1: 3 [3.2]
110 * poly1-to-active: 1 [3.5]
111 * poly2-to-poly2: 3 [11.2]
112 * poly2-to-active: 1 [3.5]
113 * poly2-to-polyCut: 3 [11.5]
114 * active-to-active: 3 [2.2]
115 * select-to-trans: 3 [4.1]
116 * polyCut/actCut-to-polyCut/actCut: 3 [5.3]
117 * polyCut/actCut-to-via1: 2 [8.4]
118 * polyCut-to-active: 2 [5.4]
119 * actCut-to-poly: 2 [6.4]
120 * via1-to-via1: 3 [8.2]
121 * via1-to-via2: 2 [14.4]
122 * via2-to-via2: 2 [14.2]
123 * via3-to-via3: 4 [21.2]
124 */
125
126 /*
127 * #metals: Metal-1 Metal-2 Metal-3 Metal-4 Metal-5 Metal-6
128 *
129 * 2-metals: 3 wide 3 wide
130 * 3 apart 4 apart
131 * 1 over via1 1 over via1
132 *
133 * 3-metals: 3 wide 3 wide 5 wide
134 * 3 apart 3 apart 3 apart
135 * 1 over via1 1 over via1/2 2 over via2
136 *
137 * 4-metals: 3 wide 3 wide 3 wide 3 wide
138 * 3 apart 3 apart 3 apart 3 apart
139 * 1 over via1 1 over via1/2 1 over via2/3 1 over via3
140 *
141 * 5-metals: 3 wide 3 wide 3 wide 3 wide 4 wide
142 * 3 apart 3 apart 3 apart 3 apart 4 apart
143 * 1 over via1 1 over via1/2 1 over via2/3 1 over via3/4 1 over via4
144 *
145 * 6-metals: 3 wide 3 wide 3 wide 3 wide 3 wide 4 wide
146 * 3 apart 3 apart 3 apart 3 apart 3 apart 4 apart
147 * 1 over via1 1 over via1/2 1 over via2/3 1 over via3/4 1 over via4/5 1 over via5
148 */
149
150 #include "config.h"
151 #include "global.h"
152 #include "egraphics.h"
153 #include "tech.h"
154 #include "drc.h"
155 #include "tecmocmossub.h"
156 #include "efunction.h"
157
158 /*
159 * Can switch from 4-metal rules (the default) to 2/3/5/6-metal rules
160 */
161
162 /* the options table */
163 static KEYWORD mocmossubopt[] =
164 {
165 {x_("2-metal-rules"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
166 {x_("3-metal-rules"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
167 {x_("4-metal-rules"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
168 {x_("5-metal-rules"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
169 {x_("6-metal-rules"), 0,{NOKEY,NOKEY,NOKEY,NOKEY,NOKEY}},
170 TERMKEY
171 };
172 COMCOMP mocmossub_parse = {mocmossubopt, NOTOPLIST, NONEXTLIST, NOPARAMS,
173 0, x_(" \t"), M_("MOSIS CMOS Submicron option"), M_("show current options")};
174
175 static INTBIG mocmossub_state; /* settings */
176 TECHNOLOGY *mocmossub_tech;
177
178 /* prototypes for local routines */
179 static void mocmossub_setstate(INTBIG newstate);
180 static void mocmossub_setlayerrules(CHAR *layername, INTBIG spacing, INTBIG minwidth);
181 static void mocmossub_setarcwidth(CHAR *arcname, INTBIG width);
182 static void mocmossub_setnodesize(CHAR *nodename, INTBIG size, INTBIG portoffset);
183 static void mocmossub_setmetalonvia(CHAR *nodename, INTBIG layer, INTBIG *boxdesc, INTBIG nodeoffset);
184 static CHAR *mocmossub_describestate(INTBIG state);
185
186 /******************** LAYERS ********************/
187
188 #define MAXLAYERS 40 /* total layers below */
189 #define LMETAL1 0 /* metal layer 1 */
190 #define LMETAL2 1 /* metal layer 2 */
191 #define LMETAL3 2 /* metal layer 3 */
192 #define LMETAL4 3 /* metal layer 4 */
193 #define LMETAL5 4 /* metal layer 5 */
194 #define LMETAL6 5 /* metal layer 6 */
195 #define LPOLY1 6 /* polysilicon */
196 #define LPOLY2 7 /* polysilicon 2 (electrode) */
197 #define LSACT 8 /* P (or N) active */
198 #define LDACT 9 /* N (or P) active */
199 #define LSELECTP 10 /* P-type select */
200 #define LSELECTN 11 /* N-type select */
201 #define LWELLP 12 /* P-type well */
202 #define LWELLN 13 /* N-type well */
203 #define LPOLYCUT 14 /* poly contact cut */
204 #define LACTCUT 15 /* active contact cut */
205 #define LVIA1 16 /* metal1-to-metal2 via */
206 #define LVIA2 17 /* metal2-to-metal3 via */
207 #define LVIA3 18 /* metal3-to-metal4 via */
208 #define LVIA4 19 /* metal4-to-metal5 via */
209 #define LVIA5 20 /* metal5-to-metal6 via */
210 #define LPASS 21 /* passivation (overglass) */
211 #define LTRANS 22 /* transistor */
212 #define LPOLYCAP 23 /* polysilicon capacitor */
213 #define LSACTWELL 24 /* P active in well */
214 #define LMET1P 25 /* pseudo metal 1 */
215 #define LMET2P 26 /* pseudo metal 2 */
216 #define LMET3P 27 /* pseudo metal 3 */
217 #define LMET4P 28 /* pseudo metal 4 */
218 #define LMET5P 29 /* pseudo metal 5 */
219 #define LMET6P 30 /* pseudo metal 6 */
220 #define LPOLY1P 31 /* pseudo polysilicon 1 */
221 #define LPOLY2P 32 /* pseudo polysilicon 2 */
222 #define LSACTP 33 /* pseudo P (or N) active */
223 #define LDACTP 34 /* pseudo N (or P) active */
224 #define LSELECTPP 35 /* pseudo P-type select */
225 #define LSELECTNP 36 /* pseudo N-type select */
226 #define LWELLPP 37 /* pseudo P-type well */
227 #define LWELLNP 38 /* pseudo N-type well */
228 #define LFRAME 39 /* pad frame boundary */
229
230 static GRAPHICS mocmossub_m1_lay = {LAYERT1,COLORT1, SOLIDC, PATTERNED,
231 /* metal-1 layer */ {0x2222, /* X X X X */
232 0x0000, /* */
233 0x8888, /* X X X X */
234 0x0000, /* */
235 0x2222, /* X X X X */
236 0x0000, /* */
237 0x8888, /* X X X X */
238 0x0000, /* */
239 0x2222, /* X X X X */
240 0x0000, /* */
241 0x8888, /* X X X X */
242 0x0000, /* */
243 0x2222, /* X X X X */
244 0x0000, /* */
245 0x8888, /* X X X X */
246 0x0000}, /* */
247 NOVARIABLE, 0};
248 static GRAPHICS mocmossub_m2_lay = {LAYERT4,COLORT4, SOLIDC, PATTERNED,
249 /* metal-2 layer */ {0x1010, /* X X */
250 0x2020, /* X X */
251 0x4040, /* X X */
252 0x8080, /* X X */
253 0x0101, /* X X */
254 0x0202, /* X X */
255 0x0404, /* X X */
256 0x0808, /* X X */
257 0x1010, /* X X */
258 0x2020, /* X X */
259 0x4040, /* X X */
260 0x8080, /* X X */
261 0x0101, /* X X */
262 0x0202, /* X X */
263 0x0404, /* X X */
264 0x0808}, /* X X */
265 NOVARIABLE, 0};
266 static GRAPHICS mocmossub_m3_lay = {LAYERT5,COLORT5, SOLIDC, PATTERNED,
267 /* metal-3 layer */ {0x2222, /* X X X X */
268 0x0000, /* */
269 0x8888, /* X X X X */
270 0x0000, /* */
271 0x2222, /* X X X X */
272 0x0000, /* */
273 0x8888, /* X X X X */
274 0x0000, /* */
275 0x2222, /* X X X X */
276 0x0000, /* */
277 0x8888, /* X X X X */
278 0x0000, /* */
279 0x2222, /* X X X X */
280 0x0000, /* */
281 0x8888, /* X X X X */
282 0x0000}, /* */
283 NOVARIABLE, 0};
284 static GRAPHICS mocmossub_m4_lay = {LAYERO,LBLUE, PATTERNED, PATTERNED,
285 /* metal-4 layer */ {0x0808, /* X X */
286 0x1818, /* XX XX */
287 0x2828, /* X X X X */
288 0x4848, /* X X X X */
289 0xFCFC, /* XXXXXX XXXXXXX */
290 0x0808, /* X X */
291 0x0808, /* X X */
292 0x0000, /* */
293 0x0808, /* X X */
294 0x1818, /* XX XX */
295 0x2828, /* X X X X */
296 0x4848, /* X X X X */
297 0xFCFC, /* XXXXXX XXXXXXX */
298 0x0808, /* X X */
299 0x0808, /* X X */
300 0x0000}, /* */
301 NOVARIABLE, 0};
302 static GRAPHICS mocmossub_m5_lay = {LAYERO,LRED, PATTERNED, PATTERNED,
303 /* metal-5 layer */ {0xFCFC, /* XXXXXX XXXXXX */
304 0x8080, /* X X */
305 0x8080, /* X X */
306 0xF8F8, /* XXXXX XXXXX */
307 0x0404, /* X X */
308 0x0404, /* X X */
309 0xF8F8, /* XXXXX XXXXX */
310 0x0000, /* */
311 0xFCFC, /* XXXXXX XXXXXX */
312 0x8080, /* X X */
313 0x8080, /* X X */
314 0xF8F8, /* XXXXX XXXXX */
315 0x0404, /* X X */
316 0x0404, /* X X */
317 0xF8F8, /* XXXXX XXXXX */
318 0x0000}, /* */
319 NOVARIABLE, 0};
320 static GRAPHICS mocmossub_m6_lay = {LAYERO,CYAN, PATTERNED, PATTERNED,
321 /* metal-6 layer */ {0x1818, /* XX XX */
322 0x6060, /* XX XX */
323 0x8080, /* X X */
324 0xF8F8, /* XXXXX XXXXX */
325 0x8484, /* X X X X */
326 0x8484, /* X X X X */
327 0x7878, /* XXXX XXXX */
328 0x0000, /* */
329 0x1818, /* XX XX */
330 0x6060, /* XX XX */
331 0x8080, /* X X */
332 0xF8F8, /* XXXXX XXXXX */
333 0x8484, /* X X X X */
334 0x8484, /* X X X X */
335 0x7878, /* XXXX XXXX */
336 0x0000}, /* */
337 NOVARIABLE, 0};
338 static GRAPHICS mocmossub_p1_lay = {LAYERT2,COLORT2, SOLIDC, PATTERNED,
339 /* poly layer */ {0x1111, /* X X X X */
340 0xFFFF, /* XXXXXXXXXXXXXXXX */
341 0x1111, /* X X X X */
342 0x5555, /* X X X X X X X X */
343 0x1111, /* X X X X */
344 0xFFFF, /* XXXXXXXXXXXXXXXX */
345 0x1111, /* X X X X */
346 0x5555, /* X X X X X X X X */
347 0x1111, /* X X X X */
348 0xFFFF, /* XXXXXXXXXXXXXXXX */
349 0x1111, /* X X X X */
350 0x5555, /* X X X X X X X X */
351 0x1111, /* X X X X */
352 0xFFFF, /* XXXXXXXXXXXXXXXX */
353 0x1111, /* X X X X */
354 0x5555}, /* X X X X X X X X */
355 NOVARIABLE, 0};
356 static GRAPHICS mocmossub_p2_lay = {LAYERO,ORANGE, PATTERNED, PATTERNED,
357 /* poly2 layer */ {0xAFAF, /* X X XXXXX X XXXX */
358 0x8888, /* X X X X */
359 0xFAFA, /* XXXXX X XXXXX X */
360 0x8888, /* X X X X */
361 0xAFAF, /* X X XXXXX X XXXX */
362 0x8888, /* X X X X */
363 0xFAFA, /* XXXXX X XXXXX X */
364 0x8888, /* X X X X */
365 0xAFAF, /* X X XXXXX X XXXX */
366 0x8888, /* X X X X */
367 0xFAFA, /* XXXXX X XXXXX X */
368 0x8888, /* X X X X */
369 0xAFAF, /* X X XXXXX X XXXX */
370 0x8888, /* X X X X */
371 0xFAFA, /* XXXXX X XXXXX X */
372 0x8888}, /* X X X X */
373 NOVARIABLE, 0};
374 static GRAPHICS mocmossub_sa_lay = {LAYERT3,COLORT3, SOLIDC, PATTERNED,
375 /* P active layer */ {0x0000, /* */
376 0x0303, /* XX XX */
377 0x4848, /* X X X X */
378 0x0303, /* XX XX */
379 0x0000, /* */
380 0x3030, /* XX XX */
381 0x8484, /* X X X X */
382 0x3030, /* XX XX */
383 0x0000, /* */
384 0x0303, /* XX XX */
385 0x4848, /* X X X X */
386 0x0303, /* XX XX */
387 0x0000, /* */
388 0x3030, /* XX XX */
389 0x8484, /* X X X X */
390 0x3030}, /* XX XX */
391 NOVARIABLE, 0};
392 static GRAPHICS mocmossub_da_lay = {LAYERT3,COLORT3, SOLIDC, PATTERNED,
393 /* N active layer */ {0x0000, /* */
394 0x0303, /* XX XX */
395 0x4848, /* X X X X */
396 0x0303, /* XX XX */
397 0x0000, /* */
398 0x3030, /* XX XX */
399 0x8484, /* X X X X */
400 0x3030, /* XX XX */
401 0x0000, /* */
402 0x0303, /* XX XX */
403 0x4848, /* X X X X */
404 0x0303, /* XX XX */
405 0x0000, /* */
406 0x3030, /* XX XX */
407 0x8484, /* X X X X */
408 0x3030}, /* XX XX */
409 NOVARIABLE, 0};
410 static GRAPHICS mocmossub_ssp_lay = {LAYERO,YELLOW, PATTERNED, PATTERNED,
411 /* P Select layer */ {0x1010, /* X X */
412 0x2020, /* X X */
413 0x4040, /* X X */
414 0x8080, /* X X */
415 0x0101, /* X X */
416 0x0202, /* X X */
417 0x0404, /* X X */
418 0x0808, /* X X */
419 0x1010, /* X X */
420 0x2020, /* X X */
421 0x4040, /* X X */
422 0x8080, /* X X */
423 0x0101, /* X X */
424 0x0202, /* X X */
425 0x0404, /* X X */
426 0x0808}, /* X X */
427 NOVARIABLE, 0};
428 static GRAPHICS mocmossub_ssn_lay = {LAYERO,YELLOW, PATTERNED, PATTERNED,
429 /* N Select layer */ {0x0100, /* X */
430 0x0000, /* */
431 0x0000, /* */
432 0x0000, /* */
433 0x0001, /* X */
434 0x0000, /* */
435 0x0000, /* */
436 0x0000, /* */
437 0x0100, /* X */
438 0x0000, /* */
439 0x0000, /* */
440 0x0000, /* */
441 0x0001, /* X */
442 0x0000, /* */
443 0x0000, /* */
444 0x0000}, /* */
445 NOVARIABLE, 0};
446 static GRAPHICS mocmossub_wp_lay = {LAYERO,BROWN, PATTERNED, PATTERNED,
447 /* P Well layer */ {0x0202, /* X X */
448 0x0101, /* X X */
449 0x8080, /* X X */
450 0x4040, /* X X */
451 0x2020, /* X X */
452 0x1010, /* X X */
453 0x0808, /* X X */
454 0x0404, /* X X */
455 0x0202, /* X X */
456 0x0101, /* X X */
457 0x8080, /* X X */
458 0x4040, /* X X */
459 0x2020, /* X X */
460 0x1010, /* X X */
461 0x0808, /* X X */
462 0x0404}, /* X X */
463 NOVARIABLE, 0};
464 static GRAPHICS mocmossub_wn_lay = {LAYERO,BROWN, PATTERNED, PATTERNED,
465 /* N Well implant */ {0x0002, /* X */
466 0x0000, /* */
467 0x0000, /* */
468 0x0000, /* */
469 0x0200, /* X */
470 0x0000, /* */
471 0x0000, /* */
472 0x0000, /* */
473 0x0002, /* X */
474 0x0000, /* */
475 0x0000, /* */
476 0x0000, /* */
477 0x0200, /* X */
478 0x0000, /* */
479 0x0000, /* */
480 0x0000}, /* */
481 NOVARIABLE, 0};
482 static GRAPHICS mocmossub_pc_lay = {LAYERO,BLACK, SOLIDC, SOLIDC,
483 /* poly cut layer */ {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NOVARIABLE, 0};
484 static GRAPHICS mocmossub_ac_lay = {LAYERO,BLACK, SOLIDC, SOLIDC,
485 /* active cut layer */ {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NOVARIABLE, 0};
486 static GRAPHICS mocmossub_v1_lay = {LAYERO,LGRAY, SOLIDC, SOLIDC,
487 /* via1 layer */ {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NOVARIABLE, 0};
488 static GRAPHICS mocmossub_v2_lay = {LAYERO,LGRAY, SOLIDC, SOLIDC,
489 /* via2 layer */ {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NOVARIABLE, 0};
490 static GRAPHICS mocmossub_v3_lay = {LAYERO,LGRAY, SOLIDC, SOLIDC,
491 /* via3 layer */ {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NOVARIABLE, 0};
492 static GRAPHICS mocmossub_v4_lay = {LAYERO,LGRAY, SOLIDC, SOLIDC,
493 /* via4 layer */ {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NOVARIABLE, 0};
494 static GRAPHICS mocmossub_v5_lay = {LAYERO,LGRAY, SOLIDC, SOLIDC,
495 /* via5 layer */ {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NOVARIABLE, 0};
496 static GRAPHICS mocmossub_ovs_lay = {LAYERO,DGRAY, PATTERNED, PATTERNED,
497 /* passivation layer */ {0x1C1C, /* XXX XXX */
498 0x3E3E, /* XXXXX XXXXX */
499 0x3636, /* XX XX XX XX */
500 0x3E3E, /* XXXXX XXXXX */
501 0x1C1C, /* XXX XXX */
502 0x0000, /* */
503 0x0000, /* */
504 0x0000, /* */
505 0x1C1C, /* XXX XXX */
506 0x3E3E, /* XXXXX XXXXX */
507 0x3636, /* XX XX XX XX */
508 0x3E3E, /* XXXXX XXXXX */
509 0x1C1C, /* XXX XXX */
510 0x0000, /* */
511 0x0000, /* */
512 0x0000}, /* */
513 NOVARIABLE, 0};
514 static GRAPHICS mocmossub_tr_lay = {LAYERN,ALLOFF, SOLIDC, SOLIDC,
515 /* transistor layer */ {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NOVARIABLE, 0};
516 static GRAPHICS mocmossub_cp_lay = {LAYERO,BLACK, SOLIDC, SOLIDC,
517 /* poly cap layer */ {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NOVARIABLE, 0};
518 static GRAPHICS mocmossub_saw_lay = {LAYERT3,COLORT3, SOLIDC, PATTERNED,
519 /* P act well layer */ {0x0000, /* */
520 0x0303, /* XX XX */
521 0x4848, /* X X X X */
522 0x0303, /* XX XX */
523 0x0000, /* */
524 0x3030, /* XX XX */
525 0x8484, /* X X X X */
526 0x3030, /* XX XX */
527 0x0000, /* */
528 0x0303, /* XX XX */
529 0x4848, /* X X X X */
530 0x0303, /* XX XX */
531 0x0000, /* */
532 0x3030, /* XX XX */
533 0x8484, /* X X X X */
534 0x3030}, /* XX XX */
535 NOVARIABLE, 0};
536 static GRAPHICS mocmossub_pm1_lay ={LAYERT1,COLORT1, SOLIDC, PATTERNED,
537 /* pseudo metal 1 */ {0x2222, /* X X X X */
538 0x0000, /* */
539 0x8888, /* X X X X */
540 0x0000, /* */
541 0x2222, /* X X X X */
542 0x0000, /* */
543 0x8888, /* X X X X */
544 0x0000, /* */
545 0x2222, /* X X X X */
546 0x0000, /* */
547 0x8888, /* X X X X */
548 0x0000, /* */
549 0x2222, /* X X X X */
550 0x0000, /* */
551 0x8888, /* X X X X */
552 0x0000}, /* */
553 NOVARIABLE, 0};
554 static GRAPHICS mocmossub_pm2_lay = {LAYERT4,COLORT4, SOLIDC, PATTERNED,
555 /* pseudo metal-2 */ {0x1010, /* X X */
556 0x2020, /* X X */
557 0x4040, /* X X */
558 0x8080, /* X X */
559 0x0101, /* X X */
560 0x0202, /* X X */
561 0x0404, /* X X */
562 0x0808, /* X X */
563 0x1010, /* X X */
564 0x2020, /* X X */
565 0x4040, /* X X */
566 0x8080, /* X X */
567 0x0101, /* X X */
568 0x0202, /* X X */
569 0x0404, /* X X */
570 0x0808}, /* X X */
571 NOVARIABLE, 0};
572 static GRAPHICS mocmossub_pm3_lay = {LAYERT5,COLORT5, SOLIDC, PATTERNED,
573 /* pseudo metal-3 */ {0x1010, /* X X */
574 0x2020, /* X X */
575 0x4040, /* X X */
576 0x8080, /* X X */
577 0x0101, /* X X */
578 0x0202, /* X X */
579 0x0404, /* X X */
580 0x0808, /* X X */
581 0x1010, /* X X */
582 0x2020, /* X X */
583 0x4040, /* X X */
584 0x8080, /* X X */
585 0x0101, /* X X */
586 0x0202, /* X X */
587 0x0404, /* X X */
588 0x0808}, /* X X */
589 NOVARIABLE, 0};
590 static GRAPHICS mocmossub_pm4_lay = {LAYERO,LBLUE, PATTERNED, PATTERNED,
591 /* pseudo metal-4 */ {0x0808, /* X X */
592 0x1818, /* XX XX */
593 0x2828, /* X X X X */
594 0x4848, /* X X X X */
595 0xFCFC, /* XXXXXX XXXXXXX */
596 0x0808, /* X X */
597 0x0808, /* X X */
598 0x0000, /* */
599 0x0808, /* X X */
600 0x1818, /* XX XX */
601 0x2828, /* X X X X */
602 0x4848, /* X X X X */
603 0xFCFC, /* XXXXXX XXXXXXX */
604 0x0808, /* X X */
605 0x0808, /* X X */
606 0x0000}, /* */
607 NOVARIABLE, 0};
608 static GRAPHICS mocmossub_pm5_lay = {LAYERO,LRED, PATTERNED, PATTERNED,
609 /* pseudo metal-5 */ {0xFCFC, /* XXXXXX XXXXXX */
610 0x8080, /* X X */
611 0x8080, /* X X */
612 0xF8F8, /* XXXXX XXXXX */
613 0x0404, /* X X */
614 0x0404, /* X X */
615 0xF8F8, /* XXXXX XXXXX */
616 0x0000, /* */
617 0xFCFC, /* XXXXXX XXXXXX */
618 0x8080, /* X X */
619 0x8080, /* X X */
620 0xF8F8, /* XXXXX XXXXX */
621 0x0404, /* X X */
622 0x0404, /* X X */
623 0xF8F8, /* XXXXX XXXXX */
624 0x0000}, /* */
625 NOVARIABLE, 0};
626 static GRAPHICS mocmossub_pm6_lay = {LAYERO,CYAN, PATTERNED, PATTERNED,
627 /* pseudo metal-6 */ {0x1818, /* XX XX */
628 0x6060, /* XX XX */
629 0x8080, /* X X */
630 0xF8F8, /* XXXXX XXXXX */
631 0x8484, /* X X X X */
632 0x8484, /* X X X X */
633 0x7878, /* XXXX XXXX */
634 0x0000, /* */
635 0x1818, /* XX XX */
636 0x6060, /* XX XX */
637 0x8080, /* X X */
638 0xF8F8, /* XXXXX XXXXX */
639 0x8484, /* X X X X */
640 0x8484, /* X X X X */
641 0x7878, /* XXXX XXXX */
642 0x0000}, /* */
643 NOVARIABLE, 0};
644 static GRAPHICS mocmossub_pp1_lay = {LAYERT2,COLORT2, SOLIDC, PATTERNED,
645 /* pseudo poly layer */ {0x1111, /* X X X X */
646 0xFFFF, /* XXXXXXXXXXXXXXXX */
647 0x1111, /* X X X X */
648 0x5555, /* X X X X X X X X */
649 0x1111, /* X X X X */
650 0xFFFF, /* XXXXXXXXXXXXXXXX */
651 0x1111, /* X X X X */
652 0x5555, /* X X X X X X X X */
653 0x1111, /* X X X X */
654 0xFFFF, /* XXXXXXXXXXXXXXXX */
655 0x1111, /* X X X X */
656 0x5555, /* X X X X X X X X */
657 0x1111, /* X X X X */
658 0xFFFF, /* XXXXXXXXXXXXXXXX */
659 0x1111, /* X X X X */
660 0x5555}, /* X X X X X X X X */
661 NOVARIABLE, 0};
662 static GRAPHICS mocmossub_pp2_lay = {LAYERO,ORANGE, PATTERNED, PATTERNED,
663 /* pseudo poly2 layer */{0xAFAF, /* X X XXXXX X XXXX */
664 0x8888, /* X X X X */
665 0xFAFA, /* XXXXX X XXXXX X */
666 0x8888, /* X X X X */
667 0xAFAF, /* X X XXXXX X XXXX */
668 0x8888, /* X X X X */
669 0xFAFA, /* XXXXX X XXXXX X */
670 0x8888, /* X X X X */
671 0xAFAF, /* X X XXXXX X XXXX */
672 0x8888, /* X X X X */
673 0xFAFA, /* XXXXX X XXXXX X */
674 0x8888, /* X X X X */
675 0xAFAF, /* X X XXXXX X XXXX */
676 0x8888, /* X X X X */
677 0xFAFA, /* XXXXX X XXXXX X */
678 0x8888}, /* X X X X */
679 NOVARIABLE, 0};
680 static GRAPHICS mocmossub_psa_lay = {LAYERT3,COLORT3, SOLIDC, PATTERNED,
681 /* pseudo P active */ {0x0000, /* */
682 0x0303, /* XX XX */
683 0x4848, /* X X X X */
684 0x0303, /* XX XX */
685 0x0000, /* */
686 0x3030, /* XX XX */
687 0x8484, /* X X X X */
688 0x3030, /* XX XX */
689 0x0000, /* */
690 0x0303, /* XX XX */
691 0x4848, /* X X X X */
692 0x0303, /* XX XX */
693 0x0000, /* */
694 0x3030, /* XX XX */
695 0x8484, /* X X X X */
696 0x3030}, /* XX XX */
697 NOVARIABLE, 0};
698 static GRAPHICS mocmossub_pda_lay = {LAYERT3,COLORT3, SOLIDC, PATTERNED,
699 /* pseudo N active */ {0x0000, /* */
700 0x0303, /* XX XX */
701 0x4848, /* X X X X */
702 0x0303, /* XX XX */
703 0x0000, /* */
704 0x3030, /* XX XX */
705 0x8484, /* X X X X */
706 0x3030, /* XX XX */
707 0x0000, /* */
708 0x0303, /* XX XX */
709 0x4848, /* X X X X */
710 0x0303, /* XX XX */
711 0x0000, /* */
712 0x3030, /* XX XX */
713 0x8484, /* X X X X */
714 0x3030}, /* XX XX */
715 NOVARIABLE, 0};
716 static GRAPHICS mocmossub_pssp_lay = {LAYERO,YELLOW,PATTERNED, PATTERNED,
717 /* pseudo P Select */ {0x1010, /* X X */
718 0x2020, /* X X */
719 0x4040, /* X X */
720 0x8080, /* X X */
721 0x0101, /* X X */
722 0x0202, /* X X */
723 0x0404, /* X X */
724 0x0808, /* X X */
725 0x1010, /* X X */
726 0x2020, /* X X */
727 0x4040, /* X X */
728 0x8080, /* X X */
729 0x0101, /* X X */
730 0x0202, /* X X */
731 0x0404, /* X X */
732 0x0808}, /* X X */
733 NOVARIABLE, 0};
734 static GRAPHICS mocmossub_pssn_lay = {LAYERO,YELLOW,PATTERNED, PATTERNED,
735 /* pseudo N Select */ {0x0100, /* X */
736 0x0000, /* */
737 0x0000, /* */
738 0x0000, /* */
739 0x0001, /* X */
740 0x0000, /* */
741 0x0000, /* */
742 0x0000, /* */
743 0x0100, /* X */
744 0x0000, /* */
745 0x0000, /* */
746 0x0000, /* */
747 0x0001, /* X */
748 0x0000, /* */
749 0x0000, /* */
750 0x0000}, /* */
751 NOVARIABLE, 0};
752 static GRAPHICS mocmossub_pwp_lay = {LAYERO,BROWN, PATTERNED, PATTERNED,
753 /* pseudo P Well */ {0x0202, /* X X */
754 0x0101, /* X X */
755 0x8080, /* X X */
756 0x4040, /* X X */
757 0x2020, /* X X */
758 0x1010, /* X X */
759 0x0808, /* X X */
760 0x0404, /* X X */
761 0x0202, /* X X */
762 0x0101, /* X X */
763 0x8080, /* X X */
764 0x4040, /* X X */
765 0x2020, /* X X */
766 0x1010, /* X X */
767 0x0808, /* X X */
768 0x0404}, /* X X */
769 NOVARIABLE, 0};
770 static GRAPHICS mocmossub_pwn_lay = {LAYERO,BROWN, PATTERNED, PATTERNED,
771 /* pseudo N Well */ {0x0002, /* X */
772 0x0000, /* */
773 0x0000, /* */
774 0x0000, /* */
775 0x0200, /* X */
776 0x0000, /* */
777 0x0000, /* */
778 0x0000, /* */
779 0x0002, /* X */
780 0x0000, /* */
781 0x0000, /* */
782 0x0000, /* */
783 0x0200, /* X */
784 0x0000, /* */
785 0x0000, /* */
786 0x0000}, /* */
787 NOVARIABLE, 0};
788 static GRAPHICS mocmossub_pf_lay = {LAYERO, RED, SOLIDC, PATTERNED,
789 /* pad frame */ {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}, NOVARIABLE, 0};
790
791 /* these tables must be updated together */
792 GRAPHICS *mocmossub_layers[MAXLAYERS+1] = {
793 &mocmossub_m1_lay, &mocmossub_m2_lay, &mocmossub_m3_lay, /* metal 1/2/3 */
794 &mocmossub_m4_lay, &mocmossub_m5_lay, &mocmossub_m6_lay, /* metal 4/5/6 */
795 &mocmossub_p1_lay, &mocmossub_p2_lay, /* poly 1/2 */
796 &mocmossub_sa_lay, &mocmossub_da_lay, /* P/N active */
797 &mocmossub_ssp_lay, &mocmossub_ssn_lay, /* P/N select */
798 &mocmossub_wp_lay, &mocmossub_wn_lay, /* P/N well */
799 &mocmossub_pc_lay, &mocmossub_ac_lay, /* poly/act cut */
800 &mocmossub_v1_lay, &mocmossub_v2_lay, &mocmossub_v3_lay, /* via 1/2/3 */
801 &mocmossub_v4_lay, &mocmossub_v5_lay, /* via 4/5 */
802 &mocmossub_ovs_lay, /* overglass */
803 &mocmossub_tr_lay, /* transistor */
804 &mocmossub_cp_lay, /* poly cap */
805 &mocmossub_saw_lay, /* P active well */
806 &mocmossub_pm1_lay, &mocmossub_pm2_lay, /* pseudo metal 1/2 */
807 &mocmossub_pm3_lay, &mocmossub_pm4_lay, /* pseudo metal 3/4 */
808 &mocmossub_pm5_lay, &mocmossub_pm6_lay, /* pseudo metal 5/6 */
809 &mocmossub_pp1_lay, &mocmossub_pp2_lay, /* pseudo poly 1/2 */
810 &mocmossub_psa_lay, &mocmossub_pda_lay, /* pseudo P/N active */
811 &mocmossub_pssp_lay, &mocmossub_pssn_lay, /* pseudo P/N select */
812 &mocmossub_pwp_lay, &mocmossub_pwn_lay, /* pseudo P/N well */
813 &mocmossub_pf_lay, NOGRAPHICS}; /* pad frame */
814 static CHAR *mocmossub_layer_names[MAXLAYERS] = {
815 x_("Metal-1"), x_("Metal-2"), x_("Metal-3"), /* metal 1/2/3 */
816 x_("Metal-4"), x_("Metal-5"), x_("Metal-6"), /* metal 4/5/6 */
817 x_("Polysilicon-1"), x_("Polysilicon-2"), /* poly 1/2 */
818 x_("P-Active"), x_("N-Active"), /* P/N active */
819 x_("P-Select"), x_("N-Select"), /* P/N select */
820 x_("P-Well"), x_("N-Well"), /* P/N well */
821 x_("Poly-Cut"), x_("Active-Cut"), /* poly/act cut */
822 x_("Via1"), x_("Via2"), x_("Via3"), /* via 1/2/3 */
823 x_("Via4"), x_("Via5"), /* via 4/5 */
824 x_("Passivation"), /* overglass */
825 x_("Transistor"), /* transistor */
826 x_("Poly-Cap"), /* poly cap */
827 x_("P-Active-Well"), /* P active well */
828 x_("Pseudo-Metal-1"), x_("Pseudo-Metal-2"), /* pseudo metal 1/2 */
829 x_("Pseudo-Metal-3"), x_("Pseudo-Metal-4"), /* pseudo metal 3/4 */
830 x_("Pseudo-Metal-5"), x_("Pseudo-Metal-6"), /* pseudo metal 5/6 */
831 x_("Pseudo-Polysilicon"), x_("Pseudo-Electrode"), /* pseudo poly 1/2 */
832 x_("Pseudo-P-Active"), x_("Pseudo-N-Active"), /* pseudo P/N active */
833 x_("Pseudo-P-Select"), x_("Pseudo-N-Select"), /* pseudo P/N select */
834 x_("Pseudo-P-Well"), x_("Pseudo-N-Well"), /* pseudo P/N well */
835 x_("Pad-Frame")}; /* pad frame */
836 static INTBIG mocmossub_layer_function[MAXLAYERS] = {
837 LFMETAL1|LFTRANS1, LFMETAL2|LFTRANS4, LFMETAL3|LFTRANS5, /* metal 1/2/3 */
838 LFMETAL4, LFMETAL5, LFMETAL6, /* metal 4/5/6 */
839 LFPOLY1|LFTRANS2, LFPOLY2, /* poly 1/2 */
840 LFDIFF|LFPTYPE|LFTRANS3, LFDIFF|LFNTYPE|LFTRANS3, /* P/N active */
841 LFIMPLANT|LFPTYPE, LFIMPLANT|LFNTYPE, /* P/N select */
842 LFWELL|LFPTYPE, LFWELL|LFNTYPE, /* P/N well */
843 LFCONTACT1|LFCONPOLY, LFCONTACT1|LFCONDIFF, /* poly/act cut */
844 LFCONTACT2|LFCONMETAL, LFCONTACT3|LFCONMETAL, LFCONTACT4|LFCONMETAL, /* via 1/2/3 */
845 LFCONTACT5|LFCONMETAL, LFCONTACT6|LFCONMETAL, /* via 4/5 */
846 LFOVERGLASS, /* overglass */
847 LFTRANSISTOR|LFPSEUDO, /* transistor */
848 LFCAP, /* poly cap */
849 LFDIFF|LFPTYPE|LFTRANS3, /* P active well */
850 LFMETAL1|LFPSEUDO|LFTRANS1,LFMETAL2|LFPSEUDO|LFTRANS4, /* pseudo metal 1/2 */
851 LFMETAL3|LFPSEUDO|LFTRANS5, LFMETAL4|LFPSEUDO, /* pseudo metal 3/4 */
852 LFMETAL5|LFPSEUDO, LFMETAL6|LFPSEUDO, /* pseudo metal 5/6 */
853 LFPOLY1|LFPSEUDO|LFTRANS2, LFPOLY2|LFPSEUDO, /* pseudo poly 1/2 */
854 LFDIFF|LFPTYPE|LFPSEUDO|LFTRANS3, /* pseudo P/N active */
855 LFDIFF|LFNTYPE|LFPSEUDO|LFTRANS3,
856 LFIMPLANT|LFPTYPE|LFPSEUDO, LFIMPLANT|LFNTYPE|LFPSEUDO, /* pseudo P/N select */
857 LFWELL|LFPTYPE|LFPSEUDO, LFWELL|LFNTYPE|LFPSEUDO, /* pseudo P/N well */
858 LFART}; /* pad frame */
859 static CHAR *mocmossub_cif_layers[MAXLAYERS] = {
860 x_("CMF"), x_("CMS"), x_("CMT"), x_("CMQ"), x_("CMP"), x_("CM6"), /* metal 1/2/3/4/5/6 */
861 x_("CPG"), x_("CEL"), /* poly 1/2 */
862 x_("CAA"), x_("CAA"), /* P/N active */
863 x_("CSP"), x_("CSN"), /* P/N select */
864 x_("CWP"), x_("CWN"), /* P/N well */
865 x_("CCG"), x_("CCG"), /* poly/act cut */
866 x_("CVA"), x_("CVS"), x_("CVT"), x_("CVQ"), x_("CV5"), /* via 1/2/3/4/5 */
867 x_("COG"), /* overglass */
868 x_(""), /* transistor */
869 x_("CPC"), /* poly cap */
870 x_("CAA"), /* P active well */
871 x_(""), x_(""), x_(""), x_(""), x_(""), x_(""), /* pseudo metal 1/2/3/4/5/6 */
872 x_(""), x_(""), /* pseudo poly 1/2 */
873 x_(""), x_(""), /* pseudo P/N active */
874 x_("CSP"), x_("CSN"), /* pseudo P/N select */
875 x_("CWP"), x_("CWN"), /* pseudo P/N well */
876 x_("CX")}; /* pad frame */
877 static CHAR *mocmossub_gds_layers[MAXLAYERS] = {
878 x_("49"), x_("51"), x_("62"), x_("31"), x_("33"), x_("38"), /* metal 1/2/3/4/5/6 */
879 x_("46"), x_("56"), /* poly 1/2 */
880 x_("43"), x_("43"), /* P/N active */
881 x_("44"), x_("45"), /* P/N select */
882 x_("41"), x_("42"), /* P/N well */
883 x_("25"), x_("25"), /* poly/act cut */
884 x_("50"), x_("61"), x_("30"), x_("32"), x_("39"), /* via 1/2/3/4/5 */
885 x_("52"), /* overglass */
886 x_(""), /* transistor */
887 x_("28"), /* poly cap */
888 x_("43"), /* P active well */
889 x_(""), x_(""), x_(""), x_(""), x_(""), x_(""), /* pseudo metal 1/2/3/4/5/6 */
890 x_(""), x_(""), /* pseudo poly 1/2 */
891 x_(""), x_(""), /* pseudo P/N active */
892 x_(""), x_(""), /* pseudo P/N select */
893 x_(""), x_(""), /* pseudo P/N well */
894 x_("19")}; /* pad frame */
895 static INTBIG mocmossub_minimum_width[MAXLAYERS] = {
896 K3, K3, K3, K3, K3, K3, /* metal 1/2/3/4/5/6 */
897 K2, K3, /* poly 1/2 */
898 K3, K3, /* P/N active */
899 K2, K2, /* P/N select */
900 K12, K12, /* P/N well */
901 K2, K2, /* poly/act cut */
902 K2, K2, K2, K2, K2, /* via 1/2/3/4/5 */
903 XX, /* overglass */
904 XX, /* transistor */
905 XX, /* poly cap */
906 XX, /* P active well */
907 XX, XX, XX, XX, XX, XX, /* pseudo metal 1/2/3/4/5/6 */
908 XX, XX, /* pseudo poly 1/2 */
909 XX, XX, /* pseudo P/N active */
910 K2, K2, /* pseudo P/N select */
911 K12, K12, /* pseudo P/N well */
912 XX}; /* pad frame */
913 static CHAR *mocmossub_skill_layers[MAXLAYERS] = {
914 x_("metal1"), x_("metal2"), x_("metal3"), /* metal 1/2/3 */
915 x_("metal4"), x_("metal5"), x_("metal6"), /* metal 4/5/6 */
916 x_("poly"), x_(""), /* poly 1/2 */
917 x_("aa"), x_("aa"), /* P/N active */
918 x_("pplus"), x_("nplus"), /* P/N select */
919 x_("pwell"), x_("nwell"), /* P/N well */
920 x_("pcont"), x_("acont"), /* poly/act cut */
921 x_("via"), x_("via2"), x_("via3"), x_("via4"), x_("via5"), /* via 1/2/3/4/5 */
922 x_("glasscut"), /* overglass */
923 x_(""), /* transistor */
924 x_(""), /* poly cap */
925 x_("aa"), /* P active well */
926 x_(""), x_(""), x_(""), x_(""), x_(""), x_(""), /* pseudo metal 1/2/3/4/5/6 */
927 x_(""), x_(""), /* pseudo poly 1/2 */
928 x_(""), x_(""), /* pseudo P/N active */
929 x_("pplus"), x_("nplus"), /* pseudo P/N select */
930 x_("pwell"), x_("nwell"), /* pseudo P/N well */
931 x_("")}; /* pad frame */
932 static INTBIG mocmossub_3dthick_layers[MAXLAYERS] = {
933 0, 0, 0, 0, 0, 0, /* metal 1/2/3/4/5/6 */
934 0, 0, /* poly 1/2 */
935 0, 0, /* P/N active */
936 0, 0, /* P/N select */
937 0, 0, /* P/N well */
938 2, 4, /* poly/act cut */
939 2, 2, 2, 2, 2, /* via 1/2/3/4/5 */
940 0, /* overglass */
941 0, /* transistor */
942 0, /* poly cap */
943 0, /* P active well */
944 0, 0, 0, 0, 0, 0, /* pseudo metal 1/2/3/4/5/6 */
945 0, 0, /* pseudo poly 1/2 */
946 0, 0, /* pseudo P/N active */
947 0, 0, /* pseudo P/N select */
948 0, 0, /* pseudo P/N well */
949 0}; /* pad frame */
950 static INTBIG mocmossub_3dheight_layers[MAXLAYERS] = {
951 17, 19, 21, 23, 25, 27, /* metal 1/2/3/4/5/6 */
952 15, 16, /* poly 1/2 */
953 13, 13, /* P/N active */
954 12, 12, /* P/N select */
955 11, 11, /* P/N well */
956 16, 15, /* poly/act cut */
957 18, 20, 22, 24, 26, /* via 1/2/3/4/5 */
958 30, /* overglass */
959 31, /* transistor */
960 28, /* poly cap */
961 29, /* P active well */
962 17, 19, 21, 23, 25, 27, /* pseudo metal 1/2/3/4/5/6 */
963 12, 13, /* pseudo poly 1/2 */
964 11, 11, /* pseudo P/N active */
965 2, 2, /* pseudo P/N select */
966 0, 0, /* pseudo P/N well */
967 33}; /* pad frame */
968 /* there are no available letters */
969 static CHAR *mocmossub_layer_letters[MAXLAYERS] = {
970 x_("m"), x_("h"), x_("r"), x_("q"), x_("a"), x_("c"), /* metal 1/2/3/4/5/6 */
971 x_("p"), x_("l"), /* poly 1/2 */
972 x_("s"), x_("d"), /* P/N active */
973 x_("e"), x_("f"), /* P/N select */
974 x_("w"), x_("n"), /* P/N well */
975 x_("j"), x_("k"), /* poly/act cut */
976 x_("v"), x_("u"), x_("z"), x_("i"), x_("y"), /* via 1/2/3/4/5 */
977 x_("o"), /* overglass */
978 x_("t"), /* transistor */
979 x_("g"), /* poly cap */
980 x_("x"), /* P active well */
981 x_("M"), x_("H"), x_("R"), x_("Q"), x_("A"), x_("C"), /* pseudo metal 1/2/3/4/5/6 */
982 x_("P"), x_("L"), /* pseudo poly 1/2 */
983 x_("S"), x_("D"), /* pseudo P/N active */
984 x_("E"), x_("F"), /* pseudo P/N select */
985 x_("W"), x_("N"), /* pseudo P/N well */
986 x_("b")}; /* pad frame */
987 /* The low 5 bits map Metal-1, Poly-1, Active, Metal-2, and Metal-3 */
988 static TECH_COLORMAP mocmossub_colmap[32] =
989 { /* Metal-3 Metal-2 Active Polysilicon-1 Metal-1 */
990 {200,200,200}, /* 0: */
991 { 96,209,255}, /* 1: Metal-1 */
992 {255,155,192}, /* 2: Polysilicon-1 */
993 {111,144,177}, /* 3: Polysilicon-1 Metal-1 */
994 {107,226, 96}, /* 4: Active */
995 { 83,179,160}, /* 5: Active Metal-1 */
996 {161,151,126}, /* 6: Active Polysilicon-1 */
997 {110,171,152}, /* 7: Active Polysilicon-1 Metal-1 */
998 {224, 95,255}, /* 8: Metal-2 */
999 {135,100,191}, /* 9: Metal-2 Metal-1 */
1000 {170, 83,170}, /* 10: Metal-2 Polysilicon-1 */
1001 {152,104,175}, /* 11: Metal-2 Polysilicon-1 Metal-1 */
1002 {150,124,163}, /* 12: Metal-2 Active */
1003 {129,144,165}, /* 13: Metal-2 Active Metal-1 */
1004 {155,133,151}, /* 14: Metal-2 Active Polysilicon-1 */
1005 {141,146,153}, /* 15: Metal-2 Active Polysilicon-1 Metal-1 */
1006 {247,251, 20}, /* 16: Metal-3 */
1007 {154,186, 78}, /* 17: Metal-3 Metal-1 */
1008 {186,163, 57}, /* 18: Metal-3 Polysilicon-1 */
1009 {167,164, 99}, /* 19: Metal-3 Polysilicon-1 Metal-1 */
1010 {156,197, 41}, /* 20: Metal-3 Active */
1011 {138,197, 83}, /* 21: Metal-3 Active Metal-1 */
1012 {161,184, 69}, /* 22: Metal-3 Active Polysilicon-1 */
1013 {147,183, 97}, /* 23: Metal-3 Active Polysilicon-1 Metal-1 */
1014 {186,155, 76}, /* 24: Metal-3 Metal-2 */
1015 {155,163,119}, /* 25: Metal-3 Metal-2 Metal-1 */
1016 {187,142, 97}, /* 26: Metal-3 Metal-2 Polysilicon-1 */
1017 {165,146,126}, /* 27: Metal-3 Metal-2 Polysilicon-1 Metal-1 */
1018 {161,178, 82}, /* 28: Metal-3 Metal-2 Active */
1019 {139,182,111}, /* 29: Metal-3 Metal-2 Active Metal-1 */
1020 {162,170, 97}, /* 30: Metal-3 Metal-2 Active Polysilicon-1 */
1021 {147,172,116} /* 31: Metal-3 Metal-2 Active Polysilicon-1 Metal-1 */
1022 };
1023
1024 /******************** DESIGN RULES ********************/
1025
1026 #define X XX
1027 #define A K1
1028 #define B K2
1029 #define C K3
1030 #define D K4
1031 #define E K5
1032 #define F K6
1033 #define R K18
1034
1035 /* layers that can connect to other layers when electrically disconnected */
1036 static INTBIG mocmossub_unconnectedtable[] = {
1037 /* M M M M M M P P P N S S W W P A V V V V V P T P P M M M M M M P P P N S S W W P */
1038 /* e e e e e e o o A A e e e e o c i i i i i a r C a e e e e e e o o A A e e e e a */
1039 /* t t t t t t l l c c l l l l l t a a a a a s a a c t t t t t t l l c c l l l l d */
1040 /* 1 2 3 4 5 6 y y t t P N l l y C 1 2 3 4 5 s n p t 1 2 3 4 5 6 1 2 t t P N P N F */
1041 /* 1 2 P N C s W P P P P P P P P P P P P P P r */
1042 /* Met1 */ C,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1043 /* Met2 */ C,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1044 /* Met3 */ C,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1045 /* Met4 */ C,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1046 /* Met5 */ C,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1047 /* Met6 */ C,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1048 /* Poly1 */ C,X,A,A,X,X,X,X,X,B,X,X,X,X,X,X,X,X,A,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1049 /* Poly2 */ C,A,A,X,X,X,X,C,X,X,X,X,X,X,X,X,X,A,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1050 /* PAct */ C,C,X,X,X,X,B,X,X,X,X,X,X,X,X,X,C,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1051 /* NAct */ C,X,X,X,X,B,X,X,X,X,X,X,X,X,X,C,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1052 /* SelP */ B,0,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1053 /* SelN */ B,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1054 /* WellP */ R,0,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1055 /* WellN */ R,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1056 /* PolyC */ C,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1057 /* ActC */ C,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1058 /* Via1 */ C,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1059 /* Via2 */ C,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1060 /* Via3 */ D,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1061 /* Via4 */ C,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1062 /* Via5 */ C,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1063 /* Pass */ X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1064 /* Trans */ X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1065 /* PCap */ X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1066 /* PactW */ C,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1067 /* Met1P */ X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1068 /* Met2P */ X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1069 /* Met3P */ X,X,X,X,X,X,X,X,X,X,X,X,X,
1070 /* Met4P */ X,X,X,X,X,X,X,X,X,X,X,X,
1071 /* Met5P */ X,X,X,X,X,X,X,X,X,X,X,
1072 /* Met6P */ X,X,X,X,X,X,X,X,X,X,
1073 /* Poly1P */ X,X,X,X,X,X,X,X,X,
1074 /* Poly2P */ X,X,X,X,X,X,X,X,
1075 /* PActP */ X,X,X,X,X,X,X,
1076 /* NActP */ X,X,X,X,X,X,
1077 /* SelPP */ X,X,X,X,X,
1078 /* SelNP */ X,X,X,X,
1079 /* WelPP */ X,X,X,
1080 /* WelNP */ X,X,
1081 /* PadFr */ X,
1082 };
1083
1084 /* layers that can connect to other layers when electrically connected */
1085 static INTBIG mocmossub_connectedtable[] = {
1086 /* M M M M M M P P P N S S W W P A V V V V V P T P P M M M M M M P P P N S S W W P */
1087 /* e e e e e e o o A A e e e e o c i i i i i a r C a e e e e e e o o A A e e e e a */
1088 /* t t t t t t l l c c l l l l l t a a a a a s a a c t t t t t t l l c c l l l l d */
1089 /* 1 2 3 4 5 6 y y t t P N l l y C 1 2 3 4 5 s n p t 1 2 3 4 5 6 1 2 t t P N P N F */
1090 /* 1 2 P N C s W P P P P P P P P P P P P P P r */
1091 /* Met1 */ C,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1092 /* Met2 */ C,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1093 /* Met3 */ C,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1094 /* Met4 */ C,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1095 /* Met5 */ C,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1096 /* Met6 */ C,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1097 /* Poly1 */ C,X,A,A,X,X,X,X,X,X,X,X,X,X,X,X,X,X,A,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1098 /* Poly2 */ C,A,A,X,X,X,X,X,X,X,X,X,X,X,X,X,X,A,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1099 /* PAct */ C,C,X,X,X,X,X,X,X,X,X,X,X,X,X,X,C,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1100 /* NAct */ C,X,X,X,X,X,X,X,X,X,X,X,X,X,X,C,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1101 /* SelP */ X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1102 /* SelN */ X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1103 /* WellP */ F,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1104 /* WellN */ F,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1105 /* PolyC */ C,C,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1106 /* ActC */ C,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1107 /* Via1 */ C,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1108 /* Via2 */ C,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1109 /* Via3 */ D,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1110 /* Via4 */ C,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1111 /* Via5 */ C,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1112 /* Pass */ X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1113 /* Trans */ X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1114 /* PCap */ X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1115 /* PactW */ C,X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1116 /* Met1P */ X,X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1117 /* Met2P */ X,X,X,X,X,X,X,X,X,X,X,X,X,X,
1118 /* Met3P */ X,X,X,X,X,X,X,X,X,X,X,X,X,
1119 /* Met4P */ X,X,X,X,X,X,X,X,X,X,X,X,
1120 /* Met5P */ X,X,X,X,X,X,X,X,X,X,X,
1121 /* Met6P */ X,X,X,X,X,X,X,X,X,X,
1122 /* Poly1P */ X,X,X,X,X,X,X,X,X,
1123 /* Poly2P */ X,X,X,X,X,X,X,X,
1124 /* PActP */ X,X,X,X,X,X,X,
1125 /* NActP */ X,X,X,X,X,X,
1126 /* SelPP */ X,X,X,X,X,
1127 /* SelNP */ X,X,X,X,
1128 /* WelPP */ X,X,X,
1129 /* WelNP */ X,X,
1130 /* PadFr */ X,
1131 };
1132
1133 /******************** ARCS ********************/
1134
1135 #define ARCPROTOCOUNT 11
1136 #define AMETAL1 0 /* metal-1 */
1137 #define AMETAL2 1 /* metal-2 */
1138 #define AMETAL3 2 /* metal-3 */
1139 #define AMETAL4 3 /* metal-4 */
1140 #define AMETAL5 4 /* metal-5 */
1141 #define AMETAL6 5 /* metal-6 */
1142 #define APOLY1 6 /* polysilicon-1 */
1143 #define APOLY2 7 /* polysilicon-2 */
1144 #define ASACT 8 /* P-active (or N) */
1145 #define ADACT 9 /* N-active (or P) */
1146 #define AACT 10 /* General active */
1147
1148 /* metal 1 arc */
1149 static TECH_ARCLAY mocmossub_al_m1[] = {{LMETAL1,0,FILLED }};
1150 static TECH_ARCS mocmossub_a_m1 = {
1151 x_("Metal-1"),K3,AMETAL1,NOARCPROTO, /* name */
1152 1,mocmossub_al_m1, /* layers */
1153 (APMETAL1<<AFUNCTIONSH)|WANTFIXANG|CANWIPE|(90<<AANGLEINCSH)}; /* userbits */
1154
1155 /* metal 2 arc */
1156 static TECH_ARCLAY mocmossub_al_m2[] = {{LMETAL2,0,FILLED }};
1157 static TECH_ARCS mocmossub_a_m2 = {
1158 x_("Metal-2"),K3,AMETAL2,NOARCPROTO, /* name */
1159 1,mocmossub_al_m2, /* layers */
1160 (APMETAL2<<AFUNCTIONSH)|WANTFIXANG|CANWIPE|(90<<AANGLEINCSH)}; /* userbits */
1161
1162 /* metal 3 arc */
1163 static TECH_ARCLAY mocmossub_al_m3[] = {{LMETAL3,0,FILLED }};
1164 static TECH_ARCS mocmossub_a_m3 = {
1165 x_("Metal-3"),K3,AMETAL3,NOARCPROTO, /* name */
1166 1,mocmossub_al_m3, /* layers */
1167 (APMETAL3<<AFUNCTIONSH)|WANTFIXANG|CANWIPE|(90<<AANGLEINCSH)}; /* userbits */
1168
1169 /* metal 4 arc */
1170 static TECH_ARCLAY mocmossub_al_m4[] = {{LMETAL4,0,FILLED }};
1171 static TECH_ARCS mocmossub_a_m4 = {
1172 x_("Metal-4"),K3,AMETAL4,NOARCPROTO, /* name */
1173 1,mocmossub_al_m4, /* layers */
1174 (APMETAL4<<AFUNCTIONSH)|WANTFIXANG|CANWIPE|(90<<AANGLEINCSH)}; /* userbits */
1175
1176 /* metal 5 arc */
1177 static TECH_ARCLAY mocmossub_al_m5[] = {{LMETAL5,0,FILLED }};
1178 static TECH_ARCS mocmossub_a_m5 = {
1179 x_("Metal-5"),K3,AMETAL5,NOARCPROTO, /* name */
1180 1,mocmossub_al_m5, /* layers */
1181 (APMETAL5<<AFUNCTIONSH)|WANTFIXANG|CANWIPE|(90<<AANGLEINCSH)}; /* userbits */
1182
1183 /* metal 6 arc */
1184 static TECH_ARCLAY mocmossub_al_m6[] = {{LMETAL6,0,FILLED }};
1185 static TECH_ARCS mocmossub_a_m6 = {
1186 x_("Metal-6"),K3,AMETAL6,NOARCPROTO, /* name */
1187 1,mocmossub_al_m6, /* layers */
1188 (APMETAL6<<AFUNCTIONSH)|WANTFIXANG|CANWIPE|(90<<AANGLEINCSH)}; /* userbits */
1189
1190 /* polysilicon 1 arc */
1191 static TECH_ARCLAY mocmossub_al_p1[] = {{LPOLY1,0,FILLED }};
1192 static TECH_ARCS mocmossub_a_po1 = {
1193 x_("Polysilicon-1"),K2,APOLY1,NOARCPROTO, /* name */
1194 1,mocmossub_al_p1, /* layers */
1195 (APPOLY1<<AFUNCTIONSH)|WANTFIXANG|CANWIPE|(90<<AANGLEINCSH)}; /* userbits */
1196
1197 /* polysilicon 2 arc */
1198 static TECH_ARCLAY mocmossub_al_p2[] = {{LPOLY2,0,FILLED }};
1199 static TECH_ARCS mocmossub_a_po2 = {
1200 x_("Polysilicon-2"),K3,APOLY2,NOARCPROTO, /* name */
1201 1,mocmossub_al_p2, /* layers */
1202 (APPOLY2<<AFUNCTIONSH)|WANTFIXANG|CANWIPE|(90<<AANGLEINCSH)}; /* userbits */
1203
1204 /* P-active arc */
1205 static TECH_ARCLAY mocmossub_al_pa[] = {{LSACT,K12,FILLED}, {LWELLN,0,FILLED},
1206 {LSELECTP,K8,FILLED}};
1207 static TECH_ARCS mocmossub_a_pa = {
1208 x_("P-Active"),K15,ASACT,NOARCPROTO, /* name */
1209 3,mocmossub_al_pa, /* layers */
1210 (APDIFFP<<AFUNCTIONSH)|WANTFIXANG|CANWIPE|(90<<AANGLEINCSH)}; /* userbits */
1211
1212 /* N-active arc */
1213 static TECH_ARCLAY mocmossub_al_na[] = {{LDACT,K12,FILLED}, {LWELLP,0,FILLED},
1214 {LSELECTN,K8,FILLED}};
1215 static TECH_ARCS mocmossub_a_na = {
1216 x_("N-Active"),K15,ADACT,NOARCPROTO, /* name */
1217 3,mocmossub_al_na, /* layers */
1218 (APDIFFN<<AFUNCTIONSH)|WANTFIXANG|CANWIPE|(90<<AANGLEINCSH)}; /* userbits */
1219
1220 /* General active arc */
1221 static TECH_ARCLAY mocmossub_al_a[] = {{LDACT,0,FILLED}, {LSACT,0,FILLED}};
1222 static TECH_ARCS mocmossub_a_a = {
1223 x_("Active"),K3,AACT,NOARCPROTO, /* name */
1224 2,mocmossub_al_a, /* layers */
1225 (APDIFF<<AFUNCTIONSH)|WANTFIXANG|CANWIPE|(90<<AANGLEINCSH)}; /* userbits */
1226
1227 TECH_ARCS *mocmossub_arcprotos[ARCPROTOCOUNT+1] = {
1228 &mocmossub_a_m1, &mocmossub_a_m2, &mocmossub_a_m3,
1229 &mocmossub_a_m4, &mocmossub_a_m5, &mocmossub_a_m6,
1230 &mocmossub_a_po1, &mocmossub_a_po2,
1231 &mocmossub_a_pa, &mocmossub_a_na,
1232 &mocmossub_a_a, ((TECH_ARCS *)-1)};
1233
1234 static INTBIG mocmossub_arc_widoff[ARCPROTOCOUNT] = {0,0,0,0,0,0, 0,0, K12,K12, 0};
1235
1236 /******************** PORTINST CONNECTIONS ********************/
1237
1238 static INTBIG mocmossub_pc_m1[] = {-1, AMETAL1, ALLGEN, -1};
1239 static INTBIG mocmossub_pc_m1a[] = {-1, AMETAL1, AACT, ALLGEN, -1};
1240 static INTBIG mocmossub_pc_m2[] = {-1, AMETAL2, ALLGEN, -1};
1241 static INTBIG mocmossub_pc_m3[] = {-1, AMETAL3, ALLGEN, -1};
1242 static INTBIG mocmossub_pc_m4[] = {-1, AMETAL4, ALLGEN, -1};
1243 static INTBIG mocmossub_pc_m5[] = {-1, AMETAL5, ALLGEN, -1};
1244 static INTBIG mocmossub_pc_m6[] = {-1, AMETAL6, ALLGEN, -1};
1245 static INTBIG mocmossub_pc_p1[] = {-1, APOLY1, ALLGEN, -1};
1246 static INTBIG mocmossub_pc_p2[] = {-1, APOLY2, ALLGEN, -1};
1247 static INTBIG mocmossub_pc_pa[] = {-1, ASACT, ALLGEN, -1};
1248 static INTBIG mocmossub_pc_a[] = {-1, AACT, ASACT, ADACT, ALLGEN,-1};
1249 static INTBIG mocmossub_pc_na[] = {-1, ADACT, ALLGEN, -1};
1250 static INTBIG mocmossub_pc_pam1[] = {-1, ASACT, AMETAL1, ALLGEN, -1};
1251 static INTBIG mocmossub_pc_nam1[] = {-1, ADACT, AMETAL1, ALLGEN, -1};
1252 static INTBIG mocmossub_pc_pm1[] = {-1, APOLY1, AMETAL1, ALLGEN, -1};
1253 static INTBIG mocmossub_pc_pm2[] = {-1, APOLY2, AMETAL1, ALLGEN, -1};
1254 static INTBIG mocmossub_pc_pm12[] = {-1, APOLY1, APOLY2, AMETAL1, ALLGEN, -1};
1255 static INTBIG mocmossub_pc_m1m2[] = {-1, AMETAL1, AMETAL2, ALLGEN, -1};
1256 static INTBIG mocmossub_pc_m2m3[] = {-1, AMETAL2, AMETAL3, ALLGEN, -1};
1257 static INTBIG mocmossub_pc_m3m4[] = {-1, AMETAL3, AMETAL4, ALLGEN, -1};
1258 static INTBIG mocmossub_pc_m4m5[] = {-1, AMETAL4, AMETAL5, ALLGEN, -1};
1259 static INTBIG mocmossub_pc_m5m6[] = {-1, AMETAL5, AMETAL6, ALLGEN, -1};
1260 static INTBIG mocmossub_pc_null[] = {-1, ALLGEN, -1};
1261
1262 /******************** NODES ********************/
1263
1264 #define NODEPROTOCOUNT 50
1265 #define NMETAL1P 1 /* metal-1 pin */
1266 #define NMETAL2P 2 /* metal-2 pin */
1267 #define NMETAL3P 3 /* metal-3 pin */
1268 #define NMETAL4P 4 /* metal-4 pin */
1269 #define NMETAL5P 5 /* metal-5 pin */
1270 #define NMETAL6P 6 /* metal-6 pin */
1271 #define NPOLY1P 7 /* polysilicon-1 pin */
1272 #define NPOLY2P 8 /* polysilicon-2 pin */
1273 #define NSACTP 9 /* P-active (or N) pin */
1274 #define NDACTP 10 /* N-active (or P) pin */
1275 #define NACTP 11 /* General active pin */
1276 #define NMETSACTC 12 /* metal-1-P-active (or N) contact */
1277 #define NMETDACTC 13 /* metal-1-N-active (or P) contact */
1278 #define NMETPOLY1C 14 /* metal-1-polysilicon-1 contact */
1279 #define NMETPOLY2C 15 /* metal-1-polysilicon-2 contact */
1280 #define NMETPOLY12C 16 /* metal-1-polysilicon-1-2 capacitor/contact */
1281 #define NSTRANS 17 /* P-transistor (or N) */
1282 #define NDTRANS 18 /* N-transistor (or P) */
1283 #define NVIA1 19 /* metal-1-metal-2 contact */
1284 #define NVIA2 20 /* metal-2-metal-3 contact */
1285 #define NVIA3 21 /* metal-3-metal-4 contact */
1286 #define NVIA4 22 /* metal-4-metal-5 contact */
1287 #define NVIA5 23 /* metal-5-metal-6 contact */
1288 #define NWBUT 24 /* metal-1-Well contact */
1289 #define NSBUT 25 /* metal-1-Substrate contact */
1290 #define NMETAL1N 26 /* metal-1 node */
1291 #define NMETAL2N 27 /* metal-2 node */
1292 #define NMETAL3N 28 /* metal-3 node */
1293 #define NMETAL4N 29 /* metal-4 node */
1294 #define NMETAL5N 30 /* metal-5 node */
1295 #define NMETAL6N 31 /* metal-6 node */
1296 #define NPOLY1N 32 /* polysilicon-1 node */
1297 #define NPOLY2N 33 /* polysilicon-2 node */
1298 #define NACTIVEN 34 /* active(P) node */
1299 #define NDACTIVEN 35 /* N-active node */
1300 #define NSELECTPN 36 /* P-select node */
1301 #define NSELECTNN 37 /* N-select node */
1302 #define NPCUTN 38 /* poly cut node */
1303 #define NACUTN 39 /* active cut node */
1304 #define NVIA1N 40 /* via-1 node */
1305 #define NVIA2N 41 /* via-2 node */
1306 #define NVIA3N 42 /* via-3 node */
1307 #define NVIA4N 43 /* via-4 node */
1308 #define NVIA5N 44 /* via-5 node */
1309 #define NWELLPN 45 /* P-well node */
1310 #define NWELLNN 46 /* N-well node */
1311 #define NPASSN 47 /* passivation node */
1312 #define NPADFRN 48 /* pad frame node */
1313 #define NPOLYCAPN 49 /* polysilicon-capacitor node */
1314 #define NPACTWELLN 50 /* P-active-Well node */
1315
1316 /* for geometry */
1317 static INTBIG mocmossub_cutbox[8] = {LEFTIN1, BOTIN1, LEFTIN3, BOTIN3};/*adjust*/
1318 static INTBIG mocmossub_fullbox[8] = {LEFTEDGE, BOTEDGE, RIGHTEDGE, TOPEDGE};
1319 static INTBIG mocmossub_in0hbox[8] = {LEFTIN0H, BOTIN0H, RIGHTIN0H, TOPIN0H};
1320 static INTBIG mocmossub_in1box[8] = {LEFTIN1, BOTIN1, RIGHTIN1, TOPIN1};
1321 static INTBIG mocmossub_in2box[8] = {LEFTIN2, BOTIN2, RIGHTIN2, TOPIN2};
1322 static INTBIG mocmossub_in4box[8] = {LEFTIN4, BOTIN4, RIGHTIN4, TOPIN4};
1323 static INTBIG mocmossub_in6box[8] = {LEFTIN6, BOTIN6, RIGHTIN6, TOPIN6};
1324 static INTBIG mocmossub_in6hbox[8] = {LEFTIN6H, BOTIN6H, RIGHTIN6H, TOPIN6H};
1325 static INTBIG mocmossub_min5box[16]= {LEFTIN5, BOTIN5, RIGHTIN5, TOPIN5,
1326 CENTERL2, CENTERD2, CENTERR2, CENTERU2};
1327 static INTBIG mocmossub_trnpbox[8] = {LEFTIN3H, BOTIN9, RIGHTIN3H, TOPIN9};
1328 static INTBIG mocmossub_trd1box[8] = {LEFTIN6, BOTIN9, RIGHTIN6, TOPIN9};
1329 static INTBIG mocmossub_trna2box[8]= {LEFTIN6, TOPIN9, RIGHTIN6, TOPIN6};
1330 static INTBIG mocmossub_trna3box[8]= {LEFTIN6, BOTIN6, RIGHTIN6, BOTIN9};
1331
1332 /* metal-1-pin */
1333 static TECH_PORTS mocmossub_pm1_p[] = { /* ports */
1334 {mocmossub_pc_m1, x_("metal-1"), NOPORTPROTO, (180<<PORTARANGESH),
1335 LEFTIN1H, BOTIN1H, RIGHTIN1H, TOPIN1H}};
1336 static TECH_POLYGON mocmossub_pm1_l[] = { /* layers */
1337 {LMET1P, 0, 4, CROSSED, BOX, mocmossub_fullbox}};
1338 static TECH_NODES mocmossub_pm1 = {
1339 x_("Metal-1-Pin"),NMETAL1P,NONODEPROTO, /* name */
1340 K3,K3, /* size */
1341 1,mocmossub_pm1_p, /* ports */
1342 1,mocmossub_pm1_l, /* layers */
1343 (NPPIN<<NFUNCTIONSH)|ARCSWIPE|ARCSHRINK, /* userbits */
1344 0,0,0,0,0,0,0,0,0}; /* characteristics */
1345
1346 /* metal-2-pin */
1347 static TECH_PORTS mocmossub_pm2_p[] = { /* ports */
1348 {mocmossub_pc_m2, x_("metal-2"), NOPORTPROTO, (180<<PORTARANGESH),
1349 LEFTIN1H, BOTIN1H, RIGHTIN1H, TOPIN1H}};
1350 static TECH_POLYGON mocmossub_pm2_l[] = { /* layers */
1351 {LMET2P, 0, 4, CROSSED, BOX, mocmossub_fullbox}};
1352 static TECH_NODES mocmossub_pm2 = {
1353 x_("Metal-2-Pin"),NMETAL2P,NONODEPROTO, /* name */
1354 K3,K3, /* size */
1355 1,mocmossub_pm2_p, /* ports */
1356 1,mocmossub_pm2_l, /* layers */
1357 (NPPIN<<NFUNCTIONSH)|ARCSWIPE|ARCSHRINK, /* userbits */
1358 0,0,0,0,0,0,0,0,0}; /* characteristics */
1359
1360 /* metal-3-pin */
1361 static TECH_PORTS mocmossub_pm3_p[] = { /* ports */
1362 {mocmossub_pc_m3, x_("metal-3"), NOPORTPROTO, (180<<PORTARANGESH),
1363 LEFTIN1H, BOTIN1H, RIGHTIN1H, TOPIN1H}};
1364 static TECH_POLYGON mocmossub_pm3_l[] = { /* layers */
1365 {LMET3P, 0, 4, CROSSED, BOX, mocmossub_fullbox}};
1366 static TECH_NODES mocmossub_pm3 = {
1367 x_("Metal-3-Pin"),NMETAL3P,NONODEPROTO, /* name */
1368 K3,K3, /* size */
1369 1,mocmossub_pm3_p, /* ports */
1370 1,mocmossub_pm3_l, /* layers */
1371 (NPPIN<<NFUNCTIONSH)|ARCSWIPE|ARCSHRINK, /* userbits */
1372 0,0,0,0,0,0,0,0,0}; /* characteristics */
1373
1374 /* metal-4-pin */
1375 static TECH_PORTS mocmossub_pm4_p[] = { /* ports */
1376 {mocmossub_pc_m4, x_("metal-4"), NOPORTPROTO, (180<<PORTARANGESH),
1377 LEFTIN1H, BOTIN1H, RIGHTIN1H, TOPIN1H}};
1378 static TECH_POLYGON mocmossub_pm4_l[] = { /* layers */
1379 {LMET4P, 0, 4, CROSSED, BOX, mocmossub_fullbox}};
1380 static TECH_NODES mocmossub_pm4 = {
1381 x_("Metal-4-Pin"),NMETAL4P,NONODEPROTO, /* name */
1382 K3,K3, /* size */
1383 1,mocmossub_pm4_p, /* ports */
1384 1,mocmossub_pm4_l, /* layers */
1385 (NPPIN<<NFUNCTIONSH)|ARCSWIPE|ARCSHRINK, /* userbits */
1386 0,0,0,0,0,0,0,0,0}; /* characteristics */
1387
1388 /* metal-5-pin */
1389 static TECH_PORTS mocmossub_pm5_p[] = { /* ports */
1390 {mocmossub_pc_m5, x_("metal-5"), NOPORTPROTO, (180<<PORTARANGESH),
1391 LEFTIN1H, BOTIN1H, RIGHTIN1H, TOPIN1H}};
1392 static TECH_POLYGON mocmossub_pm5_l[] = { /* layers */
1393 {LMET5P, 0, 4, CROSSED, BOX, mocmossub_fullbox}};
1394 static TECH_NODES mocmossub_pm5 = {
1395 x_("Metal-5-Pin"),NMETAL5P,NONODEPROTO, /* name */
1396 K3,K3, /* size */
1397 1,mocmossub_pm5_p, /* ports */
1398 1,mocmossub_pm5_l, /* layers */
1399 (NPPIN<<NFUNCTIONSH)|ARCSWIPE|ARCSHRINK|NNOTUSED, /* userbits */
1400 0,0,0,0,0,0,0,0,0}; /* characteristics */
1401
1402 /* metal-6-pin */
1403 static TECH_PORTS mocmossub_pm6_p[] = { /* ports */
1404 {mocmossub_pc_m6, x_("metal-6"), NOPORTPROTO, (180<<PORTARANGESH),
1405 LEFTIN1H, BOTIN1H, RIGHTIN1H, TOPIN1H}};
1406 static TECH_POLYGON mocmossub_pm6_l[] = { /* layers */
1407 {LMET6P, 0, 4, CROSSED, BOX, mocmossub_fullbox}};
1408 static TECH_NODES mocmossub_pm6 = {
1409 x_("Metal-6-Pin"),NMETAL6P,NONODEPROTO, /* name */
1410 K3,K3, /* size */
1411 1,mocmossub_pm6_p, /* ports */
1412 1,mocmossub_pm6_l, /* layers */
1413 (NPPIN<<NFUNCTIONSH)|ARCSWIPE|ARCSHRINK|NNOTUSED, /* userbits */
1414 0,0,0,0,0,0,0,0,0}; /* characteristics */
1415
1416 /* polysilicon-1-pin */
1417 static TECH_PORTS mocmossub_pp1_p[] = { /* ports */
1418 {mocmossub_pc_p1, x_("polysilicon-1"), NOPORTPROTO, (180<<PORTARANGESH),
1419 LEFTIN1, BOTIN1, RIGHTIN1, TOPIN1}};
1420 static TECH_POLYGON mocmossub_pp1_l[] = { /* layers */
1421 {LPOLY1P, 0, 4, CROSSED, BOX, mocmossub_fullbox}};
1422 static TECH_NODES mocmossub_pp1 = {
1423 x_("Polysilicon-1-Pin"),NPOLY1P,NONODEPROTO, /* name */
1424 K2,K2, /* size */
1425 1,mocmossub_pp1_p, /* ports */
1426 1,mocmossub_pp1_l, /* layers */
1427 (NPPIN<<NFUNCTIONSH)|ARCSWIPE|ARCSHRINK, /* userbits */
1428 0,0,0,0,0,0,0,0,0}; /* characteristics */
1429
1430 /* polysilicon-2-pin */
1431 static TECH_PORTS mocmossub_pp2_p[] = { /* ports */
1432 {mocmossub_pc_p2, x_("polysilicon-2"), NOPORTPROTO, (180<<PORTARANGESH),
1433 LEFTIN1H, BOTIN1H, RIGHTIN1H, TOPIN1H}};
1434 static TECH_POLYGON mocmossub_pp2_l[] = { /* layers */
1435 {LPOLY2P, 0, 4, CROSSED, BOX, mocmossub_fullbox}};
1436 static TECH_NODES mocmossub_pp2 = {
1437 x_("Polysilicon-2-Pin"),NPOLY2P,NONODEPROTO, /* name */
1438 K3,K3, /* size */
1439 1,mocmossub_pp2_p, /* ports */
1440 1,mocmossub_pp2_l, /* layers */
1441 (NPPIN<<NFUNCTIONSH)|ARCSWIPE|ARCSHRINK, /* userbits */
1442 0,0,0,0,0,0,0,0,0}; /* characteristics */
1443
1444 /* P-active-pin (or N) */
1445 static TECH_PORTS mocmossub_psa_p[] = { /* ports */
1446 {mocmossub_pc_pa, x_("p-active"), NOPORTPROTO, (180<<PORTARANGESH),
1447 LEFTIN7H, BOTIN7H, RIGHTIN7H, TOPIN7H}};
1448 static TECH_POLYGON mocmossub_psa_l[] = { /* layers */
1449 {LSACTP, 0, 4, CROSSED, BOX, mocmossub_in6box},
1450 {LWELLNP, -1, 4, CROSSED, BOX, mocmossub_fullbox},
1451 {LSELECTPP,-1, 4, CROSSED, BOX, mocmossub_in4box}};
1452 static TECH_NODES mocmossub_psa = {
1453 x_("P-Active-Pin"),NSACTP,NONODEPROTO, /* name */
1454 K15,K15, /* size */
1455 1,mocmossub_psa_p, /* ports */
1456 3,mocmossub_psa_l, /* layers */
1457 (NPPIN<<NFUNCTIONSH)|ARCSWIPE|ARCSHRINK, /* userbits */
1458 0,0,0,0,0,0,0,0,0}; /* characteristics */
1459
1460 /* N-active-pin (or P) */
1461 static TECH_PORTS mocmossub_pda_p[] = { /* ports */
1462 {mocmossub_pc_na, x_("n-active"), NOPORTPROTO, (180<<PORTARANGESH),
1463 LEFTIN7H, BOTIN7H, RIGHTIN7H, TOPIN7H}};
1464 static TECH_POLYGON mocmossub_pda_l[] = { /* layers */
1465 {LDACTP, 0, 4, CROSSED, BOX, mocmossub_in6box},
1466 {LWELLPP, -1, 4, CROSSED, BOX, mocmossub_fullbox},
1467 {LSELECTNP,-1, 4, CROSSED, BOX, mocmossub_in4box}};
1468 static TECH_NODES mocmossub_pda = {
1469 x_("N-Active-Pin"),NDACTP,NONODEPROTO, /* name */
1470 K15,K15, /* size */
1471 1,mocmossub_pda_p, /* ports */
1472 3,mocmossub_pda_l, /* layers */
1473 (NPPIN<<NFUNCTIONSH)|ARCSWIPE|ARCSHRINK, /* userbits */
1474 0,0,0,0,0,0,0,0,0}; /* characteristics */
1475
1476 /* General active-pin */
1477 static TECH_PORTS mocmossub_pa_p[] = { /* ports */
1478 {mocmossub_pc_a, x_("active"), NOPORTPROTO, (180<<PORTARANGESH),
1479 LEFTIN1H, BOTIN1H, RIGHTIN1H, TOPIN1H}} ;
1480 static TECH_POLYGON mocmossub_pa_l[] = { /* layers */
1481 {LDACTP, 0, 4, CROSSED, BOX, mocmossub_fullbox},
1482 {LSACTP, 0, 4, CROSSED, BOX, mocmossub_fullbox}};
1483 static TECH_NODES mocmossub_pa = {
1484 x_("Active-Pin"),NACTP,NONODEPROTO, /* name */
1485 K3,K3, /* size */
1486 1,mocmossub_pa_p, /* ports */
1487 2,mocmossub_pa_l, /* layers */
1488 (NPPIN<<NFUNCTIONSH)|ARCSWIPE|ARCSHRINK, /* userbits */
1489 0,0,0,0,0,0,0,0,0}; /* characteristics */
1490
1491 /* metal-1-P-active-contact (or N) */
1492 static TECH_PORTS mocmossub_mpa_p[] = { /* ports */
1493 {mocmossub_pc_pam1, x_("metal-1-p-act"), NOPORTPROTO, (180<<PORTARANGESH),
1494 LEFTIN8, BOTIN8, RIGHTIN8, TOPIN8}};
1495 static TECH_POLYGON mocmossub_mpa_l[] = { /* layers */
1496 {LMETAL1, 0, 4, FILLEDRECT, BOX, mocmossub_in6hbox},
1497 {LSACT, 0, 4, FILLEDRECT, BOX, mocmossub_in6box},
1498 {LWELLN, -1, 4, FILLEDRECT, BOX, mocmossub_fullbox},
1499 {LSELECTP,-1, 4, FILLEDRECT, BOX, mocmossub_in4box},
1500 {LACTCUT, 0, 4, FILLEDRECT, BOX, mocmossub_cutbox}};
1501 static TECH_NODES mocmossub_mpa = {
1502 x_("Metal-1-P-Active-Con"),NMETSACTC,NONODEPROTO, /* name */
1503 K17,K17, /* size */
1504 1,mocmossub_mpa_p, /* ports */
1505 5,mocmossub_mpa_l, /* layers */
1506 (NPCONTACT<<NFUNCTIONSH), /* userbits */
1507 MULTICUT,K2,K2,H1,K4,0,0,0,0}; /* characteristics */
1508
1509 /* metal-1-N-active-contact (or P) */
1510 static TECH_PORTS mocmossub_mna_p[] = { /* ports */
1511 {mocmossub_pc_nam1, x_("metal-1-n-act"), NOPORTPROTO, (180<<PORTARANGESH),
1512 LEFTIN8, BOTIN8, RIGHTIN8, TOPIN8}};
1513 static TECH_POLYGON mocmossub_mna_l[] = { /* layers */
1514 {LMETAL1, 0, 4, FILLEDRECT, BOX, mocmossub_in6hbox},
1515 {LDACT, 0, 4, FILLEDRECT, BOX, mocmossub_in6box},
1516 {LWELLP, -1, 4, FILLEDRECT, BOX, mocmossub_fullbox},
1517 {LSELECTN, -1, 4, FILLEDRECT, BOX, mocmossub_in4box},
1518 {LACTCUT, 0, 4, FILLEDRECT, BOX, mocmossub_cutbox}};
1519 static TECH_NODES mocmossub_mna = {
1520 x_("Metal-1-N-Active-Con"),NMETDACTC,NONODEPROTO, /* name */
1521 K17,K17, /* size */
1522 1,mocmossub_mna_p, /* ports */
1523 5,mocmossub_mna_l, /* layers */
1524 (NPCONTACT<<NFUNCTIONSH), /* userbits */
1525 MULTICUT,K2,K2,H1,K4,0,0,0,0}; /* characteristics */
1526
1527 /* metal-1-polysilicon-1-contact */
1528 static TECH_PORTS mocmossub_mp1_p[] = { /* ports */
1529 {mocmossub_pc_pm1, x_("metal-1-polysilicon-1"), NOPORTPROTO, (180<<PORTARANGESH),
1530 LEFTIN2, BOTIN2, RIGHTIN2, TOPIN2}};
1531 static TECH_POLYGON mocmossub_mp1_l[] = { /* layers */
1532 {LMETAL1, 0, 4, FILLEDRECT, BOX, mocmossub_in0hbox},
1533 {LPOLY1, 0, 4, FILLEDRECT, BOX, mocmossub_fullbox},
1534 {LPOLYCUT, 0, 4, FILLEDRECT, BOX, mocmossub_cutbox}};
1535 static TECH_NODES mocmossub_mp1 = {
1536 x_("Metal-1-Polysilicon-1-Con"),NMETPOLY1C,NONODEPROTO,/* name */
1537 K5,K5, /* size */
1538 1,mocmossub_mp1_p, /* ports */
1539 3,mocmossub_mp1_l, /* layers */
1540 (NPCONTACT<<NFUNCTIONSH), /* userbits */
1541 MULTICUT,K2,K2,H1,K4,0,0,0,0}; /* characteristics */
1542
1543 /* metal-1-polysilicon-2-contact */
1544 static TECH_PORTS mocmossub_mp2_p[] = { /* ports */
1545 {mocmossub_pc_pm2, x_("metal-1-polysilicon-2"), NOPORTPROTO, (180<<PORTARANGESH),
1546 LEFTIN1H, BOTIN1H, RIGHTIN1H, TOPIN1H}};
1547 static TECH_POLYGON mocmossub_mp2_l[] = { /* layers */
1548 {LMETAL1, 0, 4, FILLEDRECT, BOX, mocmossub_fullbox},
1549 {LPOLY2, 0, 4, FILLEDRECT, BOX, mocmossub_in0hbox},
1550 {LPOLYCUT, 0, 4, FILLEDRECT, BOX, mocmossub_cutbox}};
1551 static TECH_NODES mocmossub_mp2 = {
1552 x_("Metal-1-Polysilicon-2-Con"),NMETPOLY2C,NONODEPROTO,/* name */
1553 K4,K4, /* size */
1554 1,mocmossub_mp2_p, /* ports */
1555 3,mocmossub_mp2_l, /* layers */
1556 (NPCONTACT<<NFUNCTIONSH), /* userbits */
1557 MULTICUT,K2,K2,K1,K4,0,0,0,0}; /* characteristics */
1558
1559 /* metal-1-polysilicon-1-2-contact */
1560 static TECH_PORTS mocmossub_mp12_p[] = { /* ports */
1561 {mocmossub_pc_pm12, x_("metal-1-polysilicon-1-2"), NOPORTPROTO, (180<<PORTARANGESH),
1562 CENTER, CENTER, CENTER, CENTER}};
1563 static TECH_POLYGON mocmossub_mp12_l[] = { /* layers */
1564 {LPOLY1, 0, 4, FILLEDRECT, BOX, mocmossub_fullbox},
1565 {LPOLY2, 0, 4, FILLEDRECT, BOX, mocmossub_in2box},
1566 {LPOLYCUT, 0, 4, FILLEDRECT, BOX, mocmossub_cutbox}};
1567 static TECH_NODES mocmossub_mp12 = {
1568 x_("Metal-1-Polysilicon-1-2-Con"),NMETPOLY12C,NONODEPROTO,/* name */
1569 K7,K7, /* size */
1570 1,mocmossub_mp12_p, /* ports */
1571 3,mocmossub_mp12_l, /* layers */
1572 (NPCONTACT<<NFUNCTIONSH), /* userbits */
1573 MULTICUT,K2,K2,H2,K4,0,0,0,0}; /* characteristics */
1574
1575 /* P-transistor (or N) */
1576 static TECH_PORTS mocmossub_tpa_p[] = { /* ports */
1577 {mocmossub_pc_p1, x_("p-trans-poly-left"), NOPORTPROTO, (180<<PORTANGLESH)|
1578 (90<<PORTARANGESH), LEFTIN4, BOTIN10, LEFTIN4, TOPIN10},
1579 {mocmossub_pc_pa, x_("p-trans-diff-top"), NOPORTPROTO, (90<<PORTANGLESH)|
1580 (90<<PORTARANGESH)|(1<<PORTNETSH), LEFTIN7H, TOPIN6H, RIGHTIN7H, TOPIN6},
1581 {mocmossub_pc_p1, x_("p-trans-poly-right"), NOPORTPROTO, (0<<PORTANGLESH)|
1582 (90<<PORTARANGESH), RIGHTIN4, BOTIN10, RIGHTIN4, TOPIN10},
1583 {mocmossub_pc_pa, x_("p-trans-diff-bottom"),NOPORTPROTO, (270<<PORTANGLESH)|
1584 (90<<PORTARANGESH)|(2<<PORTNETSH), LEFTIN7H, BOTIN6, RIGHTIN7H, BOTIN6H}};
1585 static TECH_SERPENT mocmossub_tpa_l[] = { /* graphical layers */
1586 {{LSACT, 1, 4, FILLEDRECT, BOX, mocmossub_in6box}, K4, K4, 0, 0},
1587 {{LPOLY1, 0, 4, FILLEDRECT, BOX, mocmossub_trnpbox}, K1, K1, H2, H2},
1588 {{LWELLN, -1, 4, FILLEDRECT, BOX, mocmossub_fullbox}, K10,K10,K6, K6},
1589 {{LSELECTP,-1, 4, FILLEDRECT, BOX, mocmossub_in4box}, K6, K6, K2, K2},
1590 {{LTRANS, -1, 4, FILLEDRECT, BOX, mocmossub_trd1box}, K1, K1, 0, 0}};
1591 static TECH_SERPENT mocmossub_tpaE_l[] = { /* electric layers */
1592 {{LSACT, 1, 4, FILLEDRECT, BOX, mocmossub_trna2box}, K4,-K1, 0, 0},
1593 {{LSACT, 3, 4, FILLEDRECT, BOX, mocmossub_trna3box},-K1, K4, 0, 0},
1594 {{LPOLY1, 0, 4, FILLEDRECT, BOX, mocmossub_trnpbox}, K1, K1, H2, H2},
1595 {{LWELLN, -1, 4, FILLEDRECT, BOX, mocmossub_fullbox}, K10,K10,K6, K6},
1596 {{LSELECTP,-1, 4, FILLEDRECT, BOX, mocmossub_in4box}, K6, K6, K2, K2},
1597 {{LTRANS, -1, 4, FILLEDRECT, BOX, mocmossub_trd1box}, K1, K1, 0, 0}};
1598 static TECH_NODES mocmossub_tpa = {
1599 x_("P-Transistor"),NSTRANS,NONODEPROTO, /* name */
1600 K15,K20, /* size */
1601 4,mocmossub_tpa_p, /* ports */
1602 5,(TECH_POLYGON *)0, /* layers */
1603 NODESHRINK|(NPTRAPMOS<<NFUNCTIONSH)|HOLDSTRACE, /* userbits */
1604 SERPTRANS,6,H1,H2,K2,K1,K2,mocmossub_tpa_l,mocmossub_tpaE_l};/* characteristics */
1605
1606 /* N-transistor (or P) */
1607 static TECH_PORTS mocmossub_tna_p[] = { /* ports */
1608 {mocmossub_pc_p1, x_("n-trans-poly-left"), NOPORTPROTO, (180<<PORTANGLESH)|
1609 (90<<PORTARANGESH), LEFTIN4, BOTIN10, LEFTIN4, TOPIN10},
1610 {mocmossub_pc_na, x_("n-trans-diff-top"), NOPORTPROTO, (90<<PORTANGLESH)|
1611 (90<<PORTARANGESH)|(1<<PORTNETSH), LEFTIN7H, TOPIN6H, RIGHTIN7H, TOPIN6},
1612 {mocmossub_pc_p1, x_("n-trans-poly-right"), NOPORTPROTO, (0<<PORTANGLESH)|
1613 (90<<PORTARANGESH), RIGHTIN4, BOTIN10, RIGHTIN4, TOPIN10},
1614 {mocmossub_pc_na, x_("n-trans-diff-bottom"),NOPORTPROTO, (270<<PORTANGLESH)|
1615 (90<<PORTARANGESH)|(2<<PORTNETSH), LEFTIN7H, BOTIN6, RIGHTIN7H, BOTIN6H}};
1616 static TECH_SERPENT mocmossub_tna_l[] = { /* graphical layers */
1617 {{LDACT, 1, 4, FILLEDRECT, BOX, mocmossub_in6box}, K4, K4, 0, 0},
1618 {{LPOLY1, 0, 4, FILLEDRECT, BOX, mocmossub_trnpbox}, K1, K1, H2, H2},
1619 {{LWELLP, -1, 4, FILLEDRECT, BOX, mocmossub_fullbox}, K10,K10,K6, K6},
1620 {{LSELECTN, -1, 4, FILLEDRECT, BOX, mocmossub_in4box}, K6, K6, K2, K2},
1621 {{LTRANS, -1, 4, FILLEDRECT, BOX, mocmossub_trd1box}, K1, K1, 0, 0}};
1622 static TECH_SERPENT mocmossub_tnaE_l[] = { /* electric layers */
1623 {{LDACT, 1, 4, FILLEDRECT, BOX, mocmossub_trna2box}, K4,-K1, 0, 0},
1624 {{LDACT, 3, 4, FILLEDRECT, BOX, mocmossub_trna3box},-K1, K4, 0, 0},
1625 {{LPOLY1, 0, 4, FILLEDRECT, BOX, mocmossub_trnpbox}, K1, K1, H2, H2},
1626 {{LWELLP, -1, 4, FILLEDRECT, BOX, mocmossub_fullbox}, K10,K10,K6, K6},
1627 {{LSELECTN, -1, 4, FILLEDRECT, BOX, mocmossub_in4box}, K6, K6, K2, K2},
1628 {{LTRANS, -1, 4, FILLEDRECT, BOX, mocmossub_trd1box}, K1, K1, 0, 0}};
1629 static TECH_NODES mocmossub_tna = {
1630 x_("N-Transistor"),NDTRANS,NONODEPROTO, /* name */
1631 K15,K20, /* size */
1632 4,mocmossub_tna_p, /* ports */
1633 5,(TECH_POLYGON *)0, /* layers */
1634 NODESHRINK|(NPTRANMOS<<NFUNCTIONSH)|HOLDSTRACE, /* userbits */
1635 SERPTRANS,6,H1,H2,K2,K1,K2,mocmossub_tna_l,mocmossub_tnaE_l};/* characteristics */
1636
1637 /* metal-1-metal-2-contact */
1638 static TECH_PORTS mocmossub_m1m2_p[] = { /* ports */
1639 {mocmossub_pc_m1m2, x_("metal-1-metal-2"), NOPORTPROTO, (180<<PORTARANGESH),
1640 LEFTIN1H, BOTIN1H, RIGHTIN1H, TOPIN1H}};
1641 static TECH_POLYGON mocmossub_m1m2_l[] = { /* layers */
1642 {LMETAL1, 0, 4, FILLEDRECT, BOX, mocmossub_fullbox},
1643 {LMETAL2, 0, 4, FILLEDRECT, BOX, mocmossub_fullbox},
1644 {LVIA1, 0, 4, FILLEDRECT, BOX, mocmossub_cutbox}};
1645 static TECH_NODES mocmossub_m1m2 = {
1646 x_("Metal-1-Metal-2-Con"),NVIA1,NONODEPROTO, /* name */
1647 K4,K4, /* size */
1648 1,mocmossub_m1m2_p, /* ports */
1649 3,mocmossub_m1m2_l, /* layers */
1650 (NPCONTACT<<NFUNCTIONSH), /* userbits */
1651 MULTICUT,K2,K2,K1,K4,0,0,0,0}; /* characteristics */
1652
1653 /* metal-2-metal-3-contact */
1654 static TECH_PORTS mocmossub_m2m3_p[] = { /* ports */
1655 {mocmossub_pc_m2m3, x_("metal-2-metal-3"), NOPORTPROTO, (180<<PORTARANGESH),
1656 LEFTIN2H, BOTIN2H, RIGHTIN2H, TOPIN2H}};
1657 static TECH_POLYGON mocmossub_m2m3_l[] = { /* layers */
1658 {LMETAL2, 0, 4, FILLEDRECT, BOX, mocmossub_in1box},
1659 {LMETAL3, 0, 4, FILLEDRECT, BOX, mocmossub_in1box},
1660 {LVIA2, 0, 4, FILLEDRECT, BOX, mocmossub_cutbox}};
1661 static TECH_NODES mocmossub_m2m3 = {
1662 x_("Metal-2-Metal-3-Con"),NVIA2,NONODEPROTO, /* name */
1663 K6,K6, /* size */
1664 1,mocmossub_m2m3_p, /* ports */
1665 3,mocmossub_m2m3_l, /* layers */
1666 (NPCONTACT<<NFUNCTIONSH), /* userbits */
1667 MULTICUT,K2,K2,K1,K4,0,0,0,0}; /* characteristics */
1668
1669 /* metal-3-metal-4-contact */
1670 static TECH_PORTS mocmossub_m3m4_p[] = { /* ports */
1671 {mocmossub_pc_m3m4, x_("metal-3-metal-4"), NOPORTPROTO, (180<<PORTARANGESH),
1672 LEFTIN2H, BOTIN2H, RIGHTIN2H, TOPIN2H}};
1673 static TECH_POLYGON mocmossub_m3m4_l[] = { /* layers */
1674 {LMETAL3, 0, 4, FILLEDRECT, BOX, mocmossub_in1box},
1675 {LMETAL4, 0, 4, FILLEDRECT, BOX, mocmossub_fullbox},
1676 {LVIA3, 0, 4, FILLEDRECT, BOX, mocmossub_cutbox}};
1677 static TECH_NODES mocmossub_m3m4 = {
1678 x_("Metal-3-Metal-4-Con"),NVIA3,NONODEPROTO, /* name */
1679 K6,K6, /* size */
1680 1,mocmossub_m3m4_p, /* ports */
1681 3,mocmossub_m3m4_l, /* layers */
1682 (NPCONTACT<<NFUNCTIONSH), /* userbits */
1683 MULTICUT,K2,K2,K2,K4,0,0,0,0}; /* characteristics */
1684
1685 /* metal-4-metal-5-contact */
1686 static TECH_PORTS mocmossub_m4m5_p[] = { /* ports */
1687 {mocmossub_pc_m4m5, x_("metal-4-metal-5"), NOPORTPROTO, (180<<PORTARANGESH),
1688 LEFTIN2H, BOTIN2H, RIGHTIN2H, TOPIN2H}};
1689 static TECH_POLYGON mocmossub_m4m5_l[] = { /* layers */
1690 {LMETAL4, 0, 4, FILLEDRECT, BOX, mocmossub_in1box},
1691 {LMETAL5, 0, 4, FILLEDRECT, BOX, mocmossub_in1box},
1692 {LVIA4, 0, 4, FILLEDRECT, BOX, mocmossub_cutbox}};
1693 static TECH_NODES mocmossub_m4m5 = {
1694 x_("Metal-4-Metal-5-Con"),NVIA4,NONODEPROTO, /* name */
1695 K6,K6, /* size */
1696 1,mocmossub_m4m5_p, /* ports */
1697 3,mocmossub_m4m5_l, /* layers */
1698 (NPCONTACT<<NFUNCTIONSH)|NNOTUSED, /* userbits */
1699 MULTICUT,K2,K2,K1,K4,0,0,0,0}; /* characteristics */
1700
1701 /* metal-5-metal-6-contact */
1702 static TECH_PORTS mocmossub_m5m6_p[] = { /* ports */
1703 {mocmossub_pc_m5m6, x_("metal-5-metal-6"), NOPORTPROTO, (180<<PORTARANGESH),
1704 LEFTIN2H, BOTIN2H, RIGHTIN2H, TOPIN2H}};
1705 static TECH_POLYGON mocmossub_m5m6_l[] = { /* layers */
1706 {LMETAL5, 0, 4, FILLEDRECT, BOX, mocmossub_in1box},
1707 {LMETAL6, 0, 4, FILLEDRECT, BOX, mocmossub_fullbox},
1708 {LVIA5, 0, 4, FILLEDRECT, BOX, mocmossub_cutbox}};
1709 static TECH_NODES mocmossub_m5m6 = {
1710 x_("Metal-5-Metal-6-Con"),NVIA5,NONODEPROTO, /* name */
1711 K6,K6, /* size */
1712 1,mocmossub_m5m6_p, /* ports */
1713 3,mocmossub_m5m6_l, /* layers */
1714 (NPCONTACT<<NFUNCTIONSH)|NNOTUSED, /* userbits */
1715 MULTICUT,K2,K2,K1,K4,0,0,0,0}; /* characteristics */
1716
1717 /* Metal-1-Well Contact */
1718 static TECH_PORTS mocmossub_psub_p[] = { /* ports */
1719 {mocmossub_pc_m1a, x_("metal-1-well"), NOPORTPROTO, (180<<PORTARANGESH),
1720 LEFTIN6H, BOTIN6H, RIGHTIN6H, TOPIN6H}};
1721 static TECH_POLYGON mocmossub_psub_l[] = { /* layers */
1722 {LMETAL1, 0, 4, FILLEDRECT, MINBOX, mocmossub_min5box},
1723 {LSACTWELL, 0, 4, FILLEDRECT, BOX, mocmossub_in4box},
1724 {LWELLP, -1, 4, FILLEDRECT, BOX, mocmossub_fullbox},
1725 {LSELECTP, -1, 4, FILLEDRECT, BOX, mocmossub_in2box},
1726 {LACTCUT, 0, 4, FILLEDRECT, BOX, mocmossub_cutbox}};
1727 static TECH_NODES mocmossub_psub = {
1728 x_("Metal-1-Well-Con"),NWBUT,NONODEPROTO, /* name */
1729 K14,K14, /* size */
1730 1,mocmossub_psub_p, /* ports */
1731 5,mocmossub_psub_l, /* layers */
1732 (NPWELL<<NFUNCTIONSH), /* userbits */
1733 MULTICUT,K2,K2,K2,K4,0,0,0,0}; /* characteristics */
1734
1735 /* Metal-1-Substrate Contact */
1736 static TECH_PORTS mocmossub_nsub_p[] = { /* ports */
1737 {mocmossub_pc_m1a, x_("metal-1-substrate"), NOPORTPROTO, (180<<PORTARANGESH),
1738 LEFTIN6H, BOTIN6H, RIGHTIN6H, TOPIN6H}};
1739 static TECH_POLYGON mocmossub_nsub_l[] = { /* layers */
1740 {LMETAL1, 0, 4, FILLEDRECT, MINBOX, mocmossub_min5box},
1741 {LDACT, 0, 4, FILLEDRECT, BOX, mocmossub_in4box},
1742 {LWELLN, -1, 4, FILLEDRECT, BOX, mocmossub_fullbox},
1743 {LSELECTN, -1, 4, FILLEDRECT, BOX, mocmossub_in2box},
1744 {LACTCUT, 0, 4, FILLEDRECT, BOX, mocmossub_cutbox}};
1745 static TECH_NODES mocmossub_nsub = {
1746 x_("Metal-1-Substrate-Con"),NSBUT,NONODEPROTO, /* name */
1747 K14,K14, /* size */
1748 1,mocmossub_nsub_p, /* ports */
1749 5,mocmossub_nsub_l, /* layers */
1750 (NPSUBSTRATE<<NFUNCTIONSH), /* userbits */
1751 MULTICUT,K2,K2,K2,K4,0,0,0,0}; /* characteristics */
1752
1753 /* Metal-1-Node */
1754 static TECH_PORTS mocmossub_m1_p[] = { /* ports */
1755 {mocmossub_pc_m1, x_("metal-1"), NOPORTPROTO, (180<<PORTARANGESH),
1756 LEFTIN1H, BOTIN1H, RIGHTIN1H, TOPIN1H}};
1757 static TECH_POLYGON mocmossub_m1_l[] = { /* layers */
1758 {LMETAL1, 0, 4, FILLEDRECT, BOX, mocmossub_fullbox}};
1759 static TECH_NODES mocmossub_m1 = {
1760 x_("Metal-1-Node"),NMETAL1N,NONODEPROTO, /* name */
1761 K3,K3, /* size */
1762 1,mocmossub_m1_p, /* ports */
1763 1,mocmossub_m1_l, /* layers */
1764 (NPNODE<<NFUNCTIONSH)|HOLDSTRACE, /* userbits */
1765 POLYGONAL,0,0,0,0,0,0,0,0}; /* characteristics */
1766
1767 /* Metal-2-Node */
1768 static TECH_PORTS mocmossub_m2_p[] = { /* ports */
1769 {mocmossub_pc_m2, x_("metal-2"), NOPORTPROTO, (180<<PORTARANGESH),
1770 LEFTIN1H, BOTIN1H, RIGHTIN1H, TOPIN1H}};
1771 static TECH_POLYGON mocmossub_m2_l[] = { /* layers */
1772 {LMETAL2, 0, 4, FILLEDRECT, BOX, mocmossub_fullbox}};
1773 static TECH_NODES mocmossub_m2 = {
1774 x_("Metal-2-Node"),NMETAL2N,NONODEPROTO, /* name */
1775 K3,K3, /* size */
1776 1,mocmossub_m2_p, /* ports */
1777 1,mocmossub_m2_l, /* layers */
1778 (NPNODE<<NFUNCTIONSH)|HOLDSTRACE, /* userbits */
1779 POLYGONAL,0,0,0,0,0,0,0,0}; /* characteristics */
1780
1781 /* Metal-3-Node */
1782 static TECH_PORTS mocmossub_m3_p[] = { /* ports */
1783 {mocmossub_pc_m3, x_("metal-3"), NOPORTPROTO, (180<<PORTARANGESH),
1784 LEFTIN1H, BOTIN1H, RIGHTIN1H, TOPIN1H}};
1785 static TECH_POLYGON mocmossub_m3_l[] = { /* layers */
1786 {LMETAL3, 0, 4, FILLEDRECT, BOX, mocmossub_fullbox}};
1787 static TECH_NODES mocmossub_m3 = {
1788 x_("Metal-3-Node"),NMETAL3N,NONODEPROTO, /* name */
1789 K3,K3, /* size */
1790 1,mocmossub_m3_p, /* ports */
1791 1,mocmossub_m3_l, /* layers */
1792 (NPNODE<<NFUNCTIONSH)|HOLDSTRACE, /* userbits */
1793 POLYGONAL,0,0,0,0,0,0,0,0}; /* characteristics */
1794
1795 /* Metal-4-Node */
1796 static TECH_PORTS mocmossub_m4_p[] = { /* ports */
1797 {mocmossub_pc_m4, x_("metal-4"), NOPORTPROTO, (180<<PORTARANGESH),
1798 LEFTIN1H, BOTIN1H, RIGHTIN1H, TOPIN1H}};
1799 static TECH_POLYGON mocmossub_m4_l[] = { /* layers */
1800 {LMETAL4, 0, 4, FILLEDRECT, BOX, mocmossub_fullbox}};
1801 static TECH_NODES mocmossub_m4 = {
1802 x_("Metal-4-Node"),NMETAL4N,NONODEPROTO, /* name */
1803 K3,K3, /* size */
1804 1,mocmossub_m4_p, /* ports */
1805 1,mocmossub_m4_l, /* layers */
1806 (NPNODE<<NFUNCTIONSH)|HOLDSTRACE, /* userbits */
1807 POLYGONAL,0,0,0,0,0,0,0,0}; /* characteristics */
1808
1809 /* Metal-5-Node */
1810 static TECH_PORTS mocmossub_m5_p[] = { /* ports */
1811 {mocmossub_pc_m5, x_("metal-5"), NOPORTPROTO, (180<<PORTARANGESH),
1812 LEFTIN1H, BOTIN1H, RIGHTIN1H, TOPIN1H}};
1813 static TECH_POLYGON mocmossub_m5_l[] = { /* layers */
1814 {LMETAL5, 0, 4, FILLEDRECT, BOX, mocmossub_fullbox}};
1815 static TECH_NODES mocmossub_m5 = {
1816 x_("Metal-5-Node"),NMETAL5N,NONODEPROTO, /* name */
1817 K3,K3, /* size */
1818 1,mocmossub_m5_p, /* ports */
1819 1,mocmossub_m5_l, /* layers */
1820 (NPNODE<<NFUNCTIONSH)|HOLDSTRACE|NNOTUSED, /* userbits */
1821 POLYGONAL,0,0,0,0,0,0,0,0}; /* characteristics */
1822
1823 /* Metal-6-Node */
1824 static TECH_PORTS mocmossub_m6_p[] = { /* ports */
1825 {mocmossub_pc_m6, x_("metal-6"), NOPORTPROTO, (180<<PORTARANGESH),
1826 LEFTIN1H, BOTIN1H, RIGHTIN1H, TOPIN1H}};
1827 static TECH_POLYGON mocmossub_m6_l[] = { /* layers */
1828 {LMETAL6, 0, 4, FILLEDRECT, BOX, mocmossub_fullbox}};
1829 static TECH_NODES mocmossub_m6 = {
1830 x_("Metal-6-Node"),NMETAL6N,NONODEPROTO, /* name */
1831 K3,K3, /* size */
1832 1,mocmossub_m6_p, /* ports */
1833 1,mocmossub_m6_l, /* layers */
1834 (NPNODE<<NFUNCTIONSH)|HOLDSTRACE|NNOTUSED, /* userbits */
1835 POLYGONAL,0,0,0,0,0,0,0,0}; /* characteristics */
1836
1837 /* Polysilicon-1-Node */
1838 static TECH_PORTS mocmossub_p1_p[] = { /* ports */
1839 {mocmossub_pc_p1, x_("polysilicon-1"), NOPORTPROTO, (180<<PORTARANGESH),
1840 LEFTIN1, BOTIN1, RIGHTIN1, TOPIN1}};
1841 static TECH_POLYGON mocmossub_p1_l[] = { /* layers */
1842 {LPOLY1, 0, 4, FILLEDRECT, BOX, mocmossub_fullbox}};
1843 static TECH_NODES mocmossub_p1 = {
1844 x_("Polysilicon-1-Node"),NPOLY1N,NONODEPROTO, /* name */
1845 K2,K2, /* size */
1846 1,mocmossub_p1_p, /* ports */
1847 1,mocmossub_p1_l, /* layers */
1848 (NPNODE<<NFUNCTIONSH)|HOLDSTRACE, /* userbits */
1849 POLYGONAL,0,0,0,0,0,0,0,0}; /* characteristics */
1850
1851 /* Polysilicon-2-Node */
1852 static TECH_PORTS mocmossub_p2_p[] = { /* ports */
1853 {mocmossub_pc_p2, x_("polysilicon-2"), NOPORTPROTO, (180<<PORTARANGESH),
1854 LEFTIN1H, BOTIN1H, RIGHTIN1H, TOPIN1H}};
1855 static TECH_POLYGON mocmossub_p2_l[] = { /* layers */
1856 {LPOLY2, 0, 4, FILLEDRECT, BOX, mocmossub_fullbox}};
1857 static TECH_NODES mocmossub_p2 = {
1858 x_("Polysilicon-2-Node"),NPOLY2N,NONODEPROTO, /* name */
1859 K3,K3, /* size */
1860 1,mocmossub_p2_p, /* ports */
1861 1,mocmossub_p2_l, /* layers */
1862 (NPNODE<<NFUNCTIONSH)|HOLDSTRACE, /* userbits */
1863 POLYGONAL,0,0,0,0,0,0,0,0}; /* characteristics */
1864
1865 /* Active-Node */
1866 static TECH_PORTS mocmossub_a_p[] = { /* ports */
1867 {mocmossub_pc_a, x_("active"), NOPORTPROTO, (180<<PORTARANGESH),
1868 LEFTIN1H, BOTIN1H, RIGHTIN1H, TOPIN1H}};
1869 static TECH_POLYGON mocmossub_a_l[] = { /* layers */
1870 {LSACT, 0, 4, FILLEDRECT, BOX, mocmossub_fullbox}};
1871 static TECH_NODES mocmossub_a = {
1872 x_("Active-Node"),NACTIVEN,NONODEPROTO, /* name */
1873 K3,K3, /* size */
1874 1,mocmossub_a_p, /* ports */
1875 1,mocmossub_a_l, /* layers */
1876 (NPNODE<<NFUNCTIONSH)|HOLDSTRACE, /* userbits */
1877 POLYGONAL,0,0,0,0,0,0,0,0}; /* characteristics */
1878
1879 /* N-Active-Node (or P) */
1880 static TECH_PORTS mocmossub_da_p[] = { /* ports */
1881 {mocmossub_pc_a, x_("active"), NOPORTPROTO, (180<<PORTARANGESH),
1882 LEFTIN1H, BOTIN1H, RIGHTIN1H, TOPIN1H}};
1883 static TECH_POLYGON mocmossub_da_l[] = { /* layers */
1884 {LDACT, 0, 4, FILLEDRECT, BOX, mocmossub_fullbox}};
1885 static TECH_NODES mocmossub_da = {
1886 x_("N-Active-Node"),NDACTIVEN,NONODEPROTO, /* name */
1887 K3,K3, /* size */
1888 1,mocmossub_da_p, /* ports */
1889 1,mocmossub_da_l, /* layers */
1890 (NPNODE<<NFUNCTIONSH)|HOLDSTRACE, /* userbits */
1891 POLYGONAL,0,0,0,0,0,0,0,0}; /* characteristics */
1892
1893 /* P-Select-Node */
1894 static TECH_PORTS mocmossub_sp_p[] = { /* ports */
1895 {mocmossub_pc_null, x_("select"), NOPORTPROTO, (180<<PORTARANGESH),
1896 LEFTEDGE, BOTEDGE, RIGHTEDGE, TOPEDGE}};
1897 static TECH_POLYGON mocmossub_sp_l[] = { /* layers */
1898 {LSELECTP, -1, 4, FILLEDRECT, BOX, mocmossub_fullbox}};
1899 static TECH_NODES mocmossub_sp = {
1900 x_("P-Select-Node"),NSELECTPN,NONODEPROTO, /* name */
1901 K4,K4, /* size */
1902 1,mocmossub_sp_p, /* ports */
1903 1,mocmossub_sp_l, /* layers */
1904 (NPNODE<<NFUNCTIONSH)|HOLDSTRACE, /* userbits */
1905 POLYGONAL,0,0,0,0,0,0,0,0}; /* characteristics */
1906
1907 /* N-Select-Node */
1908 static TECH_PORTS mocmossub_sn_p[] = { /* ports */
1909 {mocmossub_pc_null, x_("select"), NOPORTPROTO, (180<<PORTARANGESH),
1910 LEFTEDGE, BOTEDGE, RIGHTEDGE, TOPEDGE}};
1911 static TECH_POLYGON mocmossub_sn_l[] = { /* layers */
1912 {LSELECTN, -1, 4, FILLEDRECT, BOX, mocmossub_fullbox}};
1913 static TECH_NODES mocmossub_sn = {
1914 x_("N-Select-Node"),NSELECTNN,NONODEPROTO, /* name */
1915 K4,K4, /* size */
1916 1,mocmossub_sn_p, /* ports */
1917 1,mocmossub_sn_l, /* layers */
1918 (NPNODE<<NFUNCTIONSH)|HOLDSTRACE, /* userbits */
1919 POLYGONAL,0,0,0,0,0,0,0,0}; /* characteristics */
1920
1921 /* PolyCut-Node */
1922 static TECH_PORTS mocmossub_gc_p[] = { /* ports */
1923 {mocmossub_pc_null, x_("polycut"), NOPORTPROTO, (180<<PORTARANGESH),
1924 LEFTEDGE, BOTEDGE, RIGHTEDGE, TOPEDGE}};
1925 static TECH_POLYGON mocmossub_gc_l[] = { /* layers */
1926 {LPOLYCUT, 0, 4, FILLEDRECT, BOX, mocmossub_fullbox}};
1927 static TECH_NODES mocmossub_gc = {
1928 x_("Poly-Cut-Node"),NPCUTN,NONODEPROTO, /* name */
1929 K2,K2, /* size */
1930 1,mocmossub_gc_p, /* ports */
1931 1,mocmossub_gc_l, /* layers */
1932 (NPNODE<<NFUNCTIONSH)|HOLDSTRACE, /* userbits */
1933 POLYGONAL,0,0,0,0,0,0,0,0}; /* characteristics */
1934
1935 /* ActiveCut-Node */
1936 static TECH_PORTS mocmossub_ac_p[] = { /* ports */
1937 {mocmossub_pc_null, x_("activecut"), NOPORTPROTO, (180<<PORTARANGESH),
1938 LEFTEDGE, BOTEDGE, RIGHTEDGE, TOPEDGE}};
1939 static TECH_POLYGON mocmossub_ac_l[] = { /* layers */
1940 {LACTCUT, 0, 4, FILLEDRECT, BOX, mocmossub_fullbox}};
1941 static TECH_NODES mocmossub_ac = {
1942 x_("Active-Cut-Node"),NACUTN,NONODEPROTO, /* name */
1943 K2,K2, /* size */
1944 1,mocmossub_ac_p, /* ports */
1945 1,mocmossub_ac_l, /* layers */
1946 (NPNODE<<NFUNCTIONSH)|HOLDSTRACE, /* userbits */
1947 POLYGONAL,0,0,0,0,0,0,0,0}; /* characteristics */
1948
1949 /* Via-1-Node */
1950 static TECH_PORTS mocmossub_v1_p[] = { /* ports */
1951 {mocmossub_pc_null, x_("via-1"), NOPORTPROTO, (180<<PORTARANGESH),
1952 LEFTEDGE, BOTEDGE, RIGHTEDGE, TOPEDGE}};
1953 static TECH_POLYGON mocmossub_v1_l[] = { /* layers */
1954 {LVIA1, 0, 4, FILLEDRECT, BOX, mocmossub_fullbox}};
1955 static TECH_NODES mocmossub_v1 = {
1956 x_("Via-1-Node"),NVIA1N,NONODEPROTO, /* name */
1957 K2,K2, /* size */
1958 1,mocmossub_v1_p, /* ports */
1959 1,mocmossub_v1_l, /* layers */
1960 (NPNODE<<NFUNCTIONSH)|HOLDSTRACE, /* userbits */
1961 POLYGONAL,0,0,0,0,0,0,0,0}; /* characteristics */
1962
1963 /* Via-2-Node */
1964 static TECH_PORTS mocmossub_v2_p[] = { /* ports */
1965 {mocmossub_pc_null, x_("via-2"), NOPORTPROTO, (180<<PORTARANGESH),
1966 LEFTEDGE, BOTEDGE, RIGHTEDGE, TOPEDGE}};
1967 static TECH_POLYGON mocmossub_v2_l[] = { /* layers */
1968 {LVIA2, 0, 4, FILLEDRECT, BOX, mocmossub_fullbox}};
1969 static TECH_NODES mocmossub_v2 = {
1970 x_("Via-2-Node"),NVIA2N,NONODEPROTO, /* name */
1971 K2,K2, /* size */
1972 1,mocmossub_v2_p, /* ports */
1973 1,mocmossub_v2_l, /* layers */
1974 (NPNODE<<NFUNCTIONSH)|HOLDSTRACE, /* userbits */
1975 POLYGONAL,0,0,0,0,0,0,0,0}; /* characteristics */
1976
1977 /* Via-3-Node */
1978 static TECH_PORTS mocmossub_v3_p[] = { /* ports */
1979 {mocmossub_pc_null, x_("via-3"), NOPORTPROTO, (180<<PORTARANGESH),
1980 LEFTEDGE, BOTEDGE, RIGHTEDGE, TOPEDGE}};
1981 static TECH_POLYGON mocmossub_v3_l[] = { /* layers */
1982 {LVIA3, 0, 4, FILLEDRECT, BOX, mocmossub_fullbox}};
1983 static TECH_NODES mocmossub_v3 = {
1984 x_("Via-3-Node"),NVIA3N,NONODEPROTO, /* name */
1985 K2,K2, /* size */
1986 1,mocmossub_v3_p, /* ports */
1987 1,mocmossub_v3_l, /* layers */
1988 (NPNODE<<NFUNCTIONSH)|HOLDSTRACE, /* userbits */
1989 POLYGONAL,0,0,0,0,0,0,0,0}; /* characteristics */
1990
1991 /* Via-4-Node */
1992 static TECH_PORTS mocmossub_v4_p[] = { /* ports */
1993 {mocmossub_pc_null, x_("via-4"), NOPORTPROTO, (180<<PORTARANGESH),
1994 LEFTEDGE, BOTEDGE, RIGHTEDGE, TOPEDGE}};
1995 static TECH_POLYGON mocmossub_v4_l[] = { /* layers */
1996 {LVIA4, 0, 4, FILLEDRECT, BOX, mocmossub_fullbox}};
1997 static TECH_NODES mocmossub_v4 = {
1998 x_("Via-4-Node"),NVIA4N,NONODEPROTO, /* name */
1999 K2,K2, /* size */
2000 1,mocmossub_v4_p, /* ports */
2001 1,mocmossub_v4_l, /* layers */
2002 (NPNODE<<NFUNCTIONSH)|HOLDSTRACE|NNOTUSED, /* userbits */
2003 POLYGONAL,0,0,0,0,0,0,0,0}; /* characteristics */
2004
2005 /* Via-5-Node */
2006 static TECH_PORTS mocmossub_v5_p[] = { /* ports */
2007 {mocmossub_pc_null, x_("via-5"), NOPORTPROTO, (180<<PORTARANGESH),
2008 LEFTEDGE, BOTEDGE, RIGHTEDGE, TOPEDGE}};
2009 static TECH_POLYGON mocmossub_v5_l[] = { /* layers */
2010 {LVIA5, 0, 4, FILLEDRECT, BOX, mocmossub_fullbox}};
2011 static TECH_NODES mocmossub_v5 = {
2012 x_("Via-5-Node"),NVIA5N,NONODEPROTO, /* name */
2013 K2,K2, /* size */
2014 1,mocmossub_v5_p, /* ports */
2015 1,mocmossub_v5_l, /* layers */
2016 (NPNODE<<NFUNCTIONSH)|HOLDSTRACE|NNOTUSED, /* userbits */
2017 POLYGONAL,0,0,0,0,0,0,0,0}; /* characteristics */
2018
2019 /* P-Well-Node */
2020 static TECH_PORTS mocmossub_wp_p[] = { /* ports */
2021 {mocmossub_pc_pa, x_("well"), NOPORTPROTO, (180<<PORTARANGESH),
2022 LEFTIN3, BOTIN3, RIGHTIN3, TOPIN3}};
2023 static TECH_POLYGON mocmossub_wp_l[] = { /* layers */
2024 {LWELLP, -1, 4, FILLEDRECT, BOX, mocmossub_fullbox}};
2025 static TECH_NODES mocmossub_wp = {
2026 x_("P-Well-Node"),NWELLPN,NONODEPROTO, /* name */
2027 K12,K12, /* size */
2028 1,mocmossub_wp_p, /* ports */
2029 1,mocmossub_wp_l, /* layers */
2030 (NPNODE<<NFUNCTIONSH)|HOLDSTRACE, /* userbits */
2031 POLYGONAL,0,0,0,0,0,0,0,0}; /* characteristics */
2032
2033 /* N-Well-Node */
2034 static TECH_PORTS mocmossub_wn_p[] = { /* ports */
2035 {mocmossub_pc_pa, x_("well"), NOPORTPROTO, (180<<PORTARANGESH),
2036 LEFTIN3, BOTIN3, RIGHTIN3, TOPIN3}};
2037 static TECH_POLYGON mocmossub_wn_l[] = { /* layers */
2038 {LWELLN, -1, 4, FILLEDRECT, BOX, mocmossub_fullbox}};
2039 static TECH_NODES mocmossub_wn = {
2040 x_("N-Well-Node"),NWELLNN,NONODEPROTO, /* name */
2041 K12,K12, /* size */
2042 1,mocmossub_wn_p, /* ports */
2043 1,mocmossub_wn_l, /* layers */
2044 (NPNODE<<NFUNCTIONSH)|HOLDSTRACE, /* userbits */
2045 POLYGONAL,0,0,0,0,0,0,0,0}; /* characteristics */
2046
2047 /* Passivation-node */
2048 static TECH_PORTS mocmossub_o_p[] = { /* ports */
2049 {mocmossub_pc_null, x_("passivation"), NOPORTPROTO, (180<<PORTARANGESH),
2050 LEFTEDGE, BOTEDGE, RIGHTEDGE, TOPEDGE}};
2051 static TECH_POLYGON mocmossub_o_l[] = { /* layers */
2052 {LPASS, 0, 4, FILLEDRECT, BOX, mocmossub_fullbox}};
2053 static TECH_NODES mocmossub_o = {
2054 x_("Passivation-Node"),NPASSN,NONODEPROTO, /* name */
2055 K8,K8, /* size */
2056 1,mocmossub_o_p, /* ports */
2057 1,mocmossub_o_l, /* layers */
2058 (NPNODE<<NFUNCTIONSH)|HOLDSTRACE, /* userbits */
2059 POLYGONAL,0,0,0,0,0,0,0,0}; /* characteristics */
2060
2061 /* Pad-Frame-node */
2062 static TECH_PORTS mocmossub_pf_p[] = { /* ports */
2063 {mocmossub_pc_null, x_("pad-frame"), NOPORTPROTO, (180<<PORTARANGESH),
2064 LEFTEDGE, BOTEDGE, RIGHTEDGE, TOPEDGE}};
2065 static TECH_POLYGON mocmossub_pf_l[] = { /* layers */
2066 {LFRAME, 0, 4, CLOSEDRECT, BOX, mocmossub_fullbox}};
2067 static TECH_NODES mocmossub_pf = {
2068 x_("Pad-Frame-Node"),NPADFRN,NONODEPROTO, /* name */
2069 K8,K8, /* size */
2070 1,mocmossub_pf_p, /* ports */
2071 1,mocmossub_pf_l, /* layers */
2072 (NPNODE<<NFUNCTIONSH)|HOLDSTRACE, /* userbits */
2073 POLYGONAL,0,0,0,0,0,0,0,0}; /* characteristics */
2074
2075 /* Polysilicon-Capacitor-node */
2076 static TECH_PORTS mocmossub_pc_p[] = { /* ports */
2077 {mocmossub_pc_null, x_("poly-cap"), NOPORTPROTO, (180<<PORTARANGESH),
2078 LEFTEDGE, BOTEDGE, RIGHTEDGE, TOPEDGE}};
2079 static TECH_POLYGON mocmossub_pc_l[] = { /* layers */
2080 {LPOLYCAP, 0, 4, CLOSEDRECT, BOX, mocmossub_fullbox}};
2081 static TECH_NODES mocmossub_pc = {
2082 x_("Poly-Cap-Node"),NPOLYCAPN,NONODEPROTO, /* name */
2083 K8,K8, /* size */
2084 1,mocmossub_pc_p, /* ports */
2085 1,mocmossub_pc_l, /* layers */
2086 (NPNODE<<NFUNCTIONSH)|HOLDSTRACE, /* userbits */
2087 POLYGONAL,0,0,0,0,0,0,0,0}; /* characteristics */
2088
2089 /* P-Active-Well-node */
2090 static TECH_PORTS mocmossub_paw_p[] = { /* ports */
2091 {mocmossub_pc_null, x_("p-active-well"), NOPORTPROTO, (180<<PORTARANGESH),
2092 LEFTEDGE, BOTEDGE, RIGHTEDGE, TOPEDGE}};
2093 static TECH_POLYGON mocmossub_paw_l[] = { /* layers */
2094 {LSACTWELL, 0, 4, CLOSEDRECT, BOX, mocmossub_fullbox}};
2095 static TECH_NODES mocmossub_paw = {
2096 x_("P-Active-Well-Node"),NPACTWELLN,NONODEPROTO,/* name */
2097 K8,K8, /* size */
2098 1,mocmossub_paw_p, /* ports */
2099 1,mocmossub_paw_l, /* layers */
2100 (NPNODE<<NFUNCTIONSH)|HOLDSTRACE, /* userbits */
2101 POLYGONAL,0,0,0,0,0,0,0,0}; /* characteristics */
2102
2103 TECH_NODES *mocmossub_nodeprotos[NODEPROTOCOUNT+1] = {
2104 &mocmossub_pm1, &mocmossub_pm2, &mocmossub_pm3, /* metal 1/2/3 pin */
2105 &mocmossub_pm4, &mocmossub_pm5, &mocmossub_pm6, /* metal 4/5/6 pin */
2106 &mocmossub_pp1, &mocmossub_pp2, /* polysilicon 1/2 pin */
2107 &mocmossub_psa, &mocmossub_pda, /* P/N active pin */
2108 &mocmossub_pa, /* active pin */
2109 &mocmossub_mpa, &mocmossub_mna, /* metal 1 to P/N active contact */
2110 &mocmossub_mp1, &mocmossub_mp2, /* metal 1 to polysilicon 1/2 contact */
2111 &mocmossub_mp12, /* poly capacitor */
2112 &mocmossub_tpa, &mocmossub_tna, /* P/N transistor */
2113 &mocmossub_m1m2, &mocmossub_m2m3, &mocmossub_m3m4, /* via 1/2/3 */
2114 &mocmossub_m4m5, &mocmossub_m5m6, /* via 4/5 */
2115 &mocmossub_psub, &mocmossub_nsub, /* well / substrate contact */
2116 &mocmossub_m1, &mocmossub_m2, &mocmossub_m3, /* metal 1/2/3 node */
2117 &mocmossub_m4, &mocmossub_m5, &mocmossub_m6, /* metal 4/5/6 node */
2118 &mocmossub_p1, &mocmossub_p2, /* polysilicon 1/2 node */
2119 &mocmossub_a, &mocmossub_da, /* active N-Active node */
2120 &mocmossub_sp, &mocmossub_sn, /* P/N select node */
2121 &mocmossub_gc, &mocmossub_ac, /* poly cut / active cut */
2122 &mocmossub_v1, &mocmossub_v2, &mocmossub_v3, /* via 1/2/3 node */
2123 &mocmossub_v4, &mocmossub_v5, /* via 4/5 node */
2124 &mocmossub_wp, &mocmossub_wn, /* P/N well node */
2125 &mocmossub_o, /* overglass node */
2126 &mocmossub_pf, /* pad frame node */
2127 &mocmossub_pc, /* poly-cap node */
2128 &mocmossub_paw, ((TECH_NODES *)-1)}; /* p-active-well node */
2129
2130 /* this table must correspond with the above table */
2131 static INTBIG mocmossub_node_widoff[NODEPROTOCOUNT*4] = {
2132 0,0,0,0, 0,0,0,0, 0,0,0,0, /* metal 1/2/3 pin */
2133 0,0,0,0, 0,0,0,0, 0,0,0,0, /* metal 4/5/6 pin */
2134 0,0,0,0, 0,0,0,0, /* polysilicon 1/2 pin */
2135 K6,K6,K6,K6, K6,K6,K6,K6, /* P/N active pin */
2136 0,0,0,0, /* active pin */
2137 K6,K6,K6,K6, K6,K6,K6,K6, /* metal 1 to P/N active contact */
2138 0,0,0,0, 0,0,0,0, /* metal 1 to polysilicon 1/2 contact */
2139 0,0,0,0, /* poly capacitor */
2140 K6,K6,K9,K9, K6,K6,K9,K9, /* P/N transistor */
2141 0,0,0,0, K1,K1,K1,K1, 0,0,0,0, /* via 1/2/3 */
2142 K1,K1,K1,K1, 0,0,0,0, /* via 4/5 */
2143 K4,K4,K4,K4, K4,K4,K4,K4, /* well / substrate contact */
2144 0,0,0,0, 0,0,0,0, 0,0,0,0, /* metal 1/2/3 node */
2145 0,0,0,0, 0,0,0,0, 0,0,0,0, /* metal 4/5/6 node */
2146 0,0,0,0, 0,0,0,0, /* polysilicon 1/2 node */
2147 0,0,0,0, 0,0,0,0, /* active N-Active node */
2148 0,0,0,0, 0,0,0,0, /* P/N select node */
2149 0,0,0,0, 0,0,0,0, /* poly cut / active cut */
2150 0,0,0,0, 0,0,0,0, 0,0,0,0, /* via 1/2/3 node */
2151 0,0,0,0, 0,0,0,0, /* via 4/5 node */
2152 0,0,0,0, 0,0,0,0, /* P/N well node */
2153 0,0,0,0, /* overglass node */
2154 0,0,0,0, /* pad frame node */
2155 0,0,0,0, /* poly-cap node */
2156 0,0,0,0}; /* p-active-well node */
2157
2158 /******************** SIMULATION VARIABLES ********************/
2159
2160 /* for SPICE simulation */
2161 #define MOCMOSSUB_MIN_RESIST 50.0f /* minimum resistance consider */
2162 #define MOCMOSSUB_MIN_CAPAC 0.04f /* minimum capacitance consider */
2163 static float mocmossub_sim_spice_resistance[MAXLAYERS] = { /* per square micron */
2164 0.06f, 0.06f, 0.06f, /* metal 1/2/3 */
2165 0.03f, 0.03f, 0.03f, /* metal 4/5/6 */
2166 2.5f, 50.0f, /* poly 1/2 */
2167 2.5f, 3.0f, /* P/N active */
2168 0.0, 0.0, /* P/N select */
2169 0.0, 0.0, /* P/N well */
2170 2.2f, 2.5f, /* poly/act cut */
2171 1.0f, 0.9f, 0.8f, 0.8f, 0.8f, /* via 1/2/3/4/5 */
2172 0.0, /* overglass */
2173 0.0, /* transistor */
2174 0.0, /* poly cap */
2175 0.0, /* P active well */
2176 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, /* pseudo metal 1/2/3/4/5/6 */
2177 0.0, 0.0, /* pseudo poly 1/2 */
2178 0.0, 0.0, /* pseudo P/N active */
2179 0.0, 0.0, /* pseudo P/N select */
2180 0.0, 0.0, /* pseudo P/N well */
2181 0.0}; /* pad frame */
2182 static float mocmossub_sim_spice_capacitance[MAXLAYERS] = { /* per square micron */
2183 0.07f, 0.04f, 0.04f, /* metal 1/2/3 */
2184 0.04f, 0.04f, 0.04f, /* metal 4/5/6 */
2185 0.09f, 1.0f, /* poly 1/2 */
2186 0.9f, 0.9f, /* P/N active */
2187 0.0, 0.0, /* P/N select */
2188 0.0, 0.0, /* P/N well */
2189 0.0, 0.0, /* poly/act cut */
2190 0.0, 0.0, 0.0, 0.0, 0.0, /* via 1/2/3/4/5 */
2191 0.0, /* overglass */
2192 0.0, /* transistor */
2193 0.0, /* poly cap */
2194 0.0, /* P active well */
2195 0.0, 0.0, 0.0, 0.0, 0.0, 0.0, /* pseudo metal 1/2/3/4/5/6 */
2196 0.0, 0.0, /* pseudo poly 1/2 */
2197 0.0, 0.0, /* pseudo P/N active */
2198 0.0, 0.0, /* pseudo P/N select */
2199 0.0, 0.0, /* pseudo P/N well */
2200 0.0}; /* pad frame */
2201 static CHAR *mocmossub_sim_spice_header_level1[] = {
2202 x_("*CMOS/BULK-NWELL (PRELIMINARY PARAMETERS)"),
2203 x_(".OPTIONS NOMOD DEFL=3UM DEFW=3UM DEFAD=70P DEFAS=70P LIMPTS=1000"),
2204 x_("+ITL4=1000 ITL5=0 RELTOL=0.01 ABSTOL=500PA VNTOL=500UV LVLTIM=2"),
2205 x_("+LVLCOD=1"),
2206 x_(".MODEL N NMOS LEVEL=1"),
2207 x_("+KP=60E-6 VTO=0.7 GAMMA=0.3 LAMBDA=0.05 PHI=0.6"),
2208 x_("+LD=0.4E-6 TOX=40E-9 CGSO=2.0E-10 CGDO=2.0E-10 CJ=.2MF/M^2"),
2209 x_(".MODEL P PMOS LEVEL=1"),
2210 x_("+KP=20E-6 VTO=0.7 GAMMA=0.4 LAMBDA=0.05 PHI=0.6"),
2211 x_("+LD=0.6E-6 TOX=40E-9 CGSO=3.0E-10 CGDO=3.0E-10 CJ=.2MF/M^2"),
2212 x_(".MODEL DIFFCAP D CJO=.2MF/M^2"),
2213 NOSTRING};
2214 static CHAR *mocmossub_sim_spice_header_level2[] = {
2215 x_("* MOSIS 3u CMOS PARAMS"),
2216 x_(".OPTIONS NOMOD DEFL=2UM DEFW=6UM DEFAD=100P DEFAS=100P"),
2217 x_("+LIMPTS=1000 ITL4=1000 ITL5=0 ABSTOL=500PA VNTOL=500UV"),
2218 x_("* Note that ITL5=0 sets ITL5 to infinity"),
2219 x_(".MODEL N NMOS LEVEL=2 LD=0.3943U TOX=502E-10"),
2220 x_("+NSUB=1.22416E+16 VTO=0.756 KP=4.224E-05 GAMMA=0.9241"),
2221 x_("+PHI=0.6 UO=623.661 UEXP=8.328627E-02 UCRIT=54015.0"),
2222 x_("+DELTA=5.218409E-03 VMAX=50072.2 XJ=0.4U LAMBDA=2.975321E-02"),
2223 x_("+NFS=4.909947E+12 NEFF=1.001E-02 NSS=0.0 TPG=1.0"),
2224 x_("+RSH=20.37 CGDO=3.1E-10 CGSO=3.1E-10"),
2225 x_("+CJ=3.205E-04 MJ=0.4579 CJSW=4.62E-10 MJSW=0.2955 PB=0.7"),
2226 x_(".MODEL P PMOS LEVEL=2 LD=0.2875U TOX=502E-10"),
2227 x_("+NSUB=1.715148E+15 VTO=-0.7045 KP=1.686E-05 GAMMA=0.3459"),
2228 x_("+PHI=0.6 UO=248.933 UEXP=1.02652 UCRIT=182055.0"),
2229 x_("+DELTA=1.0E-06 VMAX=100000.0 XJ=0.4U LAMBDA=1.25919E-02"),
2230 x_("+NFS=1.0E+12 NEFF=1.001E-02 NSS=0.0 TPG=-1.0"),
2231 x_("+RSH=79.10 CGDO=2.89E-10 CGSO=2.89E-10"),
2232 x_("+CJ=1.319E-04 MJ=0.4125 CJSW=3.421E-10 MJSW=0.198 PB=0.66"),
2233 x_(".TEMP 25.0"),
2234 NOSTRING};
2235
2236
2237 /******************** VARIABLE AGGREGATION ********************/
2238
2239 TECH_VARIABLES mocmossub_variables[] =
2240 {
2241 /* set general information about the technology */
2242 {x_("TECH_layer_names"), (CHAR *)mocmossub_layer_names, 0.0,
2243 VSTRING|VDONTSAVE|VISARRAY|(MAXLAYERS<<VLENGTHSH)},
2244 {x_("TECH_layer_function"), (CHAR *)mocmossub_layer_function, 0.0,
2245 VINTEGER|VDONTSAVE|VISARRAY|(MAXLAYERS<<VLENGTHSH)},
2246 {x_("TECH_arc_width_offset"), (CHAR *)mocmossub_arc_widoff, 0.0,
2247 VFRACT|VDONTSAVE|VISARRAY|(ARCPROTOCOUNT<<VLENGTHSH)},
2248 {x_("TECH_node_width_offset"), (CHAR *)mocmossub_node_widoff, 0.0,
2249 VFRACT|VDONTSAVE|VISARRAY|((NODEPROTOCOUNT*4)<<VLENGTHSH)},
2250 {x_("TECH_layer_3dthickness"), (CHAR *)mocmossub_3dthick_layers, 0.0,
2251 VINTEGER|VDONTSAVE|VISARRAY|(MAXLAYERS<<VLENGTHSH)},
2252 {x_("TECH_layer_3dheight"), (CHAR *)mocmossub_3dheight_layers, 0.0,
2253 VINTEGER|VDONTSAVE|VISARRAY|(MAXLAYERS<<VLENGTHSH)},
2254
2255 /* set information for the USER tool */
2256 {x_("USER_color_map"), (CHAR *)mocmossub_colmap, 0.0,
2257 VCHAR|VDONTSAVE|VISARRAY|((sizeof mocmossub_colmap)<<VLENGTHSH)},
2258 {x_("USER_layer_letters"), (CHAR *)mocmossub_layer_letters, 0.0,
2259 VSTRING|VDONTSAVE|VISARRAY|(MAXLAYERS<<VLENGTHSH)},
2260
2261 /* set information for the I/O tool */
2262 {x_("IO_cif_layer_names"), (CHAR *)mocmossub_cif_layers, 0.0,
2263 VSTRING|VDONTSAVE|VISARRAY|(MAXLAYERS<<VLENGTHSH)},
2264 {x_("IO_gds_layer_numbers"), (CHAR *)mocmossub_gds_layers, 0.0,
2265 VSTRING|VDONTSAVE|VISARRAY|(MAXLAYERS<<VLENGTHSH)},
2266 {x_("IO_skill_layer_names"), (CHAR *)mocmossub_skill_layers, 0.0,
2267 VSTRING|VDONTSAVE|VISARRAY|(MAXLAYERS<<VLENGTHSH)},
2268
2269 /* set information for the DRC tool */
2270 {x_("DRC_min_unconnected_distances"), (CHAR *)mocmossub_unconnectedtable, 0.0,
2271 VFRACT|VDONTSAVE|VISARRAY|
2272 (((sizeof mocmossub_unconnectedtable)/SIZEOFINTBIG)<<VLENGTHSH)},
2273 {x_("DRC_min_connected_distances"), (CHAR *)mocmossub_connectedtable, 0.0,
2274 VFRACT|VDONTSAVE|VISARRAY|
2275 (((sizeof mocmossub_connectedtable)/SIZEOFINTBIG)<<VLENGTHSH)},
2276 {x_("DRC_min_width"), (CHAR *)mocmossub_minimum_width, 0.0,
2277 VFRACT|VDONTSAVE|VISARRAY|(MAXLAYERS<<VLENGTHSH)},
2278
2279 /* set information for the SIM tool (SPICE) */
2280 {x_("SIM_spice_min_resistance"), 0, MOCMOSSUB_MIN_RESIST, VFLOAT|VDONTSAVE},
2281 {x_("SIM_spice_min_capacitance"), 0, MOCMOSSUB_MIN_CAPAC, VFLOAT|VDONTSAVE},
2282 {x_("SIM_spice_resistance"), (CHAR *)mocmossub_sim_spice_resistance, 0.0,
2283 VFLOAT|VISARRAY|(MAXLAYERS<<VLENGTHSH)|VDONTSAVE},
2284 {x_("SIM_spice_capacitance"), (CHAR *)mocmossub_sim_spice_capacitance, 0.0,
2285 VFLOAT|VISARRAY|(MAXLAYERS<<VLENGTHSH)|VDONTSAVE},
2286 {x_("SIM_spice_header_level1"), (CHAR *)mocmossub_sim_spice_header_level1, 0.0,
2287 VSTRING|VDONTSAVE|VISARRAY},
2288 {x_("SIM_spice_header_level2"), (CHAR *)mocmossub_sim_spice_header_level2, 0.0,
2289 VSTRING|VDONTSAVE|VISARRAY},
2290 {NULL, NULL, 0.0, 0}
2291 };
2292
2293 /******************** ROUTINES ********************/
2294
mocmossub_initprocess(TECHNOLOGY * tech,INTBIG pass)2295 BOOLEAN mocmossub_initprocess(TECHNOLOGY *tech, INTBIG pass)
2296 {
2297 /* initialize the technology variable */
2298 if (pass == 0) mocmossub_tech = tech;
2299 mocmossub_state = MOCMOSSUB4METAL;
2300 nextchangequiet();
2301 setvalkey((INTBIG)mocmossub_tech, VTECHNOLOGY, el_techstate_key, mocmossub_state,
2302 VINTEGER|VDONTSAVE);
2303 return(FALSE);
2304 }
2305
mocmossub_request(CHAR * command,va_list ap)2306 INTBIG mocmossub_request(CHAR *command, va_list ap)
2307 {
2308 if (namesame(command, x_("has-state")) == 0) return(1);
2309 if (namesame(command, x_("get-state")) == 0)
2310 {
2311 return(mocmossub_state);
2312 }
2313 if (namesame(command, x_("set-state")) == 0)
2314 {
2315 mocmossub_setstate(va_arg(ap, INTBIG));
2316 return(0);
2317 }
2318 if (namesame(command, x_("describe-state")) == 0)
2319 {
2320 return((INTBIG)mocmossub_describestate(va_arg(ap, INTBIG)));
2321 }
2322 return(0);
2323 }
2324
mocmossub_setmode(INTBIG count,CHAR * par[])2325 void mocmossub_setmode(INTBIG count, CHAR *par[])
2326 {
2327 REGISTER INTBIG l;
2328 REGISTER CHAR *pp;
2329 Q_UNUSED( count );
2330
2331 l = estrlen(pp = par[0]);
2332
2333 if (namesamen(pp, x_("2-metal-rules"), l) == 0)
2334 {
2335 mocmossub_setstate((mocmossub_state & ~MOCMOSSUBMETALS) | MOCMOSSUB2METAL);
2336 ttyputverbose(M_("MOSIS CMOS Submicron technology uses 2-metal rules"));
2337 return;
2338 }
2339 if (namesamen(pp, x_("3-metal-rules"), l) == 0)
2340 {
2341 mocmossub_setstate((mocmossub_state & ~MOCMOSSUBMETALS) | MOCMOSSUB3METAL);
2342 ttyputverbose(M_("MOSIS CMOS Submicron technology uses 3-metal rules"));
2343 return;
2344 }
2345 if (namesamen(pp, x_("4-metal-rules"), l) == 0)
2346 {
2347 mocmossub_setstate((mocmossub_state & ~MOCMOSSUBMETALS) | MOCMOSSUB4METAL);
2348 ttyputverbose(M_("MOSIS CMOS Submicron technology uses 4-metal rules"));
2349 return;
2350 }
2351 if (namesamen(pp, x_("5-metal-rules"), l) == 0)
2352 {
2353 mocmossub_setstate((mocmossub_state & ~MOCMOSSUBMETALS) | MOCMOSSUB5METAL);
2354 ttyputverbose(M_("MOSIS CMOS Submicron technology uses 5-metal rules"));
2355 return;
2356 }
2357 if (namesamen(pp, x_("6-metal-rules"), l) == 0)
2358 {
2359 mocmossub_setstate((mocmossub_state & ~MOCMOSSUBMETALS) | MOCMOSSUB6METAL);
2360 ttyputverbose(M_("MOSIS CMOS Submicron technology uses 6-metal rules"));
2361 return;
2362 }
2363
2364 ttyputbadusage(x_("technology tell mocmossub"));
2365 }
2366
mocmossub_setstate(INTBIG newstate)2367 void mocmossub_setstate(INTBIG newstate)
2368 {
2369 if (mocmossub_state == newstate) return;
2370 mocmossub_state = newstate;
2371
2372 /* adjust metal rules according to the number of metal layers */
2373 switch (mocmossub_state&MOCMOSSUBMETALS)
2374 {
2375 case MOCMOSSUB2METAL: /* 2-metal process: */
2376 /* metal-2 is 4 apart, 3 wide */
2377 mocmossub_setlayerrules(x_("Metal-2"), K4, K3);
2378 break;
2379
2380 case MOCMOSSUB3METAL: /* 3-metal process: */
2381 /* metal-2 is 3 apart, 3 wide */
2382 mocmossub_setlayerrules(x_("Metal-2"), K3, K3);
2383
2384 /* metal-3 is 5 wide, 3 apart, overlaps vias by 2 */
2385 mocmossub_setlayerrules(x_("Metal-3"), K3, K5);
2386 mocmossub_setarcwidth(x_("Metal-3"), K5);
2387 mocmossub_setnodesize(x_("Metal-3-Pin"), K5, H2);
2388 mocmossub_setmetalonvia(x_("Metal-2-Metal-3-Con"), LMETAL3, mocmossub_fullbox, 0);
2389 mocmossub_m2m3.f3 = K2;
2390 break;
2391
2392 case MOCMOSSUB4METAL: /* 4-metal process: */
2393 /* metal-2 is 3 apart, 3 wide */
2394 mocmossub_setlayerrules(x_("Metal-2"), K3, K3);
2395
2396 /* metal-3 is 3 wide, 3 apart, overlaps vias by 1 */
2397 mocmossub_setlayerrules(x_("Metal-3"), K3, K3);
2398 mocmossub_setarcwidth(x_("Metal-3"), K3);
2399 mocmossub_setnodesize(x_("Metal-3-Pin"), K3, H1);
2400 mocmossub_setmetalonvia(x_("Metal-2-Metal-3-Con"), LMETAL3, mocmossub_in1box, K1);
2401 mocmossub_m2m3.f3 = K1;
2402
2403 /* metal-4 is 5 wide, 3 apart, overlaps vias by 2 */
2404 mocmossub_setmetalonvia(x_("Metal-3-Metal-4-Con"), LMETAL4, mocmossub_fullbox, 0);
2405 mocmossub_m3m4.f3 = K2;
2406 break;
2407
2408 case MOCMOSSUB5METAL: /* 5-metal process: */
2409 /* metal-2 is 3 apart, 3 wide */
2410 mocmossub_setlayerrules(x_("Metal-2"), K3, K3);
2411
2412 /* metal-3 is 3 wide, 3 apart, overlaps vias by 1 */
2413 mocmossub_setlayerrules(x_("Metal-3"), K3, K3);
2414 mocmossub_setarcwidth(x_("Metal-3"), K3);
2415 mocmossub_setnodesize(x_("Metal-3-Pin"), K3, H1);
2416 mocmossub_setmetalonvia(x_("Metal-2-Metal-3-Con"), LMETAL3, mocmossub_in1box, K1);
2417 mocmossub_m2m3.f3 = K1;
2418
2419 /* metal-4 is 3 wide, 3 apart, overlaps vias by 1 */
2420 mocmossub_setmetalonvia(x_("Metal-3-Metal-4-Con"), LMETAL4, mocmossub_in1box, K1);
2421 mocmossub_m3m4.f3 = K1;
2422
2423 /* metal-5 is 4 apart, 4 wide */
2424 mocmossub_setlayerrules(x_("Metal-5"), K4, K4);
2425 mocmossub_setarcwidth(x_("Metal-5"), K4);
2426 mocmossub_setnodesize(x_("Metal-5-Pin"), K4, 0);
2427 break;
2428
2429 case MOCMOSSUB6METAL: /* 6-metal process: */
2430 /* metal-2 is 3 apart, 3 wide */
2431 mocmossub_setlayerrules(x_("Metal-2"), K3, K3);
2432
2433 /* metal-3 is 3 wide, 3 apart, overlaps vias by 1 */
2434 mocmossub_setlayerrules(x_("Metal-3"), K3, K3);
2435 mocmossub_setarcwidth(x_("Metal-3"), K3);
2436 mocmossub_setnodesize(x_("Metal-3-Pin"), K3, H1);
2437 mocmossub_setmetalonvia(x_("Metal-2-Metal-3-Con"), LMETAL3, mocmossub_in1box, K1);
2438 mocmossub_m2m3.f3 = K1;
2439
2440 /* metal-4 is 3 wide, 3 apart, overlaps vias by 1 */
2441 mocmossub_setmetalonvia(x_("Metal-3-Metal-4-Con"), LMETAL4, mocmossub_in1box, K1);
2442 mocmossub_m3m4.f3 = K1;
2443
2444 /* metal-5 is 3 apart, 3 wide */
2445 mocmossub_setlayerrules(x_("Metal-5"), K3, K3);
2446 mocmossub_setarcwidth(x_("Metal-5"), K3);
2447 mocmossub_setnodesize(x_("Metal-5-Pin"), K3, 0);
2448 break;
2449 }
2450
2451 /* disable Metal-3/4/5/6-Pin, Metal-2/3/4/5-Metal-3/4/5/6-Con, Metal-3/4/5/6-Node, Via-2/3/4/5-Node */
2452 mocmossub_pm3.creation->userbits |= NNOTUSED;
2453 mocmossub_pm4.creation->userbits |= NNOTUSED;
2454 mocmossub_pm5.creation->userbits |= NNOTUSED;
2455 mocmossub_pm6.creation->userbits |= NNOTUSED;
2456 mocmossub_m2m3.creation->userbits |= NNOTUSED;
2457 mocmossub_m3m4.creation->userbits |= NNOTUSED;
2458 mocmossub_m4m5.creation->userbits |= NNOTUSED;
2459 mocmossub_m5m6.creation->userbits |= NNOTUSED;
2460 mocmossub_m3.creation->userbits |= NNOTUSED;
2461 mocmossub_m4.creation->userbits |= NNOTUSED;
2462 mocmossub_m5.creation->userbits |= NNOTUSED;
2463 mocmossub_m6.creation->userbits |= NNOTUSED;
2464 mocmossub_v2.creation->userbits |= NNOTUSED;
2465 mocmossub_v3.creation->userbits |= NNOTUSED;
2466 mocmossub_v4.creation->userbits |= NNOTUSED;
2467 mocmossub_v5.creation->userbits |= NNOTUSED;
2468
2469 /* enable the desired nodes */
2470 switch (mocmossub_state&MOCMOSSUBMETALS)
2471 {
2472 case MOCMOSSUB6METAL:
2473 mocmossub_pm6.creation->userbits &= ~NNOTUSED;
2474 mocmossub_m5m6.creation->userbits &= ~NNOTUSED;
2475 mocmossub_m6.creation->userbits &= ~NNOTUSED;
2476 mocmossub_v5.creation->userbits &= ~NNOTUSED;
2477 /* FALLTHROUGH */
2478 case MOCMOSSUB5METAL:
2479 mocmossub_pm5.creation->userbits &= ~NNOTUSED;
2480 mocmossub_m4m5.creation->userbits &= ~NNOTUSED;
2481 mocmossub_m5.creation->userbits &= ~NNOTUSED;
2482 mocmossub_v4.creation->userbits &= ~NNOTUSED;
2483 /* FALLTHROUGH */
2484 case MOCMOSSUB4METAL:
2485 mocmossub_pm4.creation->userbits &= ~NNOTUSED;
2486 mocmossub_m3m4.creation->userbits &= ~NNOTUSED;
2487 mocmossub_m4.creation->userbits &= ~NNOTUSED;
2488 mocmossub_v3.creation->userbits &= ~NNOTUSED;
2489 /* FALLTHROUGH */
2490 case MOCMOSSUB3METAL:
2491 mocmossub_pm3.creation->userbits &= ~NNOTUSED;
2492 mocmossub_m2m3.creation->userbits &= ~NNOTUSED;
2493 mocmossub_m3.creation->userbits &= ~NNOTUSED;
2494 mocmossub_v2.creation->userbits &= ~NNOTUSED;
2495 break;
2496 }
2497
2498 /* now rewrite the description */
2499 (void)reallocstring(&mocmossub_tech->techdescript, mocmossub_describestate(mocmossub_state),
2500 mocmossub_tech->cluster);
2501 }
2502
mocmossub_describestate(INTBIG state)2503 CHAR *mocmossub_describestate(INTBIG state)
2504 {
2505 REGISTER INTBIG nummetals;
2506 REGISTER CHAR *conversion;
2507 REGISTER void *infstr;
2508
2509 switch (state&MOCMOSSUBMETALS)
2510 {
2511 case MOCMOSSUB2METAL: nummetals = 2; break;
2512 case MOCMOSSUB3METAL: nummetals = 3; break;
2513 case MOCMOSSUB4METAL: nummetals = 4; break;
2514 case MOCMOSSUB5METAL: nummetals = 5; break;
2515 case MOCMOSSUB6METAL: nummetals = 6; break;
2516 default: nummetals = 2;
2517 }
2518 infstr = initinfstr();
2519 if ((state&MOCMOSSUBNOCONV) == 0) conversion = N_("converts to newer MOCMOS"); else
2520 conversion = N_("no conversion to newer MOCMOS");
2521 formatinfstr(infstr, _("Complementary MOS (old, from MOSIS, Submicron, 2-6 metals [now %ld], double poly, %s)"),
2522 nummetals, conversion);
2523 return(returninfstr(infstr));
2524 }
2525
2526 /*
2527 * Routine to change the design rules for layer "layername" layers so that
2528 * the layers remain "spacing" apart and are at least "minwidth" wide.
2529 */
mocmossub_setlayerrules(CHAR * layername,INTBIG spacing,INTBIG minwidth)2530 void mocmossub_setlayerrules(CHAR *layername, INTBIG spacing, INTBIG minwidth)
2531 {
2532 REGISTER INTBIG layer, rindex;
2533
2534 for(layer=0; layer<mocmossub_tech->layercount; layer++)
2535 if (namesame(mocmossub_layer_names[layer], layername) == 0) break;
2536 if (layer >= mocmossub_tech->layercount) return;
2537
2538 rindex = (layer+1) * (layer/2) + (layer&1) * ((layer+1)/2);
2539 rindex = layer + mocmossub_tech->layercount * layer - rindex;
2540 changesquiet(TRUE);
2541 setindkey((INTBIG)mocmossub_tech, VTECHNOLOGY, dr_unconnected_distanceskey, rindex, spacing);
2542 setindkey((INTBIG)mocmossub_tech, VTECHNOLOGY, dr_connected_distanceskey, rindex, spacing);
2543 setindkey((INTBIG)mocmossub_tech, VTECHNOLOGY, dr_min_widthkey, layer, minwidth);
2544 changesquiet(FALSE);
2545 }
2546
2547 /*
2548 * Routine to change the default width of arc "arcname" to "width".
2549 */
mocmossub_setarcwidth(CHAR * arcname,INTBIG width)2550 void mocmossub_setarcwidth(CHAR *arcname, INTBIG width)
2551 {
2552 REGISTER ARCPROTO *ap;
2553 REGISTER INTBIG lambda;
2554
2555 for(ap = mocmossub_tech->firstarcproto; ap != NOARCPROTO; ap = ap->nextarcproto)
2556 if (namesame(ap->protoname, arcname) == 0) break;
2557 if (ap == NOARCPROTO) return;
2558 lambda = el_curlib->lambda[mocmossub_tech->techindex];
2559 ap->nominalwidth = width * lambda / WHOLE;
2560 }
2561
2562 /*
2563 * Routine to change the default size of node "nodename" to "size" squared with a
2564 * port offset of "portoffset" (this is the distance from the edge in to the port).
2565 */
mocmossub_setnodesize(CHAR * nodename,INTBIG size,INTBIG portoffset)2566 void mocmossub_setnodesize(CHAR *nodename, INTBIG size, INTBIG portoffset)
2567 {
2568 REGISTER NODEPROTO *np;
2569 REGISTER INTBIG i, lambda;
2570 REGISTER TECH_NODES *nty;
2571 REGISTER TECH_PORTS *npp;
2572
2573 np = NONODEPROTO;
2574 nty = 0;
2575 for(i=0; i<mocmossub_tech->nodeprotocount; i++)
2576 {
2577 nty = mocmossub_tech->nodeprotos[i];
2578 np = nty->creation;
2579 if (namesame(np->protoname, nodename) == 0) break;
2580 }
2581 if (np == NONODEPROTO) return;
2582
2583 lambda = el_curlib->lambda[mocmossub_tech->techindex];
2584 np->lowx = -size * lambda / WHOLE / 2;
2585 np->highx = size * lambda / WHOLE / 2;
2586 np->lowy = -size * lambda / WHOLE / 2;
2587 np->highy = size * lambda / WHOLE / 2;
2588 npp = &nty->portlist[0];
2589 npp->lowxsum = (INTSML)portoffset;
2590 npp->lowysum = (INTSML)portoffset;
2591 npp->highxsum = (INTSML)(-portoffset);
2592 npp->highysum = (INTSML)(-portoffset);
2593 }
2594
2595 /*
2596 * Routine to set the size of metal layer "layer" on via "nodename" so that it is described
2597 * with "boxdesc". Also sets the node inset for this node to "nodeoffset".
2598 */
mocmossub_setmetalonvia(CHAR * nodename,INTBIG layer,INTBIG * boxdesc,INTBIG nodeoffset)2599 void mocmossub_setmetalonvia(CHAR *nodename, INTBIG layer, INTBIG *boxdesc, INTBIG nodeoffset)
2600 {
2601 REGISTER NODEPROTO *np;
2602 REGISTER INTBIG i, j;
2603 REGISTER TECH_NODES *nty;
2604 REGISTER VARIABLE *var;
2605
2606 np = NONODEPROTO;
2607 nty = 0;
2608 for(i=0; i<mocmossub_tech->nodeprotocount; i++)
2609 {
2610 nty = mocmossub_tech->nodeprotos[i];
2611 np = nty->creation;
2612 if (namesame(np->protoname, nodename) == 0) break;
2613 }
2614 if (np == NONODEPROTO) return;
2615
2616 for(j=0; j<nty->layercount; j++)
2617 if (nty->layerlist[j].layernum == layer) break;
2618 if (j >= nty->layercount) return;
2619 nty->layerlist[j].points = boxdesc;
2620
2621 var = getval((INTBIG)mocmossub_tech, VTECHNOLOGY, VFRACT|VISARRAY, x_("TECH_node_width_offset"));
2622 if (var != NOVARIABLE)
2623 {
2624 ((INTBIG *)var->addr)[i*4] = nodeoffset;
2625 ((INTBIG *)var->addr)[i*4+1] = nodeoffset;
2626 ((INTBIG *)var->addr)[i*4+2] = nodeoffset;
2627 ((INTBIG *)var->addr)[i*4+3] = nodeoffset;
2628 }
2629 }
2630