1 ; PUSH HL ; 11 2 ; PUSH BC ; 11 3 ; LD HL,table8 ; 10 4 ; LD C,A ; 4 5 ; LD B,0 ; 7 6 ; ADD HL,BC ; 11 7 ; LD A,(HL) ; 7 8 ; POP BC ; 10 9 ; POP HL ; 10 10 ; LD B,A ; 4 11 ; RET ; 10 12; 13 org 0x100 14msb: ; return in A index+1 of most sigificant bit in A 15 ; set A to 0 if A is zero undefined on return: F 16 ; time <= 103 ticks (in the case highest set bit is 2) 17 OR A ; clear carry 18 RLA 19 JR C,b8 20 RLA 21 JR C,b7 22 RLA 23 JR C,b6 24 RLA 25 JR C,b5 26 RLA 27 JR C,b4 28 RLA 29 JR C,b3 30 RLA 31 JR C,b2 32 RLA 33 ADC A,A 34 RET 35b8: LD A,8 36 RET 37b7: LD A,7 38 RET 39b6: LD A,6 40 RET 41b5: LD A,5 42 RET 43b4: LD A,4 44 RET 45b3: LD A,3 46 RET 47b2: LD A,2 48 RET 49; 50 org 0x130 51left8: 52 ; maximal 8 bit left shift of HL 53 ; shift counter in A 54 ; on return: if A < 8 then HL <- HL*2^A, A=0 else HL <- HL*256, A-=8 55 CP 8 56 JR NC,minus 57 CP 4 58 JR C,small 59 JR Z,c4 60 CP 6 61 JR C,c5 62 LD A,0 63 JR NZ,c7 64; JR c6 65 SRL H 66 RR L 67 RRA 68c7: SRL H 69 RR L 70 RRA 71 LD H,L 72 LD L,A 73 XOR A 74 RET 75small: CP 2 76 JR Z,c2 77 JR NC,c3 78 CP 1 79 JR Z,c1 80 JR c0 81minus: SUB 8 82 LD H,L 83 LD L,0 84 RET 85c5: ADD HL,HL 86c4: ADD HL,HL 87c3: ADD HL,HL 88c2: ADD HL,HL 89c1: ADD HL,HL 90c0: XOR A 91 RET 92 ; 93 org 0x170 94shift: ; 16 bit arithmetic left-/right shift 95 ; argument in DE ; signed shift counter in B 96 ; result in DE = DE *2^B 97 ; undefined on return: A 98 LD A,B 99 CP 0 100 RET Z 101 CP 0x80 102 JR C,left 103right: SRA D 104 RR E 105 DJNZ right 106 RET 107left: SLA E 108 RL D 109 DJNZ left 110 RET 111; 112 org 0x190 113t_power: ; returns in in A the two-power 2^A if 0<=A<8 or 0 if A >= 8 114 ; undefined in return: F 115 ; time <= 110 ticks (in the case A = 7) 116 OR A 117 JR Z,t0 118 DEC A 119 JR Z,t1 120 DEC A 121 JR Z,t2 122 DEC A 123 JR Z,t3 124 DEC A 125 JR Z,t4 126 DEC A 127 JR Z,t5 128 DEC A 129 JR Z,t6 130 DEC A 131 JR Z,t7 132 XOR A 133 RET 134t1: INC A 135t0: INC A 136 RET 137t2: LD A,4 138 RET 139t3: LD A,8 140 RET 141t4: LD A,16 142 RET 143t5: LD A,32 144 RET 145t6: LD A,64 146 RET 147t7: LD A,128 148 RET 149; 150 org 0x1c0 151div_8: ; 8 bit division dividend in A, divisor in C 152 ; remainder in A, if error carry flag cleared else quotient in E 153 ; undefined on return: B 154 ; time <= 585 ticks (255/3) 155 LD B,A 156 LD A,C 157 DEC A 158 AND C 159 JR Z,twop 160 LD A,B 161 LD E,0 162 CP C 163 RET c 164 INC E 165 SUB C 166 JR C,final 167 LD B,E 168back: INC B 169 SUB C 170 JR C,inside 171 SLA C 172 JP back 173inside: DEC B 174 ADD A,C 175posi: DEC B 176 JR Z,read2 177 SRL C 178 SLA E 179 INC E 180 SUB C 181 JR NC,posi 182 SRL C 183 DEC B 184 JR Z,final 185nega: SLA E 186 DEC E 187 ADD A,C 188 JR C,posi 189 SRL C 190 DJNZ nega 191 OR A 192 JR Z,read2 193final: ADD A,C 194 DEC E 195read2: SCF 196 RET 197twop: LD A,B 198 DEC C 199 AND C 200 INC C 201 RET Z ; carry cleared by AND 202 LD E,B 203rep: SRL C 204 RET c 205 SRL E 206 JR rep 207; 208 org 0x210 209dvi_16: ; 16 bit division dividend in HL, divisor in DE 210 ; remainder in HL, if error carry flag cleared else quotient in BC 211 ; undefined on return: A 212 ; time <= 1940 ticks (2^16-1)/3 213 LD A,D 214 OR E 215 RET Z 216; check for two-power divisor 217 LD B,D 218 LD C,E 219 DEC BC 220 LD A,B 221 AND D 222 JR NZ,normal 223 LD A,C 224 AND E 225 JR NZ,normal 226 LD B,H 227 LD C,L 228 DEC DE 229 LD A,H 230 AND D 231 LD H,A 232 LD A,L 233 AND E 234 LD L,A 235 INC DE 236next: SRL D 237 RR E 238 RET C 239 SRL B 240 RR C 241 JP next 242normal: XOR A 243 LD B,A 244 INC A 245 LD C,A 246 SBC HL,DE 247 JR C,ready0 248adjust: INC A 249 SBC HL,DE 250 JR C,ok 251 SLA E 252 RL D 253 JP adjust 254; now A such that holds: 255; dividend - 2^(A-1)*divisor < 0 and dividend - 2^(A-2)*divisor >= 0 256; now HL -= 2^(A-1) * divisor and DE *= 2^(A-2) 257; now always holds: |dividend - BC * 2^(A-1)*divisor| < 2^(A-1)*divisor 258; and always HL = dividend - BC * 2^(A-1)*divisor 259ok: DEC A 260 ADD HL,DE 261positiv: 262 DEC A 263 JR Z,ready2 264 SRL D 265 RR E 266 SLA C 267 RL B 268 INC BC 269 SBC HL,DE 270 JR NC,positiv 271negativ: 272 SRL D 273 RR E 274 DEC A 275 JR Z,ready1 276 SLA C 277 RL B 278 DEC BC 279 ADD HL,DE 280 JR NC,negativ 281 JP positiv 282ready1: LD A,H 283 OR L 284 JR Z,ready2 285ready0: ADD HL,DE 286 DEC BC 287ready2: SCF 288 RET 289; 290 org 0x280 ; upto 0x3b7 291div_32: ; 32 bit division dividend in HL',HL, divisor in DE',DE 292 ; remainder in HL',HL, if error carry flag cleared else 293 ; quotient in BC',BC 294 ; undefined on return: A,A',IX 295 ; time <= 6649 ticks (2^32-1)/1 296 EXX 297 LD A,D 298 CP 0 299 JR Z,over1 300 CALL msb 301 SUB 9 302 CPL 303 EXX 304 JP found 305over1: 306 LD A,E 307 CP 0 308 JR Z,over2 309 CALL msb 310 SUB 17 311 CPL 312 EXX 313 JP found 314over2: 315 EXX 316 LD A,D 317 CP 0 318 JR Z,over3 319 CALL msb 320 SUB 25 321 CPL 322 JP found 323over3: 324 LD A,E 325 CP 0 326 RET Z 327 CALL msb 328 SUB 33 329 CPL 330found: 331 LD C,A 332 EXX 333 LD A,H 334 CP 0 335 JR Z,next1 336 CALL msb 337 SUB 9 338 CPL 339 EXX 340 JP finded 341next1: 342 LD A,L 343 CP 0 344 JR Z,next2 345 CALL msb 346 SUB 17 347 CPL 348 EXX 349 JP finded 350next2: 351 EXX 352 LD A,H 353 CP 0 354 JR Z,next3 355 CALL msb 356 SUB 25 357 CPL 358 JP finded 359next3: 360 LD A,L 361 CP 0 362 JP Z,zero 363 CALL msb 364 SUB 33 365 CPL 366finded: 367 LD B,A 368 LD A,C 369 SUB B 370 JP C,zero 371; now C holds shift count for divisor 372; now B holds shift count for dividend 373; now A holds difference of most significant bit positions 374; so we get: quotient < 2^(A+1) ; at most A+1 bits long 375 LD B,A 376 EX AF,AF' 377 LD A,B 378 SUB 8 379 JR C,shi 380 LD B,A 381 LD A,D 382 EXX 383 LD D,E 384 LD E,A 385 EXX 386 LD D,E 387 LD E,0 388 LD A,B 389 SUB 8 390 JR C,shi 391 LD B,A 392 LD A,D 393 EXX 394 LD D,E 395 LD E,A 396 EXX 397 LD D,E 398 LD A,B 399 SUB 8 400 JR C,shi 401 LD B,A 402 LD A,D 403 EXX 404 LD D,E 405 LD E,A 406 EXX 407shi: XOR A 408 CP B 409 JR Z,each 410every: SLA E 411 RL D 412 EXX 413 RL E 414 RL D 415 EXX 416 DJNZ every 417each: ; 418 LD B,A 419 LD C,A 420 EXX 421 LD B,A 422 LD C,A 423; now DE',DE are HL',HL adjusted (have same highest bit set) 424; BC',BC holds the to-calculate quotient and A' holds the shift difference 425; and we are in the '-register set active 426 LD IX,loop0 427loop0: LD A,H 428 CP D 429 JR C,go_on 430 JR NZ,do_it 431 OR A 432 JR NZ,loop1 433 LD IX,loop1 434loop1: LD A,L 435 CP E 436 JR C,go_on 437 JR NZ,do_it 438 OR A 439 JR NZ,loop2 440 LD IX,loop2 441loop2: EXX 442 LD A,H 443 CP D 444 EXX 445 JR C,go_on 446 JR NZ,do_it 447 OR A 448 JR NZ,loop3 449 LD IX,loop3 450loop3: EXX 451 LD A,L 452 CP E 453 EXX 454 JR C,go_on 455do_it: EXX 456 INC C 457 SBC HL,DE 458 EXX 459 SBC HL,DE 460go_on: EX AF,AF' 461 OR A 462 JR Z,finish 463 DEC A 464 EX AF,AF' 465 SRL D 466 RR E 467 EXX 468 RR D 469 RR E 470 SLA C 471 RL B 472 EXX 473 RL C 474 RL B 475 JP (IX) 476zero: XOR A 477 LD B,A 478 LD C,A 479 EXX 480 LD B,A 481 LD C,A 482finish: EXX 483 SCF 484 RET 485; 486 org 0x400 487div_64: ; 64 bit division dividend in IY,HL,HL',IX 488 ; divisor in DE,BC,DE',BC' 489 ; remainder in IY,HL,HL',IX if error carry flag cleared else 490 ; quotient in DE(highest), BC(high), DE'(low), BC'(lowest) 491 ; needs 4*2=8 bytes on stack 492 LD A,D 493 CP 0 494 JR Z,sor1 495 CALL msb 496 SUB 9 497 CPL 498 JP dsor 499sor1: 500 LD A,E 501 CP 0 502 JR Z,sor2 503 CALL msb 504 SUB 17 505 CPL 506 JP dsor 507sor2: 508 LD A,B 509 CP 0 510 JR Z,sor3 511 CALL msb 512 SUB 25 513 CPL 514 JP dsor 515sor3: 516 LD A,C 517 CP 0 518 JR Z,sor4 519 CALL msb 520 SUB 33 521 CPL 522 JP dsor 523sor4: 524 EXX 525 LD A,D 526 CP 0 527 JR Z,sor5 528 CALL msb 529 SUB 41 530 CPL 531 EXX 532 JP dsor 533sor5: 534 LD A,E 535 CP 0 536 JR Z,sor6 537 CALL msb 538 SUB 49 539 CPL 540 EXX 541 JP dsor 542sor6: 543 LD A,B 544 CP 0 545 JR Z,sor7 546 CALL msb 547 SUB 57 548 CPL 549 EXX 550 JP dsor 551sor7: 552 LD A,C 553 CP 0 554 RET Z 555 CALL msb 556 SUB 65 557 CPL 558 EXX 559dsor: 560 EX AF,AF' 561 PUSH IY 562 POP AF 563 CP 0 564 JR Z,end1 565 CALL msb 566 SUB 9 567 CPL 568 JP dend 569end1: 570 PUSH IY 571 DEC SP 572 POP AF 573 INC SP 574 CP 0 575 JR Z,end2 576 CALL msb 577 SUB 17 578 CPL 579 JP dend 580end2: 581 LD A,H 582 CP 0 583 JR Z,end3 584 CALL msb 585 SUB 25 586 CPL 587 JP dend 588end3: 589 LD A,L 590 CP 0 591 JR Z,end4 592 CALL msb 593 SUB 33 594 CPL 595 JP dend 596end4: 597 EXX 598 LD A,H 599 CP 0 600 JR Z,end5 601 CALL msb 602 SUB 41 603 CPL 604 EXX 605 JP dend 606end5: 607 LD A,L 608 CP 0 609 JR Z,end6 610 CALL msb 611 SUB 49 612 CPL 613 EXX 614 JP dend 615end6: 616 EXX 617 PUSH IX 618 POP AF 619 CP 0 620 JR Z,end7 621 CALL msb 622 SUB 57 623 CPL 624 JP dend 625end7: 626 PUSH IX 627 DEC SP 628 POP AF 629 INC SP 630 CP 0 631 JP Z,null 632 CALL msb 633 SUB 65 634 CPL 635dend: 636; now A' holds shift count for divisor 637; and A holds shift count for dividend 638 PUSH BC 639 LD B,A 640 EX AF,AF' 641 LD C,A 642 SUB B 643 JP C,null_pop 644 LD B,A 645 PUSH BC ; divisor-dividend in B and shift count of divisor in C 646 EX AF,AF' ; now A hold shift count for dividend 647 SUB 32 648 JR C,shi_d1 649 EXX 650 PUSH HL 651 LD HL,0 652 EXX 653 POP IY 654 PUSH IX 655 LD IX,0 656 POP HL 657 SUB 32 658shi_d1: ADD A,16 659 JR NC,shi_d2 660 PUSH HL 661 POP IY 662 EXX 663 PUSH HL 664 EXX 665 POP HL 666 PUSH IX 667 EXX 668 POP HL 669 EXX 670 LD IX,0 671 SUB 16 672shi_d2: ADD A,8 673 JR NC,shi_d3 674 PUSH HL 675 PUSH IY 676 POP HL 677 POP BC 678 LD H,L 679 LD L,B 680 PUSH HL 681 POP IY 682 EXX 683 PUSH HL 684 EXX 685 POP HL 686 EX AF,AF' 687 LD A,L 688 LD L,H 689 LD H,C 690 EXX 691 PUSH IX 692 PUSH IX 693 POP HL 694 LD L,H 695 LD H,A 696 EXX 697 POP BC 698 LD B,C 699 LD C,0 700 PUSH BC 701 POP IX 702 EX AF,AF' 703 SUB 8 704shi_d3: ADD A,8 705 JR Z,alright 706 LD B,A 707 XOR A 708shi_dend: ADD IX,IX 709 EXX 710 ADC HL,HL 711 EXX 712 ADC HL,HL 713 ADC A,A 714 ADD IY,IY 715 CP 0 716 JR Z,not 717 INC IY 718 XOR A 719not: DJNZ shi_dend 720alright: POP BC 721 LD A,B ; divisor-dividend 722 EX AF,AF' 723 LD A,C ; shift count of divisor 724 POP BC 725 PUSH AF ; save shift count of divisor 726 INC SP 727 EX AF,AF' 728 PUSH AF ; save shift count difference 729 INC SP 730 EX AF,AF' 731 SUB 32 732 JR C,shi_r1 733 EXX 734 PUSH DE 735 PUSH BC 736 LD DE,0 737 LD BC,0 738 EXX 739 POP BC 740 POP DE 741 SUB 32 742shi_r1: ADD A,16 743 JR NC,shi_r2 744 LD D,B 745 LD E,C 746 EXX 747 PUSH DE 748 EXX 749 POP BC 750 EXX 751 LD D,B 752 LD E,C 753 LD BC,0 754 EXX 755 SUB 16 756shi_r2: ADD A,8 757 JR NC,shi_r3 758 LD D,E 759 LD E,B 760 LD B,C 761 LD C,A 762 EXX 763 LD A,D 764 LD D,E 765 LD E,B 766 LD B,C 767 EX AF,AF' 768 LD C,A 769 EXX 770 LD A,C 771 EX AF,AF' 772 LD C,A 773 EXX 774 LD A,C 775 EX AF,AF' 776 LD C,0 777 EXX 778 SUB 8 779shi_r3: ADD A,8 780 JR Z,allrig 781shi_dsor: EXX 782 SLA C 783 RL B 784 RL E 785 RL D 786 EXX 787 RL C 788 RL B 789 RL E 790 RL D 791 DEC A 792 JR NZ,shi_dsor 793allrig: 794; now dividend and divisor are both left adjusted (highest 63-th bit set) 795; A' holds the shift difference 796 LD A,D 797 CPL 798 LD D,A 799 LD A,E 800 CPL 801 LD E,A 802 INC DE 803 EXX 804 LD A,B 805 CPL 806 LD B,A 807 LD A,C 808 CPL 809 LD C,A 810 INC BC 811 EXX 812; JR Z=BC, lowernocompl 813; 814repeat: 815 PUSH IY 816 ADD IY,DE 817 JR C,subtr1 818 JR NZ,non1 819 SBC HL,BC 820 JR C,non2 821 JR NZ,subtr2 822 EXX 823 SBC HL,DE 824 JR C,non3 825 JR NZ,subtr3 826 ADD IX,BC 827 JR C,subtr4 828 JR NZ,non4 829 JR subtr4 830; 831subtr1: EXX 832 ADD IX,BC 833 CCF 834 SBC HL,DE 835 EXX 836 SBC HL,BC 837 JR NC,sub_ok 838 DEC IY 839 JR sub_ok 840subtr2: EXX 841 ADD IX,BC 842 CCF 843 SBC HL,DE 844 JR NC,subtr4 845 EXX 846 DEC HL 847 JR sub_ok 848subtr3: ADD IX,BC 849 JR C,subtr4 850 DEC HL 851subtr4: EXX 852sub_ok: POP AF 853sure: 854 EX AF,AF' 855 OR A 856 JR Z,final1 857 DEC A 858 EX AF,AF' 859 XOR A 860 ADD IX,IX 861 INC IX 862 JR common 863; 864non4: EX DE,HL 865 LD A,B 866 CPL 867 LD D,A 868 LD A,C 869 CPL 870 LD E,A 871 INC DE 872 ADD IX,DE 873 EX DE,HL 874 XOR A 875 LD H,A 876 LD L,A 877non3: ADD HL,DE 878 EXX 879non2: ADD HL,BC 880non1: POP IY 881; 882 EX AF,AF' 883 OR A 884 JR Z,final0 885 DEC A 886 EX AF,AF' 887 XOR A 888 ADD IX,IX 889; 890common: EXX 891 ADC HL,HL 892 EXX 893 ADC HL,HL 894 ADC A,A 895 ADD IY,IY 896 DEC A 897 JR NZ,nocar 898 INC IY 899 CPL 900nocar: CPL ; still carry from IY shift 901 JP NC, repeat 902 ADD IY,DE 903 EXX 904 ADD IX,BC 905 CCF 906 SBC HL,DE 907 EXX 908 SBC HL,BC 909 JR NC,sure 910 DEC IY 911 JR sure 912; 913final1: SCF 914final0: LD A,0 915 ADC A,A 916 PUSH IY 917 POP DE 918 LD B,H 919 LD C,L 920 EXX 921 LD D,H 922 LD E,L 923 PUSH IX 924 POP BC 925 EXX 926 ADD IX,IX 927 DEC A 928 JR NZ,oooo 929 INC IX 930 CPL 931oooo: CPL 932 EXX 933 ADC HL,HL 934 EXX 935 ADC HL,HL 936 ADC A,A 937 ADD IY,IY 938 CP 0 939 JR Z,nono 940 INC IY 941nono: ; 942 POP AF ; now A holds shift count of divisor 943 PUSH AF 944 CP 32 945 JR C,no32 946 SUB 32 947 PUSH DE 948 PUSH BC 949 LD D,0 950 LD E,D 951 LD B,D 952 LD C,D 953 EXX 954 POP BC 955 POP DE 956 EXX 957no32: CP 16 958 JR C,no16 959 SUB 16 960 PUSH BC 961 EXX 962 LD C,E 963 LD B,D 964 POP DE 965 EXX 966 LD C,E 967 LD B,D 968 LD D,0 969 LD E,D 970no16: CP 8 971 JR C,no8 972 SUB 8 973 EX AF,AF' 974 LD A,C 975 EXX 976 LD C,B 977 LD B,E 978 LD E,D 979 LD D,A 980 EX AF,AF' 981 EXX 982 LD C,B 983 LD B,E 984 LD E,D 985 LD D,0 986no8: CP 0 987 JR Z,remainder 988remain: SRL D 989 RR E 990 RR B 991 RR C 992 EXX 993 RR D 994 RR E 995 RR B 996 RR C 997 EXX 998 DEC A 999 JR NZ,remain 1000remainder: PUSH IX 1001 PUSH DE 1002 POP IX 1003 POP DE 1004 LD A,H 1005 LD H,B 1006 LD B,A 1007 LD A,L 1008 LD L,E 1009 LD E,A 1010 EXX 1011 LD A,H 1012 LD H,B 1013 LD B,A 1014 LD A,L 1015 LD L,E 1016 LD E,A 1017 PUSH IX 1018 PUSH BC 1019 POP IX 1020 POP BC 1021 EXX 1022 DEC SP 1023 POP AF ; now A holds shift difference and remainder in IY,HL,HL',IX 1024 INC SP 1025 SUB 31 1026 CPL 1027 INC A ; the A highest bits in DE,BC,DE',BC' must still be cleared 1028 CP 8 1029 JR NC,weit1 1030 SUB 9 1031 CPL 1032 call t_power 1033 DEC A 1034 AND D 1035 LD D,A 1036 SCF 1037 RET 1038weit1: SUB 8 1039 LD D,0 1040 CP 8 1041 JR NC,weit2 1042 SUB 9 1043 CPL 1044 call t_power 1045 DEC A 1046 AND E 1047 LD E,A 1048 SCF 1049 RET 1050weit2: SUB 8 1051 LD E,0 1052 CP 8 1053 JR NC,weit3 1054 SUB 9 1055 CPL 1056 call t_power 1057 DEC A 1058 AND B 1059 LD B,A 1060 SCF 1061 RET 1062weit3: SUB 8 1063 LD B,0 1064 CP 8 1065 JR NC,weit4 1066 SUB 9 1067 CPL 1068 call t_power 1069 DEC A 1070 AND C 1071 LD C,A 1072 SCF 1073 RET 1074weit4: SUB 8 1075 LD C,0 1076 EXX 1077 CP 8 1078 JR NC,weit5 1079 SUB 9 1080 CPL 1081 call t_power 1082 DEC A 1083 AND D 1084 LD D,A 1085 SCF 1086 RET 1087weit5: SUB 8 1088 LD D,0 1089 CP 8 1090 JR NC,weit6 1091 SUB 9 1092 CPL 1093 call t_power 1094 DEC A 1095 AND E 1096 LD E,A 1097 SCF 1098 RET 1099weit6: SUB 8 1100 LD E,0 1101 CP 8 1102 JR NC,weit7 1103 SUB 9 1104 CPL 1105 call t_power 1106 DEC A 1107 AND B 1108 LD B,A 1109 SCF 1110 RET 1111weit7: SUB 8 1112 LD B,0 1113; CP 8 1114; JR NC,weit8 1115 SUB 9 1116 CPL 1117 call t_power 1118 DEC A 1119 AND C 1120 LD C,A 1121 SCF 1122 RET 1123null_pop: POP BC 1124null: XOR A 1125 LD D,A 1126 LD E,A 1127 LD B,A 1128 LD C,A 1129 EXX 1130 LD D,A 1131 LD E,A 1132 LD B,A 1133 LD C,A 1134 EXX 1135 SCF 1136 RET 1137; 1138tt_power: ; returns in in A the two-power 2^A if 0<=A<8 or 0 if A >= 8 1139 ; undefined in return: F 1140 ; time = 71 ticks (in the case A < 8) 1141 CP 8 1142 JR NC,out_shifted 1143 PUSH HL 1144 LD HL,table 1145 OR L 1146 LD L,A 1147 LD A,(HL) 1148 POP HL 1149 RET 1150out_shifted XOR A 1151 RET 1152 ALIGN 3 1153table: defb 1,2,4,8,10h,20h,40h,80H 1154