1 /* $NetBSD: nouveau_subdev_mc_nv50.c,v 1.1.1.1 2014/08/06 12:36:31 riastradh Exp $ */
2
3 /*
4 * Copyright 2012 Red Hat Inc.
5 *
6 * Permission is hereby granted, free of charge, to any person obtaining a
7 * copy of this software and associated documentation files (the "Software"),
8 * to deal in the Software without restriction, including without limitation
9 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
10 * and/or sell copies of the Software, and to permit persons to whom the
11 * Software is furnished to do so, subject to the following conditions:
12 *
13 * The above copyright notice and this permission notice shall be included in
14 * all copies or substantial portions of the Software.
15 *
16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
22 * OTHER DEALINGS IN THE SOFTWARE.
23 *
24 * Authors: Ben Skeggs
25 */
26
27 #include <sys/cdefs.h>
28 __KERNEL_RCSID(0, "$NetBSD: nouveau_subdev_mc_nv50.c,v 1.1.1.1 2014/08/06 12:36:31 riastradh Exp $");
29
30 #include "nv04.h"
31
32 const struct nouveau_mc_intr
33 nv50_mc_intr[] = {
34 { 0x00000001, NVDEV_ENGINE_MPEG },
35 { 0x00000100, NVDEV_ENGINE_FIFO },
36 { 0x00001000, NVDEV_ENGINE_GR },
37 { 0x00004000, NVDEV_ENGINE_CRYPT }, /* NV84- */
38 { 0x00008000, NVDEV_ENGINE_BSP }, /* NV84- */
39 { 0x00020000, NVDEV_ENGINE_VP }, /* NV84- */
40 { 0x00100000, NVDEV_SUBDEV_TIMER },
41 { 0x00200000, NVDEV_SUBDEV_GPIO },
42 { 0x04000000, NVDEV_ENGINE_DISP },
43 { 0x10000000, NVDEV_SUBDEV_BUS },
44 { 0x80000000, NVDEV_ENGINE_SW },
45 { 0x0002d101, NVDEV_SUBDEV_FB },
46 {},
47 };
48
49 static void
nv50_mc_msi_rearm(struct nouveau_mc * pmc)50 nv50_mc_msi_rearm(struct nouveau_mc *pmc)
51 {
52 struct nouveau_device *device = nv_device(pmc);
53 pci_write_config_byte(device->pdev, 0x68, 0xff);
54 }
55
56 int
nv50_mc_init(struct nouveau_object * object)57 nv50_mc_init(struct nouveau_object *object)
58 {
59 struct nv04_mc_priv *priv = (void *)object;
60 nv_wr32(priv, 0x000200, 0xffffffff); /* everything on */
61 return nouveau_mc_init(&priv->base);
62 }
63
64 struct nouveau_oclass *
65 nv50_mc_oclass = &(struct nouveau_mc_oclass) {
66 .base.handle = NV_SUBDEV(MC, 0x50),
67 .base.ofuncs = &(struct nouveau_ofuncs) {
68 .ctor = nv04_mc_ctor,
69 .dtor = _nouveau_mc_dtor,
70 .init = nv50_mc_init,
71 .fini = _nouveau_mc_fini,
72 },
73 .intr = nv50_mc_intr,
74 .msi_rearm = nv50_mc_msi_rearm,
75 }.base;
76