1 #ifndef UAE_IDE_H 2 #define UAE_IDE_H 3 4 #include "uae/types.h" 5 #ifdef FSUAE 6 #include "uae/memory.h" 7 #include "commpipe.h" 8 #include "filesys.h" 9 #endif 10 11 /* IDE drive registers */ 12 #define IDE_DATA 0x00 13 #define IDE_ERROR 0x01 /* see err-bits */ 14 #define IDE_NSECTOR 0x02 /* sector count, nr of sectors to read/write */ 15 #define IDE_SECTOR 0x03 /* starting sector */ 16 #define IDE_LCYL 0x04 /* starting cylinder */ 17 #define IDE_HCYL 0x05 /* high byte of starting cyl */ 18 #define IDE_SELECT 0x06 /* 101dhhhh , d=drive, hhhh=head */ 19 #define IDE_STATUS 0x07 /* see status-bits */ 20 21 #define IDE_SECONDARY 0x0400 22 #define IDE_DEVCON 0x0406 23 #define IDE_DRVADDR 0x0407 24 25 struct ide_registers 26 { 27 uae_u8 ide_select, ide_nsector, ide_sector, ide_lcyl, ide_hcyl, ide_devcon, ide_error, ide_feat; 28 uae_u8 ide_nsector2, ide_sector2, ide_lcyl2, ide_hcyl2, ide_feat2; 29 uae_u8 ide_status; 30 }; 31 32 struct ide_thread_state; 33 struct ide_hdf; 34 35 #define MAX_IDE_PORTS_BOARD 2 36 struct ide_board 37 { 38 uae_u8 *rom; 39 uae_u8 acmemory[128]; 40 int rom_size; 41 int rom_start; 42 int rom_mask; 43 uaecptr baseaddress; 44 int configured; 45 bool keepautoconfig; 46 int mask; 47 addrbank *bank; 48 struct ide_hdf *ide[MAX_IDE_PORTS_BOARD]; 49 bool irq; 50 bool intena; 51 bool enabled; 52 int state; 53 int type; 54 int userdata; 55 int subtype; 56 uae_u16 data_latch; 57 struct romconfig *rc, *original_rc; 58 struct ide_board **self_ptr; 59 }; 60 61 struct ide_hdf 62 { 63 struct hd_hardfiledata hdhfd; 64 struct ide_board *board; 65 struct ide_registers regs; 66 struct ide_registers *regs0; 67 struct ide_registers *regs1; 68 struct ide_hdf *pair; // master<>slave 69 struct ide_thread_state *its; 70 bool byteswap; 71 int byteswapped_buffer; 72 bool adide; 73 74 uae_u8 *secbuf; 75 int secbuf_size; 76 int buffer_offset; 77 int data_offset; 78 int data_size; 79 int data_multi; 80 int direction; // 0 = read, 1 = write 81 bool intdrq; 82 bool lba48; 83 bool lba48cmd; 84 uae_u64 start_lba; 85 int start_nsec; 86 uae_u8 multiple_mode; 87 int irq_delay; 88 int irq; 89 bool irq_new; 90 int num; 91 int blocksize; 92 int maxtransferstate; 93 int ata_level; 94 int ide_drv; 95 int media_type; 96 bool mode_8bit; 97 98 bool atapi; 99 bool atapi_drdy; 100 int cd_unit_num; 101 int packet_state; 102 int packet_data_size; 103 int packet_data_offset; 104 int packet_transfer_size; 105 struct scsi_data *scsi; 106 }; 107 108 struct ide_thread_state 109 { 110 struct ide_hdf **idetable; 111 int idetotal; 112 volatile int state; 113 smp_comm_pipe requests; 114 }; 115 116 uae_u32 ide_read_reg (struct ide_hdf *ide, int ide_reg); 117 void ide_write_reg (struct ide_hdf *ide, int ide_reg, uae_u32 val); 118 void ide_put_data(struct ide_hdf *ide, uae_u16 v); 119 uae_u16 ide_get_data(struct ide_hdf *ide); 120 void ide_put_data_8bit(struct ide_hdf *ide, uae_u8 v); 121 uae_u8 ide_get_data_8bit(struct ide_hdf *ide); 122 123 bool ide_interrupt_hsync(struct ide_hdf *ide); 124 bool ide_irq_check(struct ide_hdf *ide, bool edge_triggered); 125 bool ide_drq_check(struct ide_hdf *ide); 126 bool ide_isdrive(struct ide_hdf *ide); 127 void ide_initialize(struct ide_hdf **idetable, int chpair); 128 struct ide_hdf *add_ide_unit (struct ide_hdf **idetable, int max, int ch, struct uaedev_config_info *ci, struct romconfig *rc); 129 void remove_ide_unit(struct ide_hdf **idetable, int ch); 130 void alloc_ide_mem (struct ide_hdf **ide, int max, struct ide_thread_state *its); 131 void ide_reset_device(struct ide_hdf *ide); 132 133 void start_ide_thread(struct ide_thread_state *its); 134 void stop_ide_thread(struct ide_thread_state *its); 135 136 uae_u16 adide_decode_word(uae_u16 w); 137 uae_u16 adide_encode_word(uae_u16 w); 138 139 uae_u8 *ide_save_state(uae_u8 *dst, struct ide_hdf *ide); 140 uae_u8 *ide_restore_state(uae_u8 *src, struct ide_hdf *ide); 141 142 #define IDE_MEMORY_FUNCTIONS(x, y, z) \ 143 static void REGPARAM2 x ## _bput(uaecptr addr, uae_u32 b) \ 144 { \ 145 y ## _write_byte(z, addr, b); \ 146 } \ 147 static void REGPARAM2 x ## _wput(uaecptr addr, uae_u32 b) \ 148 { \ 149 y ## _write_word(z, addr, b); \ 150 } \ 151 static void REGPARAM2 x ## _lput(uaecptr addr, uae_u32 b) \ 152 { \ 153 y ## _write_word(z, addr, b >> 16); \ 154 y ## _write_word(z, addr + 2, b); \ 155 } \ 156 static uae_u32 REGPARAM2 x ## _bget(uaecptr addr) \ 157 { \ 158 return y ## _read_byte(z, addr); \ 159 } \ 160 static uae_u32 REGPARAM2 x ## _wget(uaecptr addr) \ 161 { \ 162 return y ## _read_word(z, addr); \ 163 } \ 164 static uae_u32 REGPARAM2 x ## _lget(uaecptr addr) \ 165 { \ 166 uae_u32 v = y ## _read_word(z, addr) << 16; \ 167 v |= y ## _read_word(z, addr + 2); \ 168 return v; \ 169 } 170 171 #endif /* UAE_IDE_H */ 172