1 // Licensed to the .NET Foundation under one or more agreements.
2 // The .NET Foundation licenses this file to you under the MIT license.
3 // See the LICENSE file in the project root for more information.
4 
5 #if defined(_TARGET_X86_) || defined(_TARGET_AMD64_)
6 
7 struct REGDISPLAY
8 {
9     PTR_UIntNative pRax;
10     PTR_UIntNative pRcx;
11     PTR_UIntNative pRdx;
12     PTR_UIntNative pRbx;
13     //           pEsp;
14     PTR_UIntNative pRbp;
15     PTR_UIntNative pRsi;
16     PTR_UIntNative pRdi;
17 #ifdef _TARGET_AMD64_
18     PTR_UIntNative pR8;
19     PTR_UIntNative pR9;
20     PTR_UIntNative pR10;
21     PTR_UIntNative pR11;
22     PTR_UIntNative pR12;
23     PTR_UIntNative pR13;
24     PTR_UIntNative pR14;
25     PTR_UIntNative pR15;
26 #endif // _TARGET_AMD64_
27 
28     UIntNative   SP;
29     PTR_PCODE    pIP;
30     PCODE        IP;
31 
32 #if defined(_TARGET_AMD64_) && !defined(UNIX_AMD64_ABI)
33     Fp128          Xmm[16-6]; // preserved xmm6..xmm15 regs for EH stackwalk
34                               // these need to be unwound during a stack walk
35                               // for EH, but not adjusted, so we only need
36                               // their values, not their addresses
37 #endif // _TARGET_AMD64_ && !UNIX_AMD64_ABI
38 
GetIPREGDISPLAY39     inline PCODE GetIP() { return IP; }
GetAddrOfIPREGDISPLAY40     inline PTR_PCODE GetAddrOfIP() { return pIP; }
GetSPREGDISPLAY41     inline UIntNative GetSP() { return SP; }
GetFPREGDISPLAY42     inline UIntNative GetFP() { return *pRbp; }
GetPPREGDISPLAY43     inline UIntNative GetPP() { return *pRbx; }
44 
SetIPREGDISPLAY45     inline void SetIP(PCODE IP) { this->IP = IP; }
SetAddrOfIPREGDISPLAY46     inline void SetAddrOfIP(PTR_PCODE pIP) { this->pIP = pIP; }
SetSPREGDISPLAY47     inline void SetSP(UIntNative SP) { this->SP = SP; }
48 };
49 
50 #elif defined(_TARGET_ARM_)
51 
52 struct REGDISPLAY
53 {
54     PTR_UIntNative pR0;
55     PTR_UIntNative pR1;
56     PTR_UIntNative pR2;
57     PTR_UIntNative pR3;
58     PTR_UIntNative pR4;
59     PTR_UIntNative pR5;
60     PTR_UIntNative pR6;
61     PTR_UIntNative pR7;
62     PTR_UIntNative pR8;
63     PTR_UIntNative pR9;
64     PTR_UIntNative pR10;
65     PTR_UIntNative pR11;
66     PTR_UIntNative pR12;
67     PTR_UIntNative pLR;
68 
69     UIntNative   SP;
70     PTR_PCODE    pIP;
71     PCODE        IP;
72 
73     UInt64       D[16-8]; // preserved D registers D8..D15 (note that D16-D31 are not preserved according to the ABI spec)
74                           // these need to be unwound during a stack walk
75                           // for EH, but not adjusted, so we only need
76                           // their values, not their addresses
77 
GetIPREGDISPLAY78     inline PCODE GetIP() { return IP; }
GetAddrOfIPREGDISPLAY79     inline PTR_PCODE GetAddrOfIP() { return pIP; }
GetSPREGDISPLAY80     inline UIntNative GetSP() { return SP; }
GetFPREGDISPLAY81     inline UIntNative GetFP() { return *pR7; }
82 
SetIPREGDISPLAY83     inline void SetIP(PCODE IP) { this->IP = IP; }
SetAddrOfIPREGDISPLAY84     inline void SetAddrOfIP(PTR_PCODE pIP) { this->pIP = pIP; }
SetSPREGDISPLAY85     inline void SetSP(UIntNative SP) { this->SP = SP; }
86 };
87 
88 #elif defined(_TARGET_ARM64_)
89 
90 struct REGDISPLAY
91 {
92     PTR_UIntNative pX0;
93     PTR_UIntNative pX1;
94     PTR_UIntNative pX2;
95     PTR_UIntNative pX3;
96     PTR_UIntNative pX4;
97     PTR_UIntNative pX5;
98     PTR_UIntNative pX6;
99     PTR_UIntNative pX7;
100     PTR_UIntNative pX8;
101     PTR_UIntNative pX9;
102     PTR_UIntNative pX10;
103     PTR_UIntNative pX11;
104     PTR_UIntNative pX12;
105     PTR_UIntNative pX13;
106     PTR_UIntNative pX14;
107     PTR_UIntNative pX15;
108     PTR_UIntNative pX16;
109     PTR_UIntNative pX17;
110     PTR_UIntNative pX18;
111     PTR_UIntNative pX19;
112     PTR_UIntNative pX20;
113     PTR_UIntNative pX21;
114     PTR_UIntNative pX22;
115     PTR_UIntNative pX23;
116     PTR_UIntNative pX24;
117     PTR_UIntNative pX25;
118     PTR_UIntNative pX26;
119     PTR_UIntNative pX27;
120     PTR_UIntNative pX28;
121     PTR_UIntNative pFP; // X29
122     PTR_UIntNative pLR; // X30
123 
124     UIntNative   SP;
125     PTR_PCODE    pIP;
126     PCODE        IP;
127 
128     UInt64       D[16-8]; // Only the bottom 64-bit value of the V registers V8..V15 needs to be preserved
129                           // (V0-V7 and V16-V31 are not preserved according to the ABI spec).
130                           // These need to be unwound during a stack walk
131                           // for EH, but not adjusted, so we only need
132                           // their values, not their addresses
133 
GetIPREGDISPLAY134     inline PCODE GetIP() { return IP; }
GetAddrOfIPREGDISPLAY135     inline PTR_PCODE GetAddrOfIP() { return pIP; }
GetSPREGDISPLAY136     inline UIntNative GetSP() { return SP; }
GetFPREGDISPLAY137     inline UIntNative GetFP() { return *pFP; }
138 
SetIPREGDISPLAY139     inline void SetIP(PCODE IP) { this->IP = IP; }
SetAddrOfIPREGDISPLAY140     inline void SetAddrOfIP(PTR_PCODE pIP) { this->pIP = pIP; }
SetSPREGDISPLAY141     inline void SetSP(UIntNative SP) { this->SP = SP; }
142 };
143 #elif defined(_TARGET_WASM_)
144 
145 struct REGDISPLAY
146 {
147     // TODO: WebAssembly doesn't really have registers. What exactly do we need here?
148 
149     UIntNative   SP;
150     PTR_PCODE    pIP;
151     PCODE        IP;
152 
GetIPREGDISPLAY153     inline PCODE GetIP() { return NULL; }
GetAddrOfIPREGDISPLAY154     inline PTR_PCODE GetAddrOfIP() { return NULL; }
GetSPREGDISPLAY155     inline UIntNative GetSP() { return 0; }
GetFPREGDISPLAY156     inline UIntNative GetFP() { return 0; }
157 
SetIPREGDISPLAY158     inline void SetIP(PCODE IP) { }
SetAddrOfIPREGDISPLAY159     inline void SetAddrOfIP(PTR_PCODE pIP) { }
SetSPREGDISPLAY160     inline void SetSP(UIntNative SP) { }
161 };
162 #endif // _X86_ || _AMD64_ || _ARM_ || _ARM64_ || _WASM_
163 
164 typedef REGDISPLAY * PREGDISPLAY;
165