1 /* $OpenBSD: pcivar.h,v 1.80 2024/05/13 01:15:51 jsg Exp $ */ 2 /* $NetBSD: pcivar.h,v 1.23 1997/06/06 23:48:05 thorpej Exp $ */ 3 4 /* 5 * Copyright (c) 1996 Christopher G. Demetriou. All rights reserved. 6 * Copyright (c) 1994 Charles Hannum. All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by Charles Hannum. 19 * 4. The name of the author may not be used to endorse or promote products 20 * derived from this software without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 */ 33 34 #ifndef _DEV_PCI_PCIVAR_H_ 35 #define _DEV_PCI_PCIVAR_H_ 36 37 /* 38 * Definitions for PCI autoconfiguration. 39 * 40 * This file describes types and functions which are used for PCI 41 * configuration. Some of this information is machine-specific, and is 42 * provided by pci_machdep.h. 43 */ 44 45 #include <sys/device.h> 46 #include <sys/malloc.h> 47 #include <sys/extent.h> 48 #include <machine/bus.h> 49 #include <dev/pci/pcireg.h> 50 51 /* 52 * Structures and definitions needed by the machine-dependent header. 53 */ 54 typedef u_int32_t pcireg_t; /* configuration space register XXX */ 55 56 /* 57 * Power Management (PCI 2.2) 58 */ 59 #define PCI_PWR_D0 0 60 #define PCI_PWR_D1 1 61 #define PCI_PWR_D2 2 62 #define PCI_PWR_D3 3 63 64 struct pci_matchid { 65 pci_vendor_id_t pm_vid; 66 pci_product_id_t pm_pid; 67 }; 68 69 #ifdef _KERNEL 70 71 struct pcibus_attach_args; 72 struct pci_softc; 73 74 /* 75 * Machine-dependent definitions. 76 */ 77 #if defined(__alpha__) 78 #include <alpha/pci/pci_machdep.h> 79 #elif defined(__i386__) 80 #include <i386/pci/pci_machdep.h> 81 #else 82 #include <machine/pci_machdep.h> 83 #endif 84 85 /* 86 * PCI bus attach arguments. 87 */ 88 struct pcibus_attach_args { 89 char *pba_busname; /* XXX should be common */ 90 bus_space_tag_t pba_iot; /* pci i/o space tag */ 91 bus_space_tag_t pba_memt; /* pci mem space tag */ 92 bus_dma_tag_t pba_dmat; /* DMA tag */ 93 pci_chipset_tag_t pba_pc; 94 int pba_flags; /* flags; see below */ 95 96 struct extent *pba_ioex; 97 struct extent *pba_memex; 98 struct extent *pba_pmemex; 99 struct extent *pba_busex; 100 101 int pba_domain; /* PCI domain */ 102 int pba_bus; /* PCI bus number */ 103 104 /* 105 * Pointer to the pcitag of our parent bridge. If there is no 106 * parent bridge, then we assume we are a root bus. 107 */ 108 pcitag_t *pba_bridgetag; 109 pci_intr_handle_t *pba_bridgeih; 110 111 /* 112 * Interrupt swizzling information. These fields 113 * are only used by secondary busses. 114 */ 115 u_int pba_intrswiz; /* how to swizzle pins */ 116 pcitag_t pba_intrtag; /* intr. appears to come from here */ 117 }; 118 119 /* 120 * PCI device attach arguments. 121 */ 122 struct pci_attach_args { 123 bus_space_tag_t pa_iot; /* pci i/o space tag */ 124 bus_space_tag_t pa_memt; /* pci mem space tag */ 125 bus_dma_tag_t pa_dmat; /* DMA tag */ 126 pci_chipset_tag_t pa_pc; 127 int pa_flags; /* flags; see below */ 128 129 struct extent *pa_ioex; 130 struct extent *pa_memex; 131 struct extent *pa_pmemex; 132 struct extent *pa_busex; 133 134 u_int pa_domain; 135 u_int pa_bus; 136 u_int pa_device; 137 u_int pa_function; 138 pcitag_t pa_tag; 139 pcireg_t pa_id, pa_class; 140 141 pcitag_t *pa_bridgetag; 142 pci_intr_handle_t *pa_bridgeih; 143 144 /* 145 * Interrupt information. 146 * 147 * "Intrline" is used on systems whose firmware puts 148 * the right routing data into the line register in 149 * configuration space. The rest are used on systems 150 * that do not. 151 */ 152 u_int pa_intrswiz; /* how to swizzle pins if ppb */ 153 pcitag_t pa_intrtag; /* intr. appears to come from here */ 154 pci_intr_pin_t pa_intrpin; /* intr. appears on this pin */ 155 pci_intr_line_t pa_intrline; /* intr. routing information */ 156 pci_intr_pin_t pa_rawintrpin; /* unswizzled pin */ 157 }; 158 159 /* 160 * Flags given in the bus and device attachment args. 161 * 162 * OpenBSD doesn't actually use them yet -- csapuntz@cvs.openbsd.org 163 */ 164 #define PCI_FLAGS_IO_ENABLED 0x01 /* I/O space is enabled */ 165 #define PCI_FLAGS_MEM_ENABLED 0x02 /* memory space is enabled */ 166 #define PCI_FLAGS_MRL_OKAY 0x04 /* Memory Read Line okay */ 167 #define PCI_FLAGS_MRM_OKAY 0x08 /* Memory Read Multiple okay */ 168 #define PCI_FLAGS_MWI_OKAY 0x10 /* Memory Write and Invalidate 169 okay */ 170 #define PCI_FLAGS_MSI_ENABLED 0x20 /* Message Signaled Interrupt 171 enabled */ 172 #define PCI_FLAGS_MSIVEC_ENABLED 0x40 /* Multiple Message Capability 173 enabled */ 174 175 /* 176 * 177 */ 178 struct pci_quirkdata { 179 pci_vendor_id_t vendor; /* Vendor ID */ 180 pci_product_id_t product; /* Product ID */ 181 int quirks; /* quirks; see below */ 182 }; 183 #define PCI_QUIRK_MULTIFUNCTION 1 184 #define PCI_QUIRK_MONOFUNCTION 2 185 186 struct pci_softc { 187 struct device sc_dev; 188 bus_space_tag_t sc_iot, sc_memt; 189 bus_dma_tag_t sc_dmat; 190 pci_chipset_tag_t sc_pc; 191 int sc_flags; 192 struct extent *sc_ioex; 193 struct extent *sc_memex; 194 struct extent *sc_pmemex; 195 struct extent *sc_busex; 196 LIST_HEAD(, pci_dev) sc_devs; 197 int sc_domain, sc_bus, sc_maxndevs; 198 pcitag_t *sc_bridgetag; 199 pci_intr_handle_t *sc_bridgeih; 200 u_int sc_intrswiz; 201 pcitag_t sc_intrtag; 202 }; 203 204 extern int pci_ndomains; 205 extern int pci_dopm; 206 207 /* 208 * Locators devices that attach to 'pcibus', as specified to config. 209 */ 210 #define pcibuscf_bus cf_loc[0] 211 #define PCIBUS_UNK_BUS -1 /* wildcarded 'bus' */ 212 213 /* 214 * Locators for PCI devices, as specified to config. 215 */ 216 #define pcicf_dev cf_loc[0] 217 #define PCI_UNK_DEV -1 /* wildcarded 'dev' */ 218 219 #define pcicf_function cf_loc[1] 220 #define PCI_UNK_FUNCTION -1 /* wildcarded 'function' */ 221 222 /* 223 * Configuration space access and utility functions. (Note that most, 224 * e.g. make_tag, conf_read, conf_write are declared by pci_machdep.h.) 225 */ 226 int pci_mapreg_probe(pci_chipset_tag_t, pcitag_t, int, pcireg_t *); 227 pcireg_t pci_mapreg_type(pci_chipset_tag_t, pcitag_t, int); 228 int pci_mapreg_info(pci_chipset_tag_t, pcitag_t, int, pcireg_t, 229 bus_addr_t *, bus_size_t *, int *); 230 int pci_mapreg_assign(struct pci_attach_args *, int, pcireg_t, 231 bus_addr_t *, bus_size_t *); 232 int pci_mapreg_map(struct pci_attach_args *, int, pcireg_t, int, 233 bus_space_tag_t *, bus_space_handle_t *, bus_addr_t *, 234 bus_size_t *, bus_size_t); 235 236 int pci_get_capability(pci_chipset_tag_t, pcitag_t, int, 237 int *, pcireg_t *); 238 int pci_get_ht_capability(pci_chipset_tag_t, pcitag_t, int, 239 int *, pcireg_t *); 240 int pci_get_ext_capability(pci_chipset_tag_t, pcitag_t, int, 241 int *, pcireg_t *); 242 243 struct msix_vector; 244 245 struct msix_vector *pci_alloc_msix_table(pci_chipset_tag_t, pcitag_t); 246 void pci_free_msix_table(pci_chipset_tag_t, pcitag_t, struct msix_vector *); 247 void pci_suspend_msix(pci_chipset_tag_t, pcitag_t, bus_space_tag_t, 248 pcireg_t *, struct msix_vector *); 249 void pci_resume_msix(pci_chipset_tag_t, pcitag_t, bus_space_tag_t, 250 pcireg_t, struct msix_vector *); 251 252 int pci_intr_msix_count(struct pci_attach_args *); 253 254 uint16_t pci_requester_id(pci_chipset_tag_t, pcitag_t); 255 256 int pci_matchbyid(struct pci_attach_args *, const struct pci_matchid *, int); 257 int pci_get_powerstate(pci_chipset_tag_t, pcitag_t); 258 int pci_set_powerstate(pci_chipset_tag_t, pcitag_t, int); 259 void pci_disable_legacy_vga(struct device *); 260 261 /* 262 * Vital Product Data (PCI 2.2) 263 */ 264 int pci_vpd_read(pci_chipset_tag_t, pcitag_t, int, int, pcireg_t *); 265 int pci_vpd_write(pci_chipset_tag_t, pcitag_t, int, int, pcireg_t *); 266 267 /* 268 * Helper functions for autoconfiguration. 269 */ 270 const char *pci_findvendor(pcireg_t); 271 const char *pci_findproduct(pcireg_t); 272 int pci_find_device(struct pci_attach_args *pa, 273 int (*match)(struct pci_attach_args *)); 274 int pci_probe_device(struct pci_softc *, pcitag_t tag, 275 int (*)(struct pci_attach_args *), struct pci_attach_args *); 276 int pci_detach_devices(struct pci_softc *, int); 277 void pci_devinfo(pcireg_t, pcireg_t, int, char *, size_t); 278 const struct pci_quirkdata * 279 pci_lookup_quirkdata(pci_vendor_id_t, pci_product_id_t); 280 281 #endif /* _KERNEL */ 282 #endif /* _DEV_PCI_PCIVAR_H_ */ 283