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Searched defs:pll_info (Results 1 – 12 of 12) sorted by relevance

/linux/drivers/clk/ingenic/
H A Dcgu.c85 const struct ingenic_cgu_pll_info *pll_info; in ingenic_pll_recalc_rate() local
130 ingenic_pll_calc_m_n_od(const struct ingenic_cgu_pll_info *pll_info, in ingenic_pll_calc_m_n_od()
158 const struct ingenic_cgu_pll_info *pll_info = &clk_info->pll; in ingenic_pll_calc() local
188 const struct ingenic_cgu_pll_info *pll_info) in ingenic_pll_check_stable()
207 const struct ingenic_cgu_pll_info *pll_info = &clk_info->pll; in ingenic_pll_set_rate() local
252 const struct ingenic_cgu_pll_info *pll_info = &clk_info->pll; in ingenic_pll_enable() local
286 const struct ingenic_cgu_pll_info *pll_info = &clk_info->pll; in ingenic_pll_disable() local
307 const struct ingenic_cgu_pll_info *pll_info = &clk_info->pll; in ingenic_pll_is_enabled() local
H A Dx1000-cgu.c173 x1000_i2spll_calc_m_n_od(const struct ingenic_cgu_pll_info *pll_info, in x1000_i2spll_calc_m_n_od()
193 x1000_i2spll_set_rate_hook(const struct ingenic_cgu_pll_info *pll_info, in x1000_i2spll_set_rate_hook()
H A Djz4760-cgu.c57 jz4760_cgu_calc_m_n_od(const struct ingenic_cgu_pll_info *pll_info, in jz4760_cgu_calc_m_n_od()
/linux/drivers/gpu/drm/renesas/rcar-du/
H A Drcar_lvds.c132 struct pll_info { struct
142 unsigned long target, struct pll_info *pll, in rcar_lvds_d3_e3_pll_calc() argument
/linux/drivers/video/fbdev/aty/
H A Datyfb.h49 struct pll_info { struct
50 int pll_max;
51 int pll_min;
52 int sclk, mclk, mclk_pm, xclk;
53 int ref_div;
54 int ref_clk;
55 int ecp_max;
H A Dradeonfb.h138 struct pll_info { struct
139 int ppll_max;
140 int ppll_min;
141 int sclk, mclk;
142 int ref_div;
143 int ref_clk;
/linux/drivers/clk/visconti/
H A Dpll-tmpv770x.c53 static const struct visconti_pll_info pll_info[] __initconst = { variable
/linux/drivers/gpu/drm/amd/display/include/
H A Dgrph_object_ctrl_defs.h159 struct pll_info { struct
160 uint32_t crystal_frequency; /* in KHz */
161 uint32_t min_input_pxl_clk_pll_frequency; /* in KHz */
162 uint32_t max_input_pxl_clk_pll_frequency; /* in KHz */
163 uint32_t min_output_pxl_clk_pll_frequency; /* in KHz */
164 uint32_t max_output_pxl_clk_pll_frequency; /* in KHz */
165 } pll_info; member
H A Daudio_types.h114 struct audio_pll_info pll_info; member
/linux/drivers/gpu/drm/amd/display/dc/dce/
H A Ddce_audio.c1043 const struct audio_pll_info *pll_info, in get_azalia_clock_info_dp()
1065 const struct audio_pll_info *pll_info) in dce_aud_wall_dto_setup()
1157 const struct audio_pll_info *pll_info) in dce60_aud_wall_dto_setup()
/linux/drivers/clk/baikal-t1/
H A Dclk-ccu-pll.c65 static const struct ccu_pll_info pll_info[] = { variable
/linux/drivers/gpu/drm/radeon/
H A Dradeon_combios.c717 uint16_t pll_info; in radeon_combios_get_clock_info() local