| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/tools/llvm-mca/AArch64/Cortex/ |
| H A D | A55-neon-instructions.s | 414 rshrn2 v0.16b, v0.8h, #3 label
415 rshrn2 v0.4s, v0.2d, #3 label
416 rshrn2 v0.8h, v0.4s, #3 label
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| /dports/www/firefox-esr/firefox-91.8.0/js/src/jit/arm64/vixl/ |
| H A D | Assembler-vixl.cpp | 4109 void Assembler::rshrn2(const VRegister& vd, in rshrn2() function in vixl::Assembler
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| H A D | Logic-vixl.cpp | 2293 LogicVRegister Simulator::rshrn2(VectorFormat vform, in rshrn2() function in vixl::Simulator
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| /dports/www/qt5-webengine/qtwebengine-everywhere-src-5.15.2/src/3rdparty/chromium/v8/src/codegen/arm64/ |
| H A D | assembler-arm64.cc | 1678 void Assembler::rshrn2(const VRegister& vd, const VRegister& vn, int shift) { in rshrn2() function in v8::internal::Assembler
|
| /dports/lang/spidermonkey78/firefox-78.9.0/js/src/jit/arm64/vixl/ |
| H A D | Assembler-vixl.cpp | 4100 void Assembler::rshrn2(const VRegister& vd, in rshrn2() function in vixl::Assembler
|
| H A D | Logic-vixl.cpp | 2238 LogicVRegister Simulator::rshrn2(VectorFormat vform, in rshrn2() function in vixl::Simulator
|
| /dports/www/firefox/firefox-99.0/js/src/jit/arm64/vixl/ |
| H A D | Assembler-vixl.cpp | 4109 void Assembler::rshrn2(const VRegister& vd, in rshrn2() function in vixl::Assembler
|
| H A D | Logic-vixl.cpp | 2293 LogicVRegister Simulator::rshrn2(VectorFormat vform, in rshrn2() function in vixl::Simulator
|
| /dports/lang/v8/v8-9.6.180.12/src/codegen/arm64/ |
| H A D | assembler-arm64.cc | 1754 void Assembler::rshrn2(const VRegister& vd, const VRegister& vn, int shift) { in rshrn2() function in v8::internal::Assembler
|
| /dports/www/firefox-legacy/firefox-52.8.0esr/js/src/jit/arm64/vixl/ |
| H A D | Assembler-vixl.cpp | 4090 void Assembler::rshrn2(const VRegister& vd, in rshrn2() function in vixl::Assembler
|
| H A D | Logic-vixl.cpp | 2532 LogicVRegister Simulator::rshrn2(VectorFormat vform, in rshrn2() function in vixl::Simulator
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/v8/src/codegen/arm64/ |
| H A D | assembler-arm64.cc | 1738 void Assembler::rshrn2(const VRegister& vd, const VRegister& vn, int shift) { in rshrn2() function in v8::internal::Assembler
|
| /dports/lang/spidermonkey60/firefox-60.9.0/js/src/jit/arm64/vixl/ |
| H A D | Assembler-vixl.cpp | 4090 void Assembler::rshrn2(const VRegister& vd, in rshrn2() function in vixl::Assembler
|
| H A D | Logic-vixl.cpp | 2532 LogicVRegister Simulator::rshrn2(VectorFormat vform, in rshrn2() function in vixl::Simulator
|
| /dports/mail/thunderbird/thunderbird-91.8.0/js/src/jit/arm64/vixl/ |
| H A D | Assembler-vixl.cpp | 4109 void Assembler::rshrn2(const VRegister& vd, in rshrn2() function in vixl::Assembler
|
| H A D | Logic-vixl.cpp | 2293 LogicVRegister Simulator::rshrn2(VectorFormat vform, in rshrn2() function in vixl::Simulator
|
| /dports/www/node10/node-v10.24.1/deps/v8/src/arm64/ |
| H A D | assembler-arm64.cc | 2147 void Assembler::rshrn2(const VRegister& vd, const VRegister& vn, int shift) { in rshrn2() function in v8::internal::Assembler
|
| H A D | simulator-logic-arm64.cc | 2136 LogicVRegister Simulator::rshrn2(VectorFormat vform, LogicVRegister dst, in rshrn2() function in v8::internal::Simulator
|
| /dports/databases/mongodb36/mongodb-src-r3.6.23/src/third_party/mozjs-45/extract/js/src/jit/arm64/vixl/ |
| H A D | Assembler-vixl.cpp | 4090 void Assembler::rshrn2(const VRegister& vd, in rshrn2() function in vixl::Assembler
|
| H A D | Logic-vixl.cpp | 2530 LogicVRegister Simulator::rshrn2(VectorFormat vform, in rshrn2() function in vixl::Simulator
|
| /dports/lang/v8/v8-9.6.180.12/src/execution/arm64/ |
| H A D | simulator-logic-arm64.cc | 2135 LogicVRegister Simulator::rshrn2(VectorFormat vform, LogicVRegister dst, in rshrn2() function in v8::internal::Simulator
|
| /dports/www/qt5-webengine/qtwebengine-everywhere-src-5.15.2/src/3rdparty/chromium/v8/src/execution/arm64/ |
| H A D | simulator-logic-arm64.cc | 2135 LogicVRegister Simulator::rshrn2(VectorFormat vform, LogicVRegister dst, in rshrn2() function in v8::internal::Simulator
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/v8/src/execution/arm64/ |
| H A D | simulator-logic-arm64.cc | 2135 LogicVRegister Simulator::rshrn2(VectorFormat vform, LogicVRegister dst, in rshrn2() function in v8::internal::Simulator
|
| /dports/misc/mxnet/incubator-mxnet-1.9.0/3rdparty/mkldnn/src/cpu/aarch64/xbyak_aarch64/src/ |
| H A D | xbyak_aarch64_mnemonic.h | 2772 void CodeGenerator::rshrn2(const VReg16B &vd, const VReg8H &vn, const uint32_t sh) { AdvSimdShImm(0… function
2773 void CodeGenerator::rshrn2(const VReg8H &vd, const VReg4S &vn, const uint32_t sh) { AdvSimdShImm(0,… function
2774 void CodeGenerator::rshrn2(const VReg4S &vd, const VReg2D &vn, const uint32_t sh) { AdvSimdShImm(0,… function
|
| /dports/math/onednn/oneDNN-2.5.1/src/cpu/aarch64/xbyak_aarch64/src/ |
| H A D | xbyak_aarch64_mnemonic.h | 2772 void CodeGenerator::rshrn2(const VReg16B &vd, const VReg8H &vn, const uint32_t sh) { AdvSimdShImm(0… function
2773 void CodeGenerator::rshrn2(const VReg8H &vd, const VReg4S &vn, const uint32_t sh) { AdvSimdShImm(0,… function
2774 void CodeGenerator::rshrn2(const VReg4S &vd, const VReg2D &vn, const uint32_t sh) { AdvSimdShImm(0,… function
|