| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/tools/llvm-mca/AArch64/Cortex/ |
| H A D | A55-neon-instructions.s | 420 rsubhn2 v0.16b, v0.8h, v0.8h label
421 rsubhn2 v0.4s, v0.2d, v0.2d label
422 rsubhn2 v0.8h, v0.4s, v0.4s label
|
| /dports/lang/v8/v8-9.6.180.12/src/execution/arm64/ |
| H A D | simulator-logic-arm64.cc | 2817 LogicVRegister Simulator::rsubhn2(VectorFormat vform, LogicVRegister dst, in rsubhn2() function in v8::internal::Simulator
|
| /dports/www/firefox-esr/firefox-91.8.0/js/src/jit/arm64/vixl/ |
| H A D | Logic-vixl.cpp | 3154 LogicVRegister Simulator::rsubhn2(VectorFormat vform, in rsubhn2() function in vixl::Simulator
|
| /dports/www/qt5-webengine/qtwebengine-everywhere-src-5.15.2/src/3rdparty/chromium/v8/src/execution/arm64/ |
| H A D | simulator-logic-arm64.cc | 2817 LogicVRegister Simulator::rsubhn2(VectorFormat vform, LogicVRegister dst, in rsubhn2() function in v8::internal::Simulator
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/v8/src/execution/arm64/ |
| H A D | simulator-logic-arm64.cc | 2817 LogicVRegister Simulator::rsubhn2(VectorFormat vform, LogicVRegister dst, in rsubhn2() function in v8::internal::Simulator
|
| /dports/www/firefox/firefox-99.0/js/src/jit/arm64/vixl/ |
| H A D | Logic-vixl.cpp | 3154 LogicVRegister Simulator::rsubhn2(VectorFormat vform, in rsubhn2() function in vixl::Simulator
|
| /dports/www/node10/node-v10.24.1/deps/v8/src/arm64/ |
| H A D | simulator-logic-arm64.cc | 2818 LogicVRegister Simulator::rsubhn2(VectorFormat vform, LogicVRegister dst, in rsubhn2() function in v8::internal::Simulator
|
| /dports/www/firefox-legacy/firefox-52.8.0esr/js/src/jit/arm64/vixl/ |
| H A D | Logic-vixl.cpp | 3385 LogicVRegister Simulator::rsubhn2(VectorFormat vform, in rsubhn2() function in vixl::Simulator
|
| /dports/lang/spidermonkey60/firefox-60.9.0/js/src/jit/arm64/vixl/ |
| H A D | Logic-vixl.cpp | 3385 LogicVRegister Simulator::rsubhn2(VectorFormat vform, in rsubhn2() function in vixl::Simulator
|
| /dports/mail/thunderbird/thunderbird-91.8.0/js/src/jit/arm64/vixl/ |
| H A D | Logic-vixl.cpp | 3154 LogicVRegister Simulator::rsubhn2(VectorFormat vform, in rsubhn2() function in vixl::Simulator
|
| /dports/lang/spidermonkey78/firefox-78.9.0/js/src/jit/arm64/vixl/ |
| H A D | Logic-vixl.cpp | 3091 LogicVRegister Simulator::rsubhn2(VectorFormat vform, in rsubhn2() function in vixl::Simulator
|
| /dports/databases/mongodb36/mongodb-src-r3.6.23/src/third_party/mozjs-45/extract/js/src/jit/arm64/vixl/ |
| H A D | Logic-vixl.cpp | 3383 LogicVRegister Simulator::rsubhn2(VectorFormat vform, in rsubhn2() function in vixl::Simulator
|
| /dports/misc/mxnet/incubator-mxnet-1.9.0/3rdparty/mkldnn/src/cpu/aarch64/xbyak_aarch64/src/ |
| H A D | xbyak_aarch64_mnemonic.h | 2288 void CodeGenerator::rsubhn2(const VReg16B &vd, const VReg8H &vn, const VReg8H &vm) { AdvSimd3Diff(1… function
2289 void CodeGenerator::rsubhn2(const VReg8H &vd, const VReg4S &vn, const VReg4S &vm) { AdvSimd3Diff(1,… function
2290 void CodeGenerator::rsubhn2(const VReg4S &vd, const VReg2D &vn, const VReg2D &vm) { AdvSimd3Diff(1,… function
|
| /dports/math/onednn/oneDNN-2.5.1/src/cpu/aarch64/xbyak_aarch64/src/ |
| H A D | xbyak_aarch64_mnemonic.h | 2288 void CodeGenerator::rsubhn2(const VReg16B &vd, const VReg8H &vn, const VReg8H &vm) { AdvSimd3Diff(1… function
2289 void CodeGenerator::rsubhn2(const VReg8H &vd, const VReg4S &vn, const VReg4S &vm) { AdvSimd3Diff(1,… function
2290 void CodeGenerator::rsubhn2(const VReg4S &vd, const VReg2D &vn, const VReg2D &vm) { AdvSimd3Diff(1,… function
|