1 /* Copyright (c) 2013-2016 Jeffrey Pfau 2 * 3 * This Source Code Form is subject to the terms of the Mozilla Public 4 * License, v. 2.0. If a copy of the MPL was not distributed with this 5 * file, You can obtain one at http://mozilla.org/MPL/2.0/. */ 6 #ifndef GBA_SERIALIZE_H 7 #define GBA_SERIALIZE_H 8 9 #include <mgba-util/common.h> 10 11 CXX_GUARD_START 12 13 #include <mgba/core/core.h> 14 #include <mgba/internal/gba/gba.h> 15 #include <mgba/internal/gb/serialize.h> 16 17 extern MGBA_EXPORT const uint32_t GBASavestateMagic; 18 extern MGBA_EXPORT const uint32_t GBASavestateVersion; 19 20 mLOG_DECLARE_CATEGORY(GBA_STATE); 21 22 /* Savestate format: 23 * 0x00000 - 0x00003: Version Magic (0x01000004) 24 * 0x00004 - 0x00007: BIOS checksum (e.g. 0xBAAE187F for official BIOS) 25 * 0x00008 - 0x0000B: ROM CRC32 26 * 0x0000C - 0x0000F: Master cycles 27 * 0x00010 - 0x0001B: Game title (e.g. METROID4USA) 28 * 0x0001C - 0x0001F: Game code (e.g. AMTE) 29 * 0x00020 - 0x0012F: CPU state: 30 * | 0x00020 - 0x0005F: GPRs 31 * | 0x00060 - 0x00063: CPSR 32 * | 0x00064 - 0x00067: SPSR 33 * | 0x00068 - 0x0006B: Cycles since last event 34 * | 0x0006C - 0x0006F: Cycles until next event 35 * | 0x00070 - 0x00117: Banked registers 36 * | 0x00118 - 0x0012F: Banked SPSRs 37 * 0x00130 - 0x00143: Audio channel 1/framer state 38 * | 0x00130 - 0x00133: Envelepe timing 39 * | bits 0 - 6: Remaining length 40 * | bits 7 - 9: Next step 41 * | bits 10 - 20: Shadow frequency register 42 * | bits 21 - 31: Reserved 43 * | 0x00134 - 0x00137: Next frame 44 * | 0x00138 - 0x0013B: Next channel 3 fade 45 * | 0x0013C - 0x0013F: Sweep state 46 * | bits 0 - 2: Timesteps 47 * | bits 3 - 7: Reserved 48 * | 0x00140 - 0x00143: Next event 49 * 0x00144 - 0x00153: Audio channel 2 state 50 * | 0x00144 - 0x00147: Envelepe timing 51 * | bits 0 - 2: Remaining length 52 * | bits 3 - 5: Next step 53 * | bits 6 - 31: Reserved 54 * | 0x00148 - 0x0014F: Reserved 55 * | 0x00150 - 0x00153: Next event 56 * 0x00154 - 0x0017B: Audio channel 3 state 57 * | 0x00154 - 0x00173: Wave banks 58 * | 0x00174 - 0x00175: Remaining length 59 * | 0x00176 - 0x00177: Reserved 60 * | 0x00178 - 0x0017B: Next event 61 * 0x0017C - 0x0018B: Audio channel 4 state 62 * | 0x0017C - 0x0017F: Linear feedback shift register state 63 * | 0x00180 - 0x00183: Envelepe timing 64 * | bits 0 - 2: Remaining length 65 * | bits 3 - 5: Next step 66 * | bits 6 - 31: Reserved 67 * | 0x00184 - 0x00187: Last event 68 * | 0x00188 - 0x0018B: Next event 69 * 0x0018C - 0x001AB: Audio FIFO 1 70 * 0x001AC - 0x001CB: Audio FIFO 2 71 * 0x001CC - 0x001DF: Audio miscellaneous state 72 * | 0x001CC - 0x001CF: Channel A internal audio samples 73 * | 0x001D0 - 0x001D3: Channel B internal audio samples 74 * | 0x001D4 - 0x001D7: Next sample 75 * | 0x001D8: Channel A current sample 76 * | 0x001D9: Channel B current sample 77 * | 0x001DA - 0x001DB: Flags 78 * | bits 0 - 1: Channel B internal samples remaining 79 * | bits 2 - 4: Channel B readable words 80 * | bits 5 - 6: Channel A internal samples remaining 81 * | bits 7 - 9: Channel A readable words 82 * | TODO: Fix this, they're in big-endian order, but field is little-endian 83 * | 0x001DC - 0x001DC: Channel 1 envelope state 84 * | bits 0 - 3: Current volume 85 * | bits 4 - 5: Is dead? 86 * | bit 6: Is high? 87 * | bit 7: Reserved 88 * | 0x001DD - 0x001DD: Channel 2 envelope state 89 * | bits 0 - 3: Current volume 90 * | bits 4 - 5: Is dead? 91 * | bit 6: Is high? 92 * | bit 7: Reserved 93 * | 0x001DE - 0x001DE: Channel 4 envelope state 94 * | bits 0 - 3: Current volume 95 * | bits 4 - 5: Is dead? 96 * | bits 6 - 7: Current frame (continued) 97 * | 0x001DF - 0x001DF: Miscellaneous audio flags 98 * | bit 0: Current frame (continuation) 99 * | bit 1: Is channel 1 sweep enabled? 100 * | bit 2: Has channel 1 sweep occurred? 101 * | bit 3: Is channel 3's memory readable? 102 * | bit 4: Skip frame 103 * | bits 5 - 7: Reserved 104 * 0x001E0 - 0x001FF: Video miscellaneous state 105 * | 0x001E0 - 0x001E3: Next event 106 * | 0x001E4 - 0x001F7: Reserved 107 * | 0x001F8 - 0x001FB: Miscellaneous flags 108 * | 0x001FC - 0x001FF: Frame counter 109 * 0x00200 - 0x00213: Timer 0 110 * | 0x00200 - 0x00201: Reload value 111 * | 0x00202 - 0x00203: Old reload value 112 * | 0x00204 - 0x00207: Last event 113 * | 0x00208 - 0x0020B: Next event 114 * | 0x0020C - 0x0020F: Reserved 115 * | 0x00210 - 0x00213: Miscellaneous flags 116 * 0x00214 - 0x00227: Timer 1 117 * | 0x00214 - 0x00215: Reload value 118 * | 0x00216 - 0x00217: Old reload value 119 * | 0x00218 - 0x0021B: Last event 120 * | 0x0021C - 0x0021F: Next event 121 * | 0x00220 - 0x00223: Reserved 122 * | 0x00224 - 0x00227: Miscellaneous flags 123 * 0x00228 - 0x0023B: Timer 2 124 * | 0x00228 - 0x00229: Reload value 125 * | 0x0022A - 0x0022B: Old reload value 126 * | 0x0022C - 0x0022F: Last event 127 * | 0x00230 - 0x00233: Next event 128 * | 0x00234 - 0x00237: Reserved 129 * | 0x00238 - 0x0023B: Miscellaneous flags 130 * 0x0023C - 0x00250: Timer 3 131 * | 0x0023C - 0x0023D: Reload value 132 * | 0x0023E - 0x0023F: Old reload value 133 * | 0x00240 - 0x00243: Last event 134 * | 0x00244 - 0x00247: Next event 135 * | 0x00248 - 0x0024B: Reserved 136 * | 0x0024C - 0x0024F: Miscellaneous flags 137 * 0x00250 - 0x0025F: DMA 0 138 * | 0x00250 - 0x00253: DMA next source 139 * | 0x00254 - 0x00257: DMA next destination 140 * | 0x00258 - 0x0025B: DMA next count 141 * | 0x0025C - 0x0025F: DMA next event 142 * 0x00260 - 0x0026F: DMA 1 143 * | 0x00260 - 0x00263: DMA next source 144 * | 0x00264 - 0x00267: DMA next destination 145 * | 0x00268 - 0x0026B: DMA next count 146 * | 0x0026C - 0x0026F: DMA next event 147 * 0x00270 - 0x0027F: DMA 2 148 * | 0x00270 - 0x00273: DMA next source 149 * | 0x00274 - 0x00277: DMA next destination 150 * | 0x00278 - 0x0027B: DMA next count 151 * | 0x0027C - 0x0027F: DMA next event 152 * 0x00280 - 0x0028F: DMA 3 153 * | 0x00280 - 0x00283: DMA next source 154 * | 0x00284 - 0x00287: DMA next destination 155 * | 0x00288 - 0x0028B: DMA next count 156 * | 0x0028C - 0x0028F: DMA next event 157 * 0x00290 - 0x002C3: GPIO state 158 * | 0x00290 - 0x00291: Pin state 159 * | 0x00292 - 0x00293: Direction state 160 * | 0x00294 - 0x002B6: RTC state (see hardware.h for format) 161 * | 0x002B7 - 0x002B7: GPIO devices 162 * | bit 0: Has RTC values 163 * | bit 1: Has rumble value (reserved) 164 * | bit 2: Has light sensor value 165 * | bit 3: Has gyroscope value 166 * | bit 4: Has tilt values 167 * | bit 5: Has Game Boy Player attached 168 * | bits 6 - 7: Reserved 169 * | 0x002B8 - 0x002B9: Gyroscope sample 170 * | 0x002BA - 0x002BB: Tilt x sample 171 * | 0x002BC - 0x002BD: Tilt y sample 172 * | 0x002BE - 0x002BF: Flags 173 * | bit 0: Is read enabled 174 * | bit 1: Gyroscope sample is edge 175 * | bit 2: Light sample is edge 176 * | bit 3: Reserved 177 * | bits 4 - 15: Light counter 178 * | 0x002C0 - 0x002C0: Light sample 179 * | 0x002C1 - 0x002C3: Flags 180 * | bits 0 - 1: Tilt state machine 181 * | bits 2 - 3: GB Player inputs posted 182 * | bits 4 - 8: GB Player transmit position 183 * | bits 9 - 23: Reserved 184 * 0x002C4 - 0x002C7: Game Boy Player next event 185 * 0x002C8 - 0x002CB: Current DMA transfer word 186 * 0x002CC - 0x002CF: Last DMA transfer PC 187 * 0x002D0 - 0x002DF: Reserved (leave zero) 188 * 0x002E0 - 0x002EF: Savedata state 189 * | 0x002E0 - 0x002E0: Savedata type 190 * | 0x002E1 - 0x002E1: Savedata command (see savedata.h) 191 * | 0x002E2 - 0x002E2: Flags 192 * | bits 0 - 1: Flash state machine 193 * | bits 2 - 3: Reserved 194 * | bit 4: Flash bank 195 * | bit 5: Is settling occurring? 196 * | bits 6 - 7: Reserved 197 * | 0x002E3 - 0x002E3: EEPROM read bits remaining 198 * | 0x002E4 - 0x002E7: Settling cycles remaining 199 * | 0x002E8 - 0x002EB: EEPROM read address 200 * | 0x002EC - 0x002EF: EEPROM write address 201 * | 0x002F0 - 0x002F1: Flash settling sector 202 * | 0x002F2 - 0x002F3: Reserved 203 * 0x002F4 - 0x002FF: Prefetch 204 * | 0x002F4 - 0x002F7: GBA BIOS bus prefetch 205 * | 0x002F8 - 0x002FB: CPU prefecth (decode slot) 206 * | 0x002FC - 0x002FF: CPU prefetch (fetch slot) 207 * 0x00300 - 0x0030F: Reserved (leave zero) 208 * 0x00310 - 0x00317: Global cycle counter 209 * 0x00318 - 0x0031B: Last prefetched program counter 210 * 0x0031C - 0x0031F: Miscellaneous flags 211 * | bit 0: Is CPU halted? 212 * | bit 1: POSTFLG 213 * | bit 2: Is IRQ pending? 214 * 0x00320 - 0x00323: Next IRQ event 215 * 0x00324 - 0x00327: Interruptable BIOS stall cycles 216 * 0x00328 - 0x003FF: Reserved (leave zero) 217 * 0x00400 - 0x007FF: I/O memory 218 * 0x00800 - 0x00BFF: Palette 219 * 0x00C00 - 0x00FFF: OAM 220 * 0x01000 - 0x18FFF: VRAM 221 * 0x19000 - 0x20FFF: IWRAM 222 * 0x21000 - 0x60FFF: WRAM 223 * Total size: 0x61000 (397,312) bytes 224 */ 225 226 DECL_BITFIELD(GBASerializedAudioFlags, uint16_t); 227 DECL_BITS(GBASerializedAudioFlags, FIFOInternalSamplesB, 0, 2); 228 DECL_BITS(GBASerializedAudioFlags, FIFOSamplesB, 2, 3); // Yay legacy? 229 DECL_BITS(GBASerializedAudioFlags, FIFOInternalSamplesA, 5, 2); 230 DECL_BITS(GBASerializedAudioFlags, FIFOSamplesA, 7, 3); 231 232 DECL_BITFIELD(GBASerializedVideoFlags, uint32_t); 233 DECL_BITS(GBASerializedVideoFlags, Mode, 0, 2); 234 235 DECL_BITFIELD(GBASerializedHWFlags1, uint16_t); 236 DECL_BIT(GBASerializedHWFlags1, ReadWrite, 0); 237 DECL_BIT(GBASerializedHWFlags1, GyroEdge, 1); 238 DECL_BIT(GBASerializedHWFlags1, LightEdge, 2); 239 DECL_BITS(GBASerializedHWFlags1, LightCounter, 4, 12); 240 241 DECL_BITFIELD(GBASerializedHWFlags2, uint8_t); 242 DECL_BITS(GBASerializedHWFlags2, TiltState, 0, 2); 243 DECL_BITS(GBASerializedHWFlags2, GbpInputsPosted, 2, 2); 244 DECL_BITS(GBASerializedHWFlags2, GbpTxPosition, 4, 5); 245 246 DECL_BITFIELD(GBASerializedHWFlags3, uint16_t); 247 248 DECL_BITFIELD(GBASerializedSavedataFlags, uint8_t); 249 DECL_BITS(GBASerializedSavedataFlags, FlashState, 0, 2); 250 DECL_BIT(GBASerializedSavedataFlags, FlashBank, 4); 251 DECL_BIT(GBASerializedSavedataFlags, DustSettling, 5); 252 253 DECL_BITFIELD(GBASerializedMiscFlags, uint32_t); 254 DECL_BIT(GBASerializedMiscFlags, Halted, 0); 255 DECL_BIT(GBASerializedMiscFlags, POSTFLG, 1); 256 DECL_BIT(GBASerializedMiscFlags, IrqPending, 2); 257 DECL_BIT(GBASerializedMiscFlags, Blocked, 3); 258 259 struct GBASerializedState { 260 uint32_t versionMagic; 261 uint32_t biosChecksum; 262 uint32_t romCrc32; 263 uint32_t masterCycles; 264 265 char title[12]; 266 uint32_t id; 267 268 struct { 269 int32_t gprs[16]; 270 union PSR cpsr; 271 union PSR spsr; 272 273 int32_t cycles; 274 int32_t nextEvent; 275 276 int32_t bankedRegisters[6][7]; 277 int32_t bankedSPSRs[6]; 278 } cpu; 279 280 struct { 281 struct GBSerializedPSGState psg; 282 uint32_t fifoA[8]; 283 uint32_t fifoB[8]; 284 uint32_t internalA; 285 uint32_t internalB; 286 int32_t nextSample; 287 int8_t sampleA; 288 int8_t sampleB; 289 GBASerializedAudioFlags gbaFlags; 290 GBSerializedAudioFlags flags; 291 } audio; 292 293 struct { 294 int32_t nextEvent; 295 int32_t reserved[5]; 296 GBASerializedVideoFlags flags; 297 int32_t frameCounter; 298 } video; 299 300 struct { 301 uint16_t reload; 302 uint16_t reserved0; 303 uint32_t lastEvent; 304 uint32_t nextEvent; 305 uint32_t reserved1; 306 GBATimerFlags flags; 307 } timers[4]; 308 309 struct { 310 uint32_t nextSource; 311 uint32_t nextDest; 312 int32_t nextCount; 313 int32_t when; 314 } dma[4]; 315 316 struct { 317 uint16_t pinState; 318 uint16_t pinDirection; 319 int32_t rtcBytesRemaining; 320 int32_t rtcTransferStep; 321 int32_t rtcBitsRead; 322 int32_t rtcBits; 323 int32_t rtcCommandActive; 324 RTCCommandData rtcCommand; 325 RTCControl rtcControl; 326 uint8_t time[7]; 327 uint8_t devices; 328 uint16_t gyroSample; 329 uint16_t tiltSampleX; 330 uint16_t tiltSampleY; 331 GBASerializedHWFlags1 flags1; 332 uint8_t lightSample; 333 GBASerializedHWFlags2 flags2; 334 GBASerializedHWFlags3 flags3; 335 uint32_t gbpNextEvent; 336 } hw; 337 338 uint32_t dmaTransferRegister; 339 uint32_t dmaBlockPC; 340 341 struct { 342 uint32_t cmd; 343 uint32_t paddr; 344 uint32_t vaddr; 345 uint32_t size; 346 } matrix; 347 348 struct { 349 uint8_t type; 350 uint8_t command; 351 GBASerializedSavedataFlags flags; 352 int8_t readBitsRemaining; 353 uint32_t settlingDust; 354 uint32_t readAddress; 355 uint32_t writeAddress; 356 uint16_t settlingSector; 357 uint16_t reserved; 358 } savedata; 359 360 uint32_t biosPrefetch; 361 uint32_t cpuPrefetch[2]; 362 363 uint32_t reservedCpu[4]; 364 365 uint64_t globalCycles; 366 uint32_t lastPrefetchedPc; 367 GBASerializedMiscFlags miscFlags; 368 uint32_t nextIrq; 369 int32_t biosStall; 370 371 uint32_t matrixMappings[16]; 372 373 uint32_t reserved[38]; 374 375 uint16_t io[SIZE_IO >> 1]; 376 uint16_t pram[SIZE_PALETTE_RAM >> 1]; 377 uint16_t oam[SIZE_OAM >> 1]; 378 uint16_t vram[SIZE_VRAM >> 1]; 379 uint8_t iwram[SIZE_WORKING_IRAM]; 380 uint8_t wram[SIZE_WORKING_RAM]; 381 }; 382 383 struct VDir; 384 385 void GBASerialize(struct GBA* gba, struct GBASerializedState* state); 386 bool GBADeserialize(struct GBA* gba, const struct GBASerializedState* state); 387 388 CXX_GUARD_END 389 390 #endif 391