1 /* $OpenBSD: spifvar.h,v 1.5 2022/01/09 05:42:58 jsg Exp $ */ 2 3 /* 4 * Copyright (c) 1999-2002 Jason L. Wright (jason@thought.net) 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED 18 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE 19 * DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, 20 * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES 21 * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR 22 * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, 24 * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN 25 * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 26 * POSSIBILITY OF SUCH DAMAGE. 27 * 28 * Effort sponsored in part by the Defense Advanced Research Projects 29 * Agency (DARPA) and Air Force Research Laboratory, Air Force 30 * Materiel Command, USAF, under agreement number F30602-01-2-0537. 31 * 32 */ 33 34 #define SPIF_MAX_SERIAL 8 35 #define SPIF_MAX_PARALLEL 1 36 37 struct stty_port { 38 struct tty *sp_tty; /* tty device */ 39 struct spif_softc *sp_sc; /* pointer back to registers */ 40 int sp_channel; /* channel number */ 41 u_char *sp_rbuf; /* ring buffer start */ 42 u_char *sp_rend; /* ring buffer end */ 43 u_char *sp_rget; /* ring buffer read pointer */ 44 u_char *sp_rput; /* ring buffer write pointer */ 45 u_char *sp_txp; /* transmit character pointer */ 46 int sp_txc; /* transmit character counter */ 47 48 int sp_openflags; /* open flags */ 49 int sp_carrier; /* software carrier status */ 50 int sp_flags; /* software state */ 51 char sp_dtr; /* software dtr status */ 52 }; 53 54 struct stty_softc { 55 struct device sc_dev; /* base device */ 56 int sc_nports; /* number of serial ports */ 57 struct stty_port sc_port[SPIF_MAX_SERIAL]; 58 }; 59 60 struct sbpp_softc { 61 struct device sc_dev; /* base device */ 62 int sc_nports; /* number of parallel ports */ 63 }; 64 65 struct spif_softc { 66 struct device sc_dev; /* base device */ 67 void *sc_stcih; /* stc interrupt vector */ 68 void *sc_ppcih; /* ppc interrupt vector */ 69 void *sc_softih; /* soft interrupt vector */ 70 int sc_rev; /* revision level */ 71 int sc_osc; /* oscillator speed (hz) */ 72 int sc_node; /* which sbus node */ 73 int sc_nser; /* number of serial ports */ 74 int sc_npar; /* number of parallel ports */ 75 int sc_rev2; /* cd180 chip revision */ 76 bus_space_tag_t sc_bustag; /* our bus tag */ 77 bus_space_handle_t sc_regh; /* whole register map */ 78 bus_space_handle_t sc_stch; /* STC registers */ 79 bus_space_handle_t sc_istch; /* IACK STC registers */ 80 bus_space_handle_t sc_dtrh; /* DTR registers */ 81 bus_space_handle_t sc_ppch; /* PPC registers */ 82 struct spifregs *sc_regs; /* registers */ 83 struct stty_softc *sc_ttys; /* our ttys */ 84 struct sbpp_softc *sc_bpps; /* our ttys */ 85 }; 86 87