1 /* 2 * Copyright (c) 1982, 1990, 1993 3 * The Regents of the University of California. All rights reserved. 4 * 5 * %sccs.include.redist.c% 6 * 7 * @(#)if_apxreg.h 8.1 (Berkeley) 06/11/93 8 */ 9 10 11 /* 12 * SGS Thompson MK5205 structures and registers 13 */ 14 15 /* 16 * Device Control Ports (Multiplexed CSR's) 17 */ 18 struct sgcp { 19 u_short sgcp_rdp; 20 u_short sgcp_rap; 21 }; 22 23 /* 24 * Operating Parameters for timers etc. 25 * (Suitable for reseting by ioctl). 26 */ 27 struct sgop { 28 u_short lsaddr; 29 u_short rsaddr; 30 u_short n1; 31 u_short n2_scale; 32 u_short t1; 33 u_short t3; 34 u_short tp; 35 }; 36 37 /* 38 * Common addressing element rife through chip 39 */ 40 struct sgae { 41 u_short f_hi; 42 u_short lo; 43 }; 44 /* 45 * Common format for tx/rx descriptors 46 */ 47 48 struct sgdx { 49 struct sgae sgdx_ae; 50 #define sgdx_flags sgdx_ae.f_hi 51 #define sgdx_addr sgdx_ae.lo 52 short sgdx_bcnt; 53 short sgdx_mcnt; 54 }; 55 56 /* 57 * Interpretation of reported errors 58 */ 59 struct sger { 60 u_short sger_bad; 61 u_short sger_t1timo; 62 u_short sger_frmr; 63 u_short sger_txrej; 64 u_short sger_rxrej; 65 u_short sger_short; 66 }; 67 68 /* 69 * Status buffer, paired bytes hi order low order 70 */ 71 struct sgsb { 72 u_short sgsb_vrvs; 73 u_short sgsb_lsrs; 74 u_short sgsb_phzva; 75 u_short sgsb_hirxcnt; 76 u_short sgsb_lorxcnt; 77 u_short sgsb_hitxcnt; 78 u_short sgsb_lotxcnt; 79 }; 80 81 #define SGMTU 1032 82 #define SGRBUF 16 83 #define SGRBUF_LOG2 4 84 #define SG_RLEN (SGRBUF_LOG2 << 12) 85 #define SGTBUF 8 86 #define SGTBUF_LOG2 3 87 #define SG_TLEN (SGTBUF_LOG2 << 12) 88 89 /* 90 * APC-PCX RAM 91 */ 92 93 struct apc_mem { 94 /* Initialization Block */ 95 u_short apc_mode; 96 struct sgop apc_sgop; 97 struct sgae apc_rxdd; 98 struct sgae apc_txdd; 99 struct sgdx apc_txtid; 100 struct sgdx apc_rxtid; 101 struct sgae apc_stdd; 102 struct sger apc_sger; 103 struct sgsb apc_sgsb; /* Status Buffer */ 104 struct sgdx apc_rxmd[SGRBUF]; /* Receive Message Descriptors */ 105 struct sgdx apc_txmd[SGTBUF]; /* Transmit Message Descriptors */ 106 char apc_rbuf[SGRBUF][SGMTU]; /* Receive Message Buffers */ 107 char apc_tbuf[SGTBUF][SGMTU]; /* Transmit Message Buffers */ 108 char apc_rxidbuf[SGMTU]; 109 char apc_txidbuf[SGMTU]; 110 }; 111 /* 112 * APC-PCX registers 113 */ 114 struct apc_reg { 115 struct sgcp axr_sgcp[2]; 116 u_char arx_pad0[4]; 117 u_char axr_cnt0; 118 u_char axr_cnt1; 119 u_char axr_cnt2; 120 u_char axr_ccr; 121 u_char axr_mode; 122 u_char axr_pad1; 123 u_char axr_status; 124 u_char axr_pad2; 125 u_char axr_altmode; 126 u_char axr_pad3[11]; 127 }; 128 129 /* 130 * Hardware tweaking 131 */ 132 struct apc_modes { 133 struct sgop apm_sgop; /* tweak timers */ 134 u_char apm_txwin; /* set parameter for transmit window */ 135 u_char apm_apxmode; 136 u_char apm_apxaltmode; 137 u_char apm_iftype; /* someday indicate PPP vs X.25 */ 138 }; 139 140 #define SIOCSIFMODE _IOW('i', 127, struct apc_modes) /* set parameters */ 141 142 /* TX RX descriptor bits */ 143 #define SG_OWN 0x8000 144 #define SG_SLF 0x2000 145 #define SG_ELF 0x1000 146 #define SG_TUI 0x800 147 148 /* CSR0 quantities */ 149 #define SG_TDMD 0x8000 150 #define SG_STOPPED 0x4000 151 #define SG_DTX 0x2000 152 #define SG_DRX 0x1000 153 #define SG_TXON 0x800 154 #define SG_RXON 0x400 155 #define SG_INEA 0x200 156 #define SG_INTR 0x100 157 #define SG_MERR 0x80 158 #define SG_MISS 0x40 159 #define SG_ROR 0x20 160 #define SG_TUR 0x10 161 #define SG_PINT 0x8 162 #define SG_TINT 0x4 163 #define SG_RINT 0x2 164 165 /* CSR1 quantities */ 166 #define SG_UAV 0x4000 167 #define SG_PAV 0x40 168 #define SG_STOP 0 169 #define SG_INIT (2 << 8) 170 #define SG_TRANS (3 << 8) 171 #define SG_STAT (4 << 8) 172 173 #define SG_PROM 0x400 174 #define SG_UIE 0x200 175 #define SG_BSWAP 0x20 176