1 /* 2 * Copyright © 2016 Intel Corporation 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice (including the next 12 * paragraph) shall be included in all copies or substantial portions of the 13 * Software. 14 * 15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 20 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS 21 * IN THE SOFTWARE. 22 * 23 */ 24 25 #ifndef SHADER_INFO_H 26 #define SHADER_INFO_H 27 28 #include "util/bitset.h" 29 #include "util/sha1/sha1.h" 30 #include "shader_enums.h" 31 #include <stdint.h> 32 33 #ifdef __cplusplus 34 extern "C" { 35 #endif 36 37 #define MAX_XFB_BUFFERS 4 38 #define MAX_INLINABLE_UNIFORMS 4 39 40 struct spirv_supported_capabilities { 41 bool address; 42 bool atomic_storage; 43 bool demote_to_helper_invocation; 44 bool derivative_group; 45 bool descriptor_array_dynamic_indexing; 46 bool descriptor_array_non_uniform_indexing; 47 bool descriptor_indexing; 48 bool device_group; 49 bool draw_parameters; 50 bool float16_atomic_add; 51 bool float16_atomic_min_max; 52 bool float32_atomic_add; 53 bool float32_atomic_min_max; 54 bool float64; 55 bool float64_atomic_add; 56 bool float64_atomic_min_max; 57 bool fragment_shader_sample_interlock; 58 bool fragment_shader_pixel_interlock; 59 bool fragment_shading_rate; 60 bool generic_pointers; 61 bool geometry_streams; 62 bool groups; 63 bool image_ms_array; 64 bool image_read_without_format; 65 bool image_write_without_format; 66 bool image_atomic_int64; 67 bool int8; 68 bool int16; 69 bool int64; 70 bool int64_atomics; 71 bool integer_functions2; 72 bool kernel; 73 bool kernel_image; 74 bool kernel_image_read_write; 75 bool linkage; 76 bool literal_sampler; 77 bool mesh_shading_nv; 78 bool min_lod; 79 bool multiview; 80 bool per_view_attributes_nv; 81 bool physical_storage_buffer_address; 82 bool post_depth_coverage; 83 bool printf; 84 bool ray_tracing; 85 bool ray_query; 86 bool ray_traversal_primitive_culling; 87 bool runtime_descriptor_array; 88 bool float_controls; 89 bool shader_clock; 90 bool shader_viewport_index_layer; 91 bool shader_viewport_mask_nv; 92 bool sparse_residency; 93 bool stencil_export; 94 bool storage_8bit; 95 bool storage_16bit; 96 bool storage_image_ms; 97 bool subgroup_arithmetic; 98 bool subgroup_ballot; 99 bool subgroup_basic; 100 bool subgroup_dispatch; 101 bool subgroup_quad; 102 bool subgroup_shuffle; 103 bool subgroup_uniform_control_flow; 104 bool subgroup_vote; 105 bool tessellation; 106 bool transform_feedback; 107 bool variable_pointers; 108 bool vk_memory_model; 109 bool vk_memory_model_device_scope; 110 bool workgroup_memory_explicit_layout; 111 bool float16; 112 bool amd_fragment_mask; 113 bool amd_gcn_shader; 114 bool amd_shader_ballot; 115 bool amd_trinary_minmax; 116 bool amd_image_read_write_lod; 117 bool amd_shader_explicit_vertex_parameter; 118 bool amd_image_gather_bias_lod; 119 120 bool intel_subgroup_shuffle; 121 bool intel_subgroup_buffer_block_io; 122 }; 123 124 typedef struct shader_info { 125 const char *name; 126 127 /* Descriptive name provided by the client; may be NULL */ 128 const char *label; 129 130 /* Shader is internal, and should be ignored by things like NIR_DEBUG=print */ 131 bool internal; 132 133 /* SHA1 of the original source, used by shader detection in drivers. */ 134 uint8_t source_sha1[SHA1_DIGEST_LENGTH]; 135 136 /** The shader stage, such as MESA_SHADER_VERTEX. */ 137 gl_shader_stage stage:8; 138 139 /** The shader stage in a non SSO linked program that follows this stage, 140 * such as MESA_SHADER_FRAGMENT. 141 */ 142 gl_shader_stage next_stage:8; 143 144 /* Number of textures used by this shader */ 145 uint8_t num_textures; 146 /* Number of uniform buffers used by this shader */ 147 uint8_t num_ubos; 148 /* Number of atomic buffers used by this shader */ 149 uint8_t num_abos; 150 /* Number of shader storage buffers (max .driver_location + 1) used by this 151 * shader. In the case of nir_lower_atomics_to_ssbo being used, this will 152 * be the number of actual SSBOs in gl_program->info, and the lowered SSBOs 153 * and atomic counters in nir_shader->info. 154 */ 155 uint8_t num_ssbos; 156 /* Number of images used by this shader */ 157 uint8_t num_images; 158 159 /* Which inputs are actually read */ 160 uint64_t inputs_read; 161 /* Which outputs are actually written */ 162 uint64_t outputs_written; 163 /* Which outputs are actually read */ 164 uint64_t outputs_read; 165 /* Which system values are actually read */ 166 BITSET_DECLARE(system_values_read, SYSTEM_VALUE_MAX); 167 168 /* Which I/O is per-primitive, for read/written information combine with 169 * the fields above. 170 */ 171 uint64_t per_primitive_inputs; 172 uint64_t per_primitive_outputs; 173 174 /* Which 16-bit inputs and outputs are used corresponding to 175 * VARYING_SLOT_VARn_16BIT. 176 */ 177 uint16_t inputs_read_16bit; 178 uint16_t outputs_written_16bit; 179 uint16_t outputs_read_16bit; 180 uint16_t inputs_read_indirectly_16bit; 181 uint16_t outputs_accessed_indirectly_16bit; 182 183 /* Which patch inputs are actually read */ 184 uint32_t patch_inputs_read; 185 /* Which patch outputs are actually written */ 186 uint32_t patch_outputs_written; 187 /* Which patch outputs are read */ 188 uint32_t patch_outputs_read; 189 190 /* Which inputs are read indirectly (subset of inputs_read) */ 191 uint64_t inputs_read_indirectly; 192 /* Which outputs are read or written indirectly */ 193 uint64_t outputs_accessed_indirectly; 194 /* Which patch inputs are read indirectly (subset of patch_inputs_read) */ 195 uint64_t patch_inputs_read_indirectly; 196 /* Which patch outputs are read or written indirectly */ 197 uint64_t patch_outputs_accessed_indirectly; 198 199 /** Bitfield of which textures are used */ 200 BITSET_DECLARE(textures_used, 32); 201 202 /** Bitfield of which textures are used by texelFetch() */ 203 BITSET_DECLARE(textures_used_by_txf, 32); 204 205 /** Bitfield of which images are used */ 206 uint32_t images_used; 207 /** Bitfield of which images are buffers. */ 208 uint32_t image_buffers; 209 /** Bitfield of which images are MSAA. */ 210 uint32_t msaa_images; 211 212 /* SPV_KHR_float_controls: execution mode for floating point ops */ 213 uint16_t float_controls_execution_mode; 214 215 /** 216 * Size of shared variables accessed by compute/task/mesh shaders. 217 */ 218 unsigned shared_size; 219 220 /** 221 * Size of task payload variables accessed by task/mesh shaders. 222 */ 223 unsigned task_payload_size; 224 225 /** 226 * Number of ray tracing queries in the shader (counts all elements of all 227 * variables). 228 */ 229 unsigned ray_queries; 230 231 /** 232 * Local workgroup size used by compute/task/mesh shaders. 233 */ 234 uint16_t workgroup_size[3]; 235 236 /* Transform feedback buffer strides in dwords, max. 1K - 4. */ 237 uint8_t xfb_stride[MAX_XFB_BUFFERS]; 238 239 uint16_t inlinable_uniform_dw_offsets[MAX_INLINABLE_UNIFORMS]; 240 uint8_t num_inlinable_uniforms:4; 241 242 /* The size of the gl_ClipDistance[] array, if declared. */ 243 uint8_t clip_distance_array_size:4; 244 245 /* The size of the gl_CullDistance[] array, if declared. */ 246 uint8_t cull_distance_array_size:4; 247 248 /* Whether or not this shader ever uses textureGather() */ 249 bool uses_texture_gather:1; 250 251 /** 252 * True if this shader uses the fddx/fddy opcodes. 253 * 254 * Note that this does not include the "fine" and "coarse" variants. 255 */ 256 bool uses_fddx_fddy:1; 257 258 /** Has divergence analysis ever been run? */ 259 bool divergence_analysis_run:1; 260 261 /* Bitmask of bit-sizes used with ALU instructions. */ 262 uint8_t bit_sizes_float; 263 uint8_t bit_sizes_int; 264 265 /* Whether the first UBO is the default uniform buffer, i.e. uniforms. */ 266 bool first_ubo_is_default_ubo:1; 267 268 /* Whether or not separate shader objects were used */ 269 bool separate_shader:1; 270 271 /** Was this shader linked with any transform feedback varyings? */ 272 bool has_transform_feedback_varyings:1; 273 274 /* Whether flrp has been lowered. */ 275 bool flrp_lowered:1; 276 277 /* Whether nir_lower_io has been called to lower derefs. 278 * nir_variables for inputs and outputs might not be present in the IR. 279 */ 280 bool io_lowered:1; 281 282 /* Whether the shader writes memory, including transform feedback. */ 283 bool writes_memory:1; 284 285 /* Whether gl_Layer is viewport-relative */ 286 bool layer_viewport_relative:1; 287 288 /* Whether explicit barriers are used */ 289 bool uses_control_barrier : 1; 290 bool uses_memory_barrier : 1; 291 292 /** 293 * Shared memory types have explicit layout set. Used for 294 * SPV_KHR_workgroup_storage_explicit_layout. 295 */ 296 bool shared_memory_explicit_layout:1; 297 298 /** 299 * Used for VK_KHR_zero_initialize_workgroup_memory. 300 */ 301 bool zero_initialize_shared_memory:1; 302 303 /** 304 * Used for ARB_compute_variable_group_size. 305 */ 306 bool workgroup_size_variable:1; 307 308 /** 309 * Is this an ARB assembly-style program. 310 */ 311 bool is_arb_asm; 312 313 union { 314 struct { 315 /* Which inputs are doubles */ 316 uint64_t double_inputs; 317 318 /* For AMD-specific driver-internal shaders. It replaces vertex 319 * buffer loads with code generating VS inputs from scalar registers. 320 * 321 * Valid values: SI_VS_BLIT_SGPRS_POS_* 322 */ 323 uint8_t blit_sgprs_amd:4; 324 325 /* True if the shader writes position in window space coordinates pre-transform */ 326 bool window_space_position:1; 327 328 /** Is an edge flag input needed? */ 329 bool needs_edge_flag:1; 330 } vs; 331 332 struct { 333 /** The output primitive type */ 334 uint16_t output_primitive; 335 336 /** The input primitive type */ 337 uint16_t input_primitive; 338 339 /** The maximum number of vertices the geometry shader might write. */ 340 uint16_t vertices_out; 341 342 /** 1 .. MAX_GEOMETRY_SHADER_INVOCATIONS */ 343 uint8_t invocations; 344 345 /** The number of vertices received per input primitive (max. 6) */ 346 uint8_t vertices_in:3; 347 348 /** Whether or not this shader uses EndPrimitive */ 349 bool uses_end_primitive:1; 350 351 /** The streams used in this shaders (max. 4) */ 352 uint8_t active_stream_mask:4; 353 } gs; 354 355 struct { 356 bool uses_discard:1; 357 bool uses_demote:1; 358 bool uses_fbfetch_output:1; 359 bool color_is_dual_source:1; 360 361 /** 362 * True if this fragment shader requires helper invocations. This 363 * can be caused by the use of ALU derivative ops, texture 364 * instructions which do implicit derivatives, and the use of quad 365 * subgroup operations. 366 */ 367 bool needs_quad_helper_invocations:1; 368 369 /** 370 * True if this fragment shader requires helper invocations for 371 * all subgroup operations, not just quad ops and derivatives. 372 */ 373 bool needs_all_helper_invocations:1; 374 375 /** 376 * Whether any inputs are declared with the "sample" qualifier. 377 */ 378 bool uses_sample_qualifier:1; 379 380 /** 381 * Whether sample shading is used. 382 */ 383 bool uses_sample_shading:1; 384 385 /** 386 * Whether early fragment tests are enabled as defined by 387 * ARB_shader_image_load_store. 388 */ 389 bool early_fragment_tests:1; 390 391 /** 392 * Defined by INTEL_conservative_rasterization. 393 */ 394 bool inner_coverage:1; 395 396 bool post_depth_coverage:1; 397 398 /** 399 * \name ARB_fragment_coord_conventions 400 * @{ 401 */ 402 bool pixel_center_integer:1; 403 bool origin_upper_left:1; 404 /*@}*/ 405 406 bool pixel_interlock_ordered:1; 407 bool pixel_interlock_unordered:1; 408 bool sample_interlock_ordered:1; 409 bool sample_interlock_unordered:1; 410 411 /** 412 * Flags whether NIR's base types on the FS color outputs should be 413 * ignored. 414 * 415 * GLSL requires that fragment shader output base types match the 416 * render target's base types for the behavior to be defined. From 417 * the GL 4.6 spec: 418 * 419 * "If the values written by the fragment shader do not match the 420 * format(s) of the corresponding color buffer(s), the result is 421 * undefined." 422 * 423 * However, for NIR shaders translated from TGSI, we don't have the 424 * output types any more, so the driver will need to do whatever 425 * fixups are necessary to handle effectively untyped data being 426 * output from the FS. 427 */ 428 bool untyped_color_outputs:1; 429 430 /** gl_FragDepth layout for ARB_conservative_depth. */ 431 enum gl_frag_depth_layout depth_layout:3; 432 433 /** 434 * Interpolation qualifiers for drivers that lowers color inputs 435 * to system values. 436 */ 437 unsigned color0_interp:3; /* glsl_interp_mode */ 438 bool color0_sample:1; 439 bool color0_centroid:1; 440 unsigned color1_interp:3; /* glsl_interp_mode */ 441 bool color1_sample:1; 442 bool color1_centroid:1; 443 444 /* Bitmask of gl_advanced_blend_mode values that may be used with this 445 * shader. 446 */ 447 unsigned advanced_blend_modes; 448 } fs; 449 450 struct { 451 uint16_t workgroup_size_hint[3]; 452 453 uint8_t user_data_components_amd:3; 454 455 /* 456 * Arrangement of invocations used to calculate derivatives in a compute 457 * shader. From NV_compute_shader_derivatives. 458 */ 459 enum gl_derivative_group derivative_group:2; 460 461 /** 462 * Explicit subgroup size if set by the shader, otherwise 0. 463 */ 464 unsigned subgroup_size; 465 466 /** 467 * pointer size is: 468 * AddressingModelLogical: 0 (default) 469 * AddressingModelPhysical32: 32 470 * AddressingModelPhysical64: 64 471 */ 472 unsigned ptr_size; 473 474 /** 475 * Uses subgroup intrinsics which can communicate across a quad. 476 */ 477 bool uses_wide_subgroup_intrinsics; 478 } cs; 479 480 /* Applies to both TCS and TES. */ 481 struct { 482 enum tess_primitive_mode _primitive_mode; 483 484 /** The number of vertices in the TCS output patch. */ 485 uint8_t tcs_vertices_out; 486 unsigned spacing:2; /*gl_tess_spacing*/ 487 488 /** Is the vertex order counterclockwise? */ 489 bool ccw:1; 490 bool point_mode:1; 491 492 /* Bit mask of TCS per-vertex inputs (VS outputs) that are used 493 * with a vertex index that is NOT the invocation id 494 */ 495 uint64_t tcs_cross_invocation_inputs_read; 496 497 /* Bit mask of TCS per-vertex outputs that are used 498 * with a vertex index that is NOT the invocation id 499 */ 500 uint64_t tcs_cross_invocation_outputs_read; 501 } tess; 502 503 /* Applies to MESH. */ 504 struct { 505 uint16_t max_vertices_out; 506 uint16_t max_primitives_out; 507 uint16_t primitive_type; /* GL_POINTS, GL_LINES or GL_TRIANGLES. */ 508 } mesh; 509 }; 510 } shader_info; 511 512 #ifdef __cplusplus 513 } 514 #endif 515 516 #endif /* SHADER_INFO_H */ 517