1 #include "../vidhrdw/toaplan2.c"
2
3 /*****************************************************************************
4
5 ToaPlan game hardware from 1991-1994
6 ------------------------------------
7 Driver by: Quench and Yochizo
8
9
10 Supported games:
11
12 Name Board No Maker Game name
13 ----------------------------------------------------------------------------
14 tekipaki TP-020 Toaplan Teki Paki
15 ghox TP-021 Toaplan Ghox
16 dogyuun TP-022 Toaplan Dogyuun
17 kbash TP-023 Toaplan Knuckle Bash
18 tatsujn2 TP-024 Toaplan Truxton 2 / Tatsujin 2
19 pipibibs TP-025 Toaplan Pipi & Bibis
20 whoopee TP-025 Toaplan Whoopee
21 pipibibi bootleg? Toaplan Pipi & Bibis
22 fixeight TP-026 Toaplan FixEight
23 grindstm TP-027 Toaplan Grind Stormer (1992)
24 vfive TP-027 Toaplan V-V (V-Five) (1993 - Japan only)
25 batsugun TP-030 Toaplan Batsugun
26 batugnsp TP-030 Toaplan Batsugun (Special Version)
27 snowbro2 ?????? Toaplan Snow Bros. 2 - With New Elves
28 mahoudai ?????? Raizing Mahou Daisakusen
29 shippu ?????? Raizing Shippu Mahou Daisakusen
30
31 Not supported games yet:
32
33 Name Board No Maker Game name
34 ----------------------------------------------------------------------------
35 batrider ?????? Raizing Armed Police Batrider
36 btlgaleg ?????? Raizing Battle Galegga
37
38 Game status:
39
40 Teki Paki Working, but no sound. Missing sound MCU dump
41 Ghox Working, but no sound. Missing sound MCU dump
42 Dogyuun Working, but no sound. MCU type unknown - its a Z?80 of some sort.
43 Knuckle Bash Working, but no sound. MCU dump exists, its a Z?80 of some sort.
44 Tatsujin 2 Working.
45 Pipi & Bibis Working.
46 Whoopee Working. Missing sound MCU dump. Using bootleg sound CPU dump for now
47 Pipi & Bibis Ryouta Kikaku - Working.
48 FixEight Not working. MCU type unknown - its a Z?80 of some sort.
49 Grind Stormer Working, but no sound. MCU type unknown - its a Z?80 of some sort.
50 VFive Working, but no sound. MCU type unknown - its a Z?80 of some sort.
51 Batsugun Working, but no sound and wrong GFX priorities. MCU type unknown - its a Z?80 of some sort.
52 Batsugun Sp' Working, but no sound and wrong GFX priorities. MCU type unknown - its a Z?80 of some sort.
53 Snow Bros. 2 Working.
54 Mahou Daisaks Working.
55 Shippu Mahou Working.
56
57 Notes:
58 See Input Port definition header below, for instructions
59 on how to enter pause/slow motion modes.
60
61 To Do / Unknowns:
62 - Whoopee/Teki Paki sometimes tests bit 5 of the territory port
63 just after testing for vblank. Why ?
64 - Whoppee is currently using the sound CPU ROM (Z80) from a differnt
65 (pirate ?) version of Pipi and Bibis (Ryouta Kikaku copyright).
66 It really has a HD647180 CPU, and its internal ROM needs to be dumped.
67 - Code at $20A26 forces territory to Japan in V-Five. Some stuff
68 NOP'd at reset vector, and Z?80 CPU post test is skipped (bootleg ?)
69 - Fixed top-character-layer.
70 - Added unsupported games which work in this driver.
71
72 *****************************************************************************/
73
74
75 #include "driver.h"
76 #include "vidhrdw/generic.h"
77 #include "cpu/m68000/m68000.h"
78 #include "cpu/z80/z80.h"
79
80
81 /**************** Machine stuff ******************/
82 #define HD64x180 0 /* Define if CPU support is available */
83 #define Zx80 0
84
85 #define CPU_2_NONE 0x00
86 #define CPU_2_Z80 0x5a
87 #define CPU_2_HD647180 0xa5
88 #define CPU_2_Zx80 0xff
89
90 static unsigned char *toaplan2_shared_ram;
91 static unsigned char *raizing_shared_ram; /* Added by Yochizo */
92 static unsigned char *Zx80_shared_ram;
93
94 static int mcu_data = 0;
95 int toaplan2_sub_cpu = 0;
96 static INT8 old_p1_paddle_h;
97 static INT8 old_p1_paddle_v;
98 static INT8 old_p2_paddle_h;
99 static INT8 old_p2_paddle_v;
100
101
102 /********* Video wrappers for PIPIBIBI *********/
103 WRITE_HANDLER( pipibibi_scroll_w );
104 READ_HANDLER ( pipibibi_videoram_r );
105 WRITE_HANDLER( pipibibi_videoram_w );
106 READ_HANDLER ( pipibibi_spriteram_r );
107 WRITE_HANDLER( pipibibi_spriteram_w );
108
109 /**************** Video stuff ******************/
110 READ_HANDLER ( toaplan2_0_videoram_r );
111 READ_HANDLER ( toaplan2_1_videoram_r );
112 WRITE_HANDLER( toaplan2_0_videoram_w );
113 WRITE_HANDLER( toaplan2_1_videoram_w );
114
115 WRITE_HANDLER( toaplan2_0_voffs_w );
116 WRITE_HANDLER( toaplan2_1_voffs_w );
117
118 WRITE_HANDLER( toaplan2_0_scroll_reg_select_w );
119 WRITE_HANDLER( toaplan2_1_scroll_reg_select_w );
120 WRITE_HANDLER( toaplan2_0_scroll_reg_data_w );
121 WRITE_HANDLER( toaplan2_1_scroll_reg_data_w );
122
123 /* Added by Yochizo 2000/08/19 */
124 READ_HANDLER( raizing_textram_r );
125 WRITE_HANDLER( raizing_textram_w );
126 /* --------------------------- */
127
128 void toaplan2_0_eof_callback(void);
129 void toaplan2_1_eof_callback(void);
130 int toaplan2_0_vh_start(void);
131 int toaplan2_1_vh_start(void);
132 void toaplan2_0_vh_stop(void);
133 void toaplan2_1_vh_stop(void);
134 void toaplan2_0_vh_screenrefresh(struct osd_bitmap *bitmap,int full_refresh);
135 void toaplan2_1_vh_screenrefresh(struct osd_bitmap *bitmap,int full_refresh);
136 void batsugun_1_vh_screenrefresh(struct osd_bitmap *bitmap,int full_refresh);
137
138 /* Added by Yochizo 2000/08/19 */
139 int raizing_0_vh_start(void);
140 int raizing_1_vh_start(void);
141 void raizing_0_vh_screenrefresh(struct osd_bitmap *bitmap,int full_refresh);
142 void raizing_1_vh_screenrefresh(struct osd_bitmap *bitmap,int full_refresh);
143 extern unsigned char *textvideoram; /* Video ram for extra-text layer */
144 /* --------------------------- */
145
146 static int video_status = 0;
147
148
init_toaplan2(void)149 static void init_toaplan2(void)
150 {
151 old_p1_paddle_h = 0;
152 old_p1_paddle_v = 0;
153 old_p2_paddle_h = 0;
154 old_p2_paddle_v = 0;
155 toaplan2_sub_cpu = CPU_2_HD647180;
156 mcu_data = 0;
157 }
158
init_toaplan3(void)159 static void init_toaplan3(void)
160 {
161 toaplan2_sub_cpu = CPU_2_Zx80;
162 mcu_data = 0;
163 }
164
init_pipibibs(void)165 static void init_pipibibs(void)
166 {
167 toaplan2_sub_cpu = CPU_2_Z80;
168 }
169
init_pipibibi(void)170 static void init_pipibibi(void)
171 {
172 int A;
173 int oldword, newword;
174
175 unsigned char *pipibibi_68k_rom = memory_region(REGION_CPU1);
176
177 toaplan2_sub_cpu = CPU_2_Z80;
178
179 /* unscramble the 68K ROM data. */
180
181 for (A = 0; A < 0x040000; A+=8)
182 {
183 newword = 0;
184 oldword = READ_WORD (&pipibibi_68k_rom[A]);
185 newword |= ((oldword & 0x0001) << 9);
186 newword |= ((oldword & 0x0002) << 14);
187 newword |= ((oldword & 0x0004) << 8);
188 newword |= ((oldword & 0x0018) << 1);
189 newword |= ((oldword & 0x0020) << 9);
190 newword |= ((oldword & 0x0040) << 7);
191 newword |= ((oldword & 0x0080) << 5);
192 newword |= ((oldword & 0x0100) << 3);
193 newword |= ((oldword & 0x0200) >> 1);
194 newword |= ((oldword & 0x0400) >> 8);
195 newword |= ((oldword & 0x0800) >> 10);
196 newword |= ((oldword & 0x1000) >> 12);
197 newword |= ((oldword & 0x6000) >> 7);
198 newword |= ((oldword & 0x8000) >> 12);
199 WRITE_WORD (&pipibibi_68k_rom[A],newword);
200
201 newword = 0;
202 oldword = READ_WORD (&pipibibi_68k_rom[A+2]);
203 newword |= ((oldword & 0x0001) << 8);
204 newword |= ((oldword & 0x0002) << 12);
205 newword |= ((oldword & 0x0004) << 5);
206 newword |= ((oldword & 0x0008) << 11);
207 newword |= ((oldword & 0x0010) << 2);
208 newword |= ((oldword & 0x0020) << 10);
209 newword |= ((oldword & 0x0040) >> 1);
210 newword |= ((oldword & 0x0080) >> 7);
211 newword |= ((oldword & 0x0100) >> 4);
212 newword |= ((oldword & 0x0200) << 0);
213 newword |= ((oldword & 0x0400) >> 7);
214 newword |= ((oldword & 0x0800) >> 1);
215 newword |= ((oldword & 0x1000) >> 10);
216 newword |= ((oldword & 0x2000) >> 2);
217 newword |= ((oldword & 0x4000) >> 13);
218 newword |= ((oldword & 0x8000) >> 3);
219 WRITE_WORD (&pipibibi_68k_rom[A+2],newword);
220
221 newword = 0;
222 oldword = READ_WORD (&pipibibi_68k_rom[A+4]);
223 newword |= ((oldword & 0x000f) << 4);
224 newword |= ((oldword & 0x00f0) >> 4);
225 newword |= ((oldword & 0x0100) << 3);
226 newword |= ((oldword & 0x0200) << 1);
227 newword |= ((oldword & 0x0400) >> 1);
228 newword |= ((oldword & 0x0800) >> 3);
229 newword |= ((oldword & 0x1000) << 3);
230 newword |= ((oldword & 0x2000) << 1);
231 newword |= ((oldword & 0x4000) >> 1);
232 newword |= ((oldword & 0x8000) >> 3);
233 WRITE_WORD (&pipibibi_68k_rom[A+4],newword);
234
235 newword = 0;
236 oldword = READ_WORD (&pipibibi_68k_rom[A+6]);
237 newword |= ((oldword & 0x000f) << 4);
238 newword |= ((oldword & 0x00f0) >> 4);
239 newword |= ((oldword & 0x0100) << 7);
240 newword |= ((oldword & 0x0200) << 5);
241 newword |= ((oldword & 0x0400) << 3);
242 newword |= ((oldword & 0x0800) << 1);
243 newword |= ((oldword & 0x1000) >> 1);
244 newword |= ((oldword & 0x2000) >> 3);
245 newword |= ((oldword & 0x4000) >> 5);
246 newword |= ((oldword & 0x8000) >> 7);
247 WRITE_WORD (&pipibibi_68k_rom[A+6],newword);
248 }
249 }
250
251 /* Added by Yochizo 2000/08/16 */
init_tatsujn2(void)252 static void init_tatsujn2(void)
253 {
254 unsigned char *RAM = memory_region(REGION_CPU1);
255
256 /* Fix checksum from the source of Raine. */
257 WRITE_WORD(&RAM[0x2EC10],0x4E71); // NOP
258
259 /* Fix 60000 from the source of Raine. */
260 WRITE_WORD(&RAM[0x1F6E8],0x4E75); // RTS
261
262 WRITE_WORD(&RAM[0x009FE],0x4E71); // NOP
263 WRITE_WORD(&RAM[0x01276],0x4E71); // NOP
264 WRITE_WORD(&RAM[0x012BA],0x4E71); // NOP
265 WRITE_WORD(&RAM[0x03150],0x4E71); // NOP
266 WRITE_WORD(&RAM[0x031B4],0x4E71); // NOP
267 WRITE_WORD(&RAM[0x0F20C],0x4E71); // NOP
268 WRITE_WORD(&RAM[0x1EBFA],0x4E71); // NOP
269 WRITE_WORD(&RAM[0x1EC7A],0x4E71); // NOP
270 WRITE_WORD(&RAM[0x1ECE8],0x4E71); // NOP
271 WRITE_WORD(&RAM[0x1ED00],0x4E71); // NOP
272 WRITE_WORD(&RAM[0x1ED5E],0x4E71); // NOP
273 WRITE_WORD(&RAM[0x1ED9A],0x4E71); // NOP
274 WRITE_WORD(&RAM[0x1EDB2],0x4E71); // NOP
275 WRITE_WORD(&RAM[0x1EEA2],0x4E71); // NOP
276 WRITE_WORD(&RAM[0x1EEBA],0x4E71); // NOP
277 WRITE_WORD(&RAM[0x1EEE6],0x4E71); // NOP
278 WRITE_WORD(&RAM[0x1EF72],0x4E71); // NOP
279 WRITE_WORD(&RAM[0x1EFD0],0x4E71); // NOP
280 WRITE_WORD(&RAM[0x1F028],0x4E71); // NOP
281 WRITE_WORD(&RAM[0x1F05E],0x4E71); // NOP
282 WRITE_WORD(&RAM[0x1F670],0x4E71); // NOP
283 WRITE_WORD(&RAM[0x1F6C0],0x4E71); // NOP
284 WRITE_WORD(&RAM[0x1FA08],0x4E71); // NOP
285 WRITE_WORD(&RAM[0x1FAA4],0x4E71); // NOP
286 WRITE_WORD(&RAM[0x1FADA],0x4E71); // NOP
287 WRITE_WORD(&RAM[0x1FBA2],0x4E71); // NOP
288 WRITE_WORD(&RAM[0x1FBDC],0x4E71); // NOP
289 WRITE_WORD(&RAM[0x1FC1C],0x4E71); // NOP
290 WRITE_WORD(&RAM[0x1FC8A],0x4E71); // NOP
291 WRITE_WORD(&RAM[0x1FD24],0x4E71); // NOP
292 WRITE_WORD(&RAM[0x1FD7A],0x4E71); // NOP
293 WRITE_WORD(&RAM[0x2775A],0x4E71); // NOP
294 WRITE_WORD(&RAM[0x277D8],0x4E71); // NOP
295 WRITE_WORD(&RAM[0x2788C],0x4E71); // NOP
296 WRITE_WORD(&RAM[0x278BA],0x4E71); // NOP
297 WRITE_WORD(&RAM[0x2EC54],0x4E71); // NOP
298 WRITE_WORD(&RAM[0x2EC90],0x4E71); // NOP
299 WRITE_WORD(&RAM[0x2ECAC],0x4E71); // NOP
300 WRITE_WORD(&RAM[0x2ECCA],0x4E71); // NOP
301 WRITE_WORD(&RAM[0x2ECE6],0x4E71); // NOP
302 WRITE_WORD(&RAM[0x2ED1E],0x4E71); // NOP
303
304 WRITE_WORD(&RAM[0x2EC26],0x4E71); // NOP
305
306 }
307
init_snowbro2(void)308 static void init_snowbro2(void)
309 {
310 toaplan2_sub_cpu = CPU_2_NONE;
311 }
312
313 /* Added by Yochizo 2000/08/16 */
tatsujn2_interrupt(void)314 static int tatsujn2_interrupt(void)
315 {
316 return MC68000_IRQ_2; /* Tatsujin2 uses IRQ level 2 */
317 }
318
toaplan2_interrupt(void)319 static int toaplan2_interrupt(void)
320 {
321 return MC68000_IRQ_4;
322 }
323
WRITE_HANDLER(toaplan2_coin_w)324 static WRITE_HANDLER( toaplan2_coin_w )
325 {
326 data &= 0xffff;
327 switch (data & 0x0f)
328 {
329 case 0x00: coin_lockout_global_w(0,1); break; /* Lock all coin slots */
330 case 0x0c: coin_lockout_global_w(0,0); break; /* Unlock all coin slots */
331 case 0x0d: coin_counter_w(0,1); coin_counter_w(0,0); /* Count slot A */
332 /*logerror("Count coin slot A\n");*/ break;
333 case 0x0e: coin_counter_w(1,1); coin_counter_w(1,0); /* Count slot B */
334 /*logerror("Count coin slot B\n");*/ break;
335 /* The following are coin counts after coin-lock active (faulty coin-lock ?) */
336 case 0x01: coin_counter_w(0,1); coin_counter_w(0,0); coin_lockout_w(0,1); break;
337 case 0x02: coin_counter_w(1,1); coin_counter_w(1,0); coin_lockout_global_w(0,1); break;
338
339 default: //logerror("Writing unknown command (%04x) to coin control\n",data);
340 break;
341 }
342 //if (data > 0xf)
343 //{
344 // logerror("Writing unknown upper bits command (%04x) to coin control\n",data);
345 //}
346 }
347
WRITE_HANDLER(oki_bankswitch_w)348 static WRITE_HANDLER( oki_bankswitch_w )
349 {
350 OKIM6295_set_bank_base(0, ALL_VOICES, (data & 1) * 0x40000);
351 }
352
READ_HANDLER(toaplan2_shared_r)353 static READ_HANDLER( toaplan2_shared_r )
354 {
355 return toaplan2_shared_ram[offset>>1];
356 }
357
WRITE_HANDLER(toaplan2_shared_w)358 static WRITE_HANDLER( toaplan2_shared_w )
359 {
360 toaplan2_shared_ram[offset>>1] = data;
361 }
362
WRITE_HANDLER(toaplan2_hd647180_cpu_w)363 static WRITE_HANDLER( toaplan2_hd647180_cpu_w )
364 {
365 /* Command sent to secondary CPU. Support for HD647180 will be
366 required when a ROM dump becomes available for this hardware */
367
368 if (toaplan2_sub_cpu == CPU_2_Z80) /* Whoopee */
369 {
370 toaplan2_shared_ram[0] = data;
371 }
372 else /* Teki Paki */
373 {
374 mcu_data = data;
375 //logerror("PC:%08x Writing command (%04x) to secondary CPU shared port\n",cpu_getpreviouspc(),mcu_data);
376 }
377 }
378
READ_HANDLER(c2map_port_6_r)379 static READ_HANDLER( c2map_port_6_r )
380 {
381 /* bit 4 high signifies secondary CPU is ready */
382 /* bit 5 is tested low before V-Blank bit ??? */
383 switch (toaplan2_sub_cpu)
384 {
385 case CPU_2_Z80: mcu_data = toaplan2_shared_ram[0]; break;
386 case CPU_2_HD647180: mcu_data = 0xff; break;
387 default: mcu_data = 0x00; break;
388 }
389 if (mcu_data == 0xff) mcu_data = 0x10;
390 else mcu_data = 0x00;
391 return ( mcu_data | input_port_6_r(0) );
392 }
393
READ_HANDLER(pipibibi_z80_status_r)394 static READ_HANDLER( pipibibi_z80_status_r )
395 {
396 return toaplan2_shared_ram[0];
397 }
398
WRITE_HANDLER(pipibibi_z80_task_w)399 static WRITE_HANDLER( pipibibi_z80_task_w )
400 {
401 toaplan2_shared_ram[0] = data;
402 }
403
READ_HANDLER(video_count_r)404 static READ_HANDLER( video_count_r )
405 {
406 /* Maybe this should return which scan line number is being drawn */
407 /* Raizing games wait until its between F0h (240) and FFh (255) ??? */
408 /* Video busy while bit 8 is low. Maybe once it clocks */
409 /* over to 100h (256) or higher, it means frame done ??? */
410
411 video_status += 0x50; /* use a value to help prevent tight loop hangs */
412 video_status &= 0x1f0;
413 if ((video_status & 0xf0) == 0x40) video_status += 0x10;
414 return video_status;
415 }
416
READ_HANDLER(ghox_p1_h_analog_r)417 static READ_HANDLER( ghox_p1_h_analog_r )
418 {
419 INT8 value, new_value;
420 new_value = input_port_7_r(0);
421 if (new_value == old_p1_paddle_h) return 0;
422 value = new_value - old_p1_paddle_h;
423 old_p1_paddle_h = new_value;
424 return value;
425 }
READ_HANDLER(ghox_p1_v_analog_r)426 static READ_HANDLER( ghox_p1_v_analog_r )
427 {
428 INT8 new_value;
429 new_value = input_port_9_r(0); /* fake vertical movement */
430 if (new_value == old_p1_paddle_v) return input_port_1_r(0);
431 if (new_value > old_p1_paddle_v)
432 {
433 old_p1_paddle_v = new_value;
434 return (input_port_1_r(0) | 2);
435 }
436 old_p1_paddle_v = new_value;
437 return (input_port_1_r(0) | 1);
438 }
READ_HANDLER(ghox_p2_h_analog_r)439 static READ_HANDLER( ghox_p2_h_analog_r )
440 {
441 INT8 value, new_value;
442 new_value = input_port_8_r(0);
443 if (new_value == old_p2_paddle_h) return 0;
444 value = new_value - old_p2_paddle_h;
445 old_p2_paddle_h = new_value;
446 return value;
447 }
READ_HANDLER(ghox_p2_v_analog_r)448 static READ_HANDLER( ghox_p2_v_analog_r )
449 {
450 INT8 new_value;
451 new_value = input_port_10_r(0); /* fake vertical movement */
452 if (new_value == old_p2_paddle_v) return input_port_2_r(0);
453 if (new_value > old_p2_paddle_v)
454 {
455 old_p2_paddle_v = new_value;
456 return (input_port_2_r(0) | 2);
457 }
458 old_p2_paddle_v = new_value;
459 return (input_port_2_r(0) | 1);
460 }
461
READ_HANDLER(ghox_mcu_r)462 static READ_HANDLER( ghox_mcu_r )
463 {
464 return 0xff;
465 }
WRITE_HANDLER(ghox_mcu_w)466 static WRITE_HANDLER( ghox_mcu_w )
467 {
468 data &= 0xffff;
469 mcu_data = data;
470 if ((data >= 0xd0) && (data < 0xe0))
471 {
472 offset = ((data & 0x0f) * 4) + 0x38;
473 WRITE_WORD (&toaplan2_shared_ram[offset ],0x05); /* Return address for */
474 WRITE_WORD (&toaplan2_shared_ram[offset-2],0x56); /* RTS instruction */
475 }
476 //else
477 //{
478 // logerror("PC:%08x Writing %08x to HD647180 cpu shared ram status port\n",cpu_getpreviouspc(),mcu_data);
479 //}
480 WRITE_WORD (&toaplan2_shared_ram[0x56],0x4e); /* Return a RTS instruction */
481 WRITE_WORD (&toaplan2_shared_ram[0x58],0x75);
482
483 if (data == 0xd3)
484 {
485 WRITE_WORD (&toaplan2_shared_ram[0x56],0x3a); // move.w d1,d5
486 WRITE_WORD (&toaplan2_shared_ram[0x58],0x01);
487 WRITE_WORD (&toaplan2_shared_ram[0x5a],0x08); // bclr.b #0,d5
488 WRITE_WORD (&toaplan2_shared_ram[0x5c],0x85);
489 WRITE_WORD (&toaplan2_shared_ram[0x5e],0x00);
490 WRITE_WORD (&toaplan2_shared_ram[0x60],0x00);
491 WRITE_WORD (&toaplan2_shared_ram[0x62],0xcb); // muls.w #3,d5
492 WRITE_WORD (&toaplan2_shared_ram[0x64],0xfc);
493 WRITE_WORD (&toaplan2_shared_ram[0x66],0x00);
494 WRITE_WORD (&toaplan2_shared_ram[0x68],0x03);
495 WRITE_WORD (&toaplan2_shared_ram[0x6a],0x90); // sub.w d5,d0
496 WRITE_WORD (&toaplan2_shared_ram[0x6c],0x45);
497 WRITE_WORD (&toaplan2_shared_ram[0x6e],0xe5); // lsl.b #2,d1
498 WRITE_WORD (&toaplan2_shared_ram[0x70],0x09);
499 WRITE_WORD (&toaplan2_shared_ram[0x72],0x4e); // rts
500 WRITE_WORD (&toaplan2_shared_ram[0x74],0x75);
501 }
502
503 }
504
READ_HANDLER(ghox_shared_ram_r)505 static READ_HANDLER( ghox_shared_ram_r )
506 {
507 /* Ghox 68K reads data from MCU shared RAM and writes it to main RAM.
508 It then subroutine jumps to main RAM and executes this code.
509 Here, i'm just returning a RTS instruction for now.
510 See above ghox_mcu_w routine.
511
512 Offset $56 and $58 is accessed around PC:F814
513
514 Offset $38 and $36 is accessed from around PC:DA7C
515 Offset $3c and $3a is accessed from around PC:2E3C
516 Offset $40 and $3E is accessed from around PC:103EE
517 Offset $44 and $42 is accessed from around PC:FB52
518 Offset $48 and $46 is accessed from around PC:6776
519 */
520
521 int data = READ_WORD (&toaplan2_shared_ram[offset]);
522
523 return data;
524 }
WRITE_HANDLER(ghox_shared_ram_w)525 static WRITE_HANDLER( ghox_shared_ram_w )
526 {
527 WRITE_WORD (&toaplan2_shared_ram[offset],data);
528 }
529
530
READ_HANDLER(kbash_sub_cpu_r)531 static READ_HANDLER( kbash_sub_cpu_r )
532 {
533 /* Knuckle Bash's 68000 reads secondary CPU status via an I/O port.
534 If a value of 2 is read, then secondary CPU is busy.
535 Secondary CPU must report 0xff when no longer busy, to signify that it
536 has passed POST.
537 */
538 mcu_data=0xff;
539 return mcu_data;
540 }
541
WRITE_HANDLER(kbash_sub_cpu_w)542 static WRITE_HANDLER( kbash_sub_cpu_w )
543 {
544 //logerror("PC:%08x writing %04x to Zx80 secondary CPU status port %02x\n",cpu_getpreviouspc(),mcu_data,offset/2);
545 }
546
READ_HANDLER(shared_ram_r)547 static READ_HANDLER( shared_ram_r )
548 {
549 /* Other games using a Zx80 based secondary CPU, have shared memory between
550 the 68000 and the Zx80 CPU. The 68000 reads the status of the Zx80
551 via a location of the shared memory.
552 */
553 int data = READ_WORD (&toaplan2_shared_ram[offset]);
554 return data;
555 }
556
WRITE_HANDLER(shared_ram_w)557 static WRITE_HANDLER( shared_ram_w )
558 {
559 if (offset == 0x9e8)
560 {
561 WRITE_WORD (&toaplan2_shared_ram[offset + 2],data);
562 }
563 if (offset == 0xff8)
564 {
565 WRITE_WORD (&toaplan2_shared_ram[offset + 2],data);
566 //logerror("PC:%08x Writing (%04x) to secondary CPU\n",cpu_getpreviouspc(),data);
567 if ((data & 0xffff) == 0x81) data = 0x01;
568 }
569 WRITE_WORD (&toaplan2_shared_ram[offset],data);
570 }
READ_HANDLER(Zx80_status_port_r)571 static READ_HANDLER( Zx80_status_port_r )
572 {
573 /*** Status port includes Zx80 CPU POST codes. ************
574 *** This is actually a part of the 68000/Zx80 Shared RAM */
575
576 int data;
577
578 if (mcu_data == 0x800000aa) mcu_data = 0xff; /* dogyuun */
579 if (mcu_data == 0x00) mcu_data = 0x800000aa; /* dogyuun */
580
581 if (mcu_data == 0x8000ffaa) mcu_data = 0xffff; /* fixeight */
582 if (mcu_data == 0xffaa) mcu_data = 0x8000ffaa; /* fixeight */
583 if (mcu_data == 0xff00) mcu_data = 0xffaa; /* fixeight */
584
585 //logerror("PC:%08x reading %08x from Zx80 secondary CPU command/status port\n",cpu_getpreviouspc(),mcu_data);
586 data = mcu_data & 0x0000ffff;
587 return data;
588 }
WRITE_HANDLER(Zx80_command_port_w)589 static WRITE_HANDLER( Zx80_command_port_w )
590 {
591 mcu_data = data;
592 //logerror("PC:%08x Writing command (%04x) to Zx80 secondary CPU command/status port\n",cpu_getpreviouspc(),mcu_data);
593 }
594
READ_HANDLER(Zx80_sharedram_r)595 READ_HANDLER( Zx80_sharedram_r )
596 {
597 return Zx80_shared_ram[offset / 2];
598 }
599
WRITE_HANDLER(Zx80_sharedram_w)600 WRITE_HANDLER( Zx80_sharedram_w )
601 {
602 Zx80_shared_ram[offset / 2] = data;
603 }
READ_HANDLER(raizing_shared_ram_r)604 READ_HANDLER( raizing_shared_ram_r )
605 {
606 offset >>= 1;
607 offset &= 0x3fff;
608
609 return raizing_shared_ram[offset];
610
611 }
WRITE_HANDLER(raizing_shared_ram_w)612 WRITE_HANDLER( raizing_shared_ram_w )
613 {
614 offset >>= 1;
615 offset &= 0x3fff;
616
617 raizing_shared_ram[offset] = data & 0xff;
618 }
619
620
621 static struct MemoryReadAddress tekipaki_readmem[] =
622 {
623 { 0x000000, 0x01ffff, MRA_ROM },
624 { 0x020000, 0x03ffff, MRA_ROM }, /* extra for Whoopee */
625 { 0x080000, 0x082fff, MRA_BANK1 },
626 { 0x0c0000, 0x0c0fff, paletteram_word_r },
627 { 0x140004, 0x140007, toaplan2_0_videoram_r },
628 { 0x14000c, 0x14000d, input_port_0_r }, /* VBlank */
629 { 0x180000, 0x180001, input_port_4_r }, /* Dip Switch A */
630 { 0x180010, 0x180011, input_port_5_r }, /* Dip Switch B */
631 { 0x180020, 0x180021, input_port_3_r }, /* Coin/System inputs */
632 { 0x180030, 0x180031, c2map_port_6_r }, /* CPU 2 busy and Territory Jumper block */
633 { 0x180050, 0x180051, input_port_1_r }, /* Player 1 controls */
634 { 0x180060, 0x180061, input_port_2_r }, /* Player 2 controls */
635 { -1 }
636 };
637
638 static struct MemoryWriteAddress tekipaki_writemem[] =
639 {
640 { 0x000000, 0x01ffff, MWA_ROM },
641 { 0x020000, 0x03ffff, MWA_ROM }, /* extra for Whoopee */
642 { 0x080000, 0x082fff, MWA_BANK1 },
643 { 0x0c0000, 0x0c0fff, paletteram_xBBBBBGGGGGRRRRR_word_w, &paletteram },
644 { 0x140000, 0x140001, toaplan2_0_voffs_w },
645 { 0x140004, 0x140007, toaplan2_0_videoram_w }, /* Tile/Sprite VideoRAM */
646 { 0x140008, 0x140009, toaplan2_0_scroll_reg_select_w },
647 { 0x14000c, 0x14000d, toaplan2_0_scroll_reg_data_w },
648 { 0x180040, 0x180041, toaplan2_coin_w }, /* Coin count/lock */
649 { 0x180070, 0x180071, toaplan2_hd647180_cpu_w },
650 { -1 }
651 };
652
653 static struct MemoryReadAddress ghox_readmem[] =
654 {
655 { 0x000000, 0x03ffff, MRA_ROM },
656 { 0x040000, 0x040001, ghox_p2_h_analog_r }, /* Paddle 2 */
657 { 0x080000, 0x083fff, MRA_BANK1 },
658 { 0x0c0000, 0x0c0fff, paletteram_word_r },
659 { 0x100000, 0x100001, ghox_p1_h_analog_r }, /* Paddle 1 */
660 { 0x140004, 0x140007, toaplan2_0_videoram_r },
661 { 0x14000c, 0x14000d, input_port_0_r }, /* VBlank */
662 { 0x180000, 0x180001, ghox_mcu_r }, /* really part of shared RAM */
663 { 0x180006, 0x180007, input_port_4_r }, /* Dip Switch A */
664 { 0x180008, 0x180009, input_port_5_r }, /* Dip Switch B */
665 { 0x180010, 0x180011, input_port_3_r }, /* Coin/System inputs */
666 // { 0x18000c, 0x18000d, input_port_1_r }, /* Player 1 controls (real) */
667 // { 0x18000e, 0x18000f, input_port_2_r }, /* Player 2 controls (real) */
668 { 0x18000c, 0x18000d, ghox_p1_v_analog_r }, /* Player 1 controls */
669 { 0x18000e, 0x18000f, ghox_p2_v_analog_r }, /* Player 2 controls */
670 { 0x180500, 0x180fff, ghox_shared_ram_r },
671 { 0x18100c, 0x18100d, input_port_6_r }, /* Territory Jumper block */
672 { -1 }
673 };
674
675 static struct MemoryWriteAddress ghox_writemem[] =
676 {
677 { 0x000000, 0x03ffff, MWA_ROM },
678 { 0x080000, 0x083fff, MWA_BANK1 },
679 { 0x0c0000, 0x0c0fff, paletteram_xBBBBBGGGGGRRRRR_word_w, &paletteram },
680 { 0x140000, 0x140001, toaplan2_0_voffs_w },
681 { 0x140004, 0x140007, toaplan2_0_videoram_w }, /* Tile/Sprite VideoRAM */
682 { 0x140008, 0x140009, toaplan2_0_scroll_reg_select_w },
683 { 0x14000c, 0x14000d, toaplan2_0_scroll_reg_data_w },
684 { 0x180000, 0x180001, ghox_mcu_w }, /* really part of shared RAM */
685 { 0x180500, 0x180fff, ghox_shared_ram_w, &toaplan2_shared_ram },
686 { 0x181000, 0x181001, toaplan2_coin_w },
687 { -1 }
688 };
689
690 static struct MemoryReadAddress dogyuun_readmem[] =
691 {
692 { 0x000000, 0x07ffff, MRA_ROM },
693 { 0x100000, 0x103fff, MRA_BANK1 },
694 { 0x200010, 0x200011, input_port_1_r }, /* Player 1 controls */
695 { 0x200014, 0x200015, input_port_2_r }, /* Player 2 controls */
696 { 0x200018, 0x200019, input_port_3_r }, /* Coin/System inputs */
697 #if Zx80
698 { 0x21e000, 0x21fbff, shared_ram_r }, /* $21f000 status port */
699 { 0x21fc00, 0x21ffff, Zx80_sharedram_r }, /* 16-bit on 68000 side, 8-bit on Zx80 side */
700 #else
701 { 0x21e000, 0x21efff, shared_ram_r },
702 { 0x21f000, 0x21f001, Zx80_status_port_r }, /* Zx80 status port */
703 { 0x21f004, 0x21f005, input_port_4_r }, /* Dip Switch A */
704 { 0x21f006, 0x21f007, input_port_5_r }, /* Dip Switch B */
705 { 0x21f008, 0x21f009, input_port_6_r }, /* Territory Jumper block */
706 { 0x21fc00, 0x21ffff, Zx80_sharedram_r }, /* 16-bit on 68000 side, 8-bit on Zx80 side */
707 #endif
708 /***** The following in 0x30000x are for video controller 1 ******/
709 { 0x300004, 0x300007, toaplan2_0_videoram_r }, /* tile layers */
710 { 0x30000c, 0x30000d, input_port_0_r }, /* VBlank */
711 { 0x400000, 0x400fff, paletteram_word_r },
712 /***** The following in 0x50000x are for video controller 2 ******/
713 { 0x500004, 0x500007, toaplan2_1_videoram_r }, /* tile layers 2 */
714 { 0x700000, 0x700001, video_count_r }, /* test bit 8 */
715 { -1 }
716 };
717
718 static struct MemoryWriteAddress dogyuun_writemem[] =
719 {
720 { 0x000000, 0x07ffff, MWA_ROM },
721 { 0x100000, 0x103fff, MWA_BANK1 },
722 { 0x200008, 0x200009, OKIM6295_data_0_w },
723 { 0x20001c, 0x20001d, toaplan2_coin_w },
724 #if Zx80
725 { 0x21e000, 0x21fbff, shared_ram_w, &toaplan2_shared_ram }, /* $21F000 */
726 { 0x21fc00, 0x21ffff, Zx80_sharedram_w, &Zx80_shared_ram }, /* 16-bit on 68000 side, 8-bit on Zx80 side */
727 #else
728 { 0x21e000, 0x21efff, shared_ram_w, &toaplan2_shared_ram },
729 { 0x21f000, 0x21f001, Zx80_command_port_w }, /* Zx80 command port */
730 { 0x21fc00, 0x21ffff, Zx80_sharedram_w, &Zx80_shared_ram }, /* 16-bit on 68000 side, 8-bit on Zx80 side */
731 #endif
732 /***** The following in 0x30000x are for video controller 1 ******/
733 { 0x300000, 0x300001, toaplan2_0_voffs_w }, /* VideoRAM selector/offset */
734 { 0x300004, 0x300007, toaplan2_0_videoram_w }, /* Tile/Sprite VideoRAM */
735 { 0x300008, 0x300009, toaplan2_0_scroll_reg_select_w },
736 { 0x30000c, 0x30000d, toaplan2_0_scroll_reg_data_w },
737 { 0x400000, 0x400fff, paletteram_xBBBBBGGGGGRRRRR_word_w, &paletteram },
738 /***** The following in 0x50000x are for video controller 2 ******/
739 { 0x500000, 0x500001, toaplan2_1_voffs_w }, /* VideoRAM selector/offset */
740 { 0x500004, 0x500007, toaplan2_1_videoram_w }, /* Tile/Sprite VideoRAM */
741 { 0x500008, 0x500009, toaplan2_1_scroll_reg_select_w },
742 { 0x50000c, 0x50000d, toaplan2_1_scroll_reg_data_w },
743 { -1 }
744 };
745
746 static struct MemoryReadAddress kbash_readmem[] =
747 {
748 { 0x000000, 0x07ffff, MRA_ROM },
749 { 0x100000, 0x103fff, MRA_BANK1 },
750 { 0x200000, 0x200001, kbash_sub_cpu_r },
751 { 0x200004, 0x200005, input_port_4_r }, /* Dip Switch A */
752 { 0x200006, 0x200007, input_port_5_r }, /* Dip Switch B */
753 { 0x200008, 0x200009, input_port_6_r }, /* Territory Jumper block */
754 { 0x208010, 0x208011, input_port_1_r }, /* Player 1 controls */
755 { 0x208014, 0x208015, input_port_2_r }, /* Player 2 controls */
756 { 0x208018, 0x208019, input_port_3_r }, /* Coin/System inputs */
757 { 0x300004, 0x300007, toaplan2_0_videoram_r }, /* tile layers */
758 { 0x30000c, 0x30000d, input_port_0_r }, /* VBlank */
759 { 0x400000, 0x400fff, paletteram_word_r },
760 { 0x700000, 0x700001, video_count_r }, /* test bit 8 */
761 { -1 }
762 };
763
764 static struct MemoryWriteAddress kbash_writemem[] =
765 {
766 { 0x000000, 0x07ffff, MWA_ROM },
767 { 0x100000, 0x103fff, MWA_BANK1 },
768 { 0x200000, 0x200003, kbash_sub_cpu_w }, /* sound number to play */
769 // { 0x200002, 0x200003, kbash_sub_cpu_w2 }, /* ??? */
770 { 0x20801c, 0x20801d, toaplan2_coin_w },
771 { 0x300000, 0x300001, toaplan2_0_voffs_w },
772 { 0x300004, 0x300007, toaplan2_0_videoram_w },
773 { 0x300008, 0x300009, toaplan2_0_scroll_reg_select_w },
774 { 0x30000c, 0x30000d, toaplan2_0_scroll_reg_data_w },
775 { 0x400000, 0x400fff, paletteram_xBBBBBGGGGGRRRRR_word_w, &paletteram },
776 { -1 }
777 };
778
779 /* Fixed by Yochizo 2000/08/16 */
780 static struct MemoryReadAddress tatsujn2_readmem[] =
781 {
782 { 0x000000, 0x07ffff, MRA_ROM },
783 { 0x100000, 0x10ffff, MRA_BANK1 },
784 { 0x200004, 0x200007, toaplan2_0_videoram_r },
785 { 0x20000c, 0x20000d, input_port_0_r }, /* VBlank */
786 { 0x300000, 0x300fff, paletteram_word_r },
787 // { 0x400000, 0x403fff, MRA_BANK2 },
788 { 0x400000, 0x403fff, raizing_textram_r },
789 { 0x500000, 0x50ffff, MRA_BANK3 },
790 { 0x600000, 0x600001, video_count_r },
791 { 0x700000, 0x700001, input_port_4_r }, /* Dip Switch A */
792 { 0x700002, 0x700003, input_port_5_r }, /* Dip Switch B */
793 { 0x700004, 0x700005, input_port_6_r }, /* Territory Jumper block */
794 { 0x700006, 0x700007, input_port_1_r }, /* Player 1 controls */
795 { 0x700008, 0x700009, input_port_2_r }, /* Player 2 controls */
796 { 0x70000a, 0x70000b, input_port_3_r }, /* Coin/System inputs */
797 { 0x700016, 0x700017, YM2151_status_port_0_r },
798 { -1 }
799 };
800
801 static struct MemoryWriteAddress tatsujn2_writemem[] =
802 {
803 { 0x000000, 0x07ffff, MWA_ROM },
804 { 0x100000, 0x10ffff, MWA_BANK1 },
805 { 0x200000, 0x200001, toaplan2_0_voffs_w }, /* VideoRAM selector/offset */
806 { 0x200004, 0x200007, toaplan2_0_videoram_w }, /* Tile/Sprite VideoRAM */
807 { 0x200008, 0x200009, toaplan2_0_scroll_reg_select_w },
808 { 0x20000c, 0x20000d, toaplan2_0_scroll_reg_data_w },
809 { 0x300000, 0x300fff, paletteram_xBBBBBGGGGGRRRRR_word_w, &paletteram },
810 // { 0x400000, 0x403fff, MWA_BANK2 }, /* TEXT RAM */
811 { 0x400000, 0x403fff, raizing_textram_w, &textvideoram },
812 { 0x500000, 0x50ffff, MWA_BANK3 },
813 { 0x700010, 0x700011, OKIM6295_data_0_w },
814 { 0x700014, 0x700015, YM2151_register_port_0_w },
815 { 0x700016, 0x700017, YM2151_data_port_0_w },
816 { 0x70001e, 0x70001f, toaplan2_coin_w }, /* Coin count/lock */
817 { -1 }
818 };
819
820 static struct MemoryReadAddress pipibibs_readmem[] =
821 {
822 { 0x000000, 0x03ffff, MRA_ROM },
823 { 0x080000, 0x082fff, MRA_BANK1 },
824 { 0x0c0000, 0x0c0fff, paletteram_word_r },
825 { 0x140004, 0x140007, toaplan2_0_videoram_r },
826 { 0x14000c, 0x14000d, input_port_0_r }, /* VBlank */
827 { 0x190000, 0x190fff, toaplan2_shared_r },
828 { 0x19c020, 0x19c021, input_port_4_r }, /* Dip Switch A */
829 { 0x19c024, 0x19c025, input_port_5_r }, /* Dip Switch B */
830 { 0x19c028, 0x19c029, input_port_6_r }, /* Territory Jumper block */
831 { 0x19c02c, 0x19c02d, input_port_3_r }, /* Coin/System inputs */
832 { 0x19c030, 0x19c031, input_port_1_r }, /* Player 1 controls */
833 { 0x19c034, 0x19c035, input_port_2_r }, /* Player 2 controls */
834 { -1 }
835 };
836
837 static struct MemoryWriteAddress pipibibs_writemem[] =
838 {
839 { 0x000000, 0x03ffff, MWA_ROM },
840 { 0x080000, 0x082fff, MWA_BANK1 },
841 { 0x0c0000, 0x0c0fff, paletteram_xBBBBBGGGGGRRRRR_word_w, &paletteram },
842 { 0x140000, 0x140001, toaplan2_0_voffs_w },
843 { 0x140004, 0x140007, toaplan2_0_videoram_w }, /* Tile/Sprite VideoRAM */
844 { 0x140008, 0x140009, toaplan2_0_scroll_reg_select_w },
845 { 0x14000c, 0x14000d, toaplan2_0_scroll_reg_data_w },
846 { 0x190000, 0x190fff, toaplan2_shared_w, &toaplan2_shared_ram },
847 { 0x19c01c, 0x19c01d, toaplan2_coin_w }, /* Coin count/lock */
848 { -1 }
849 };
850
851 static struct MemoryReadAddress pipibibi_readmem[] =
852 {
853 { 0x000000, 0x03ffff, MRA_ROM },
854 { 0x080000, 0x082fff, MRA_BANK1 },
855 { 0x083000, 0x0837ff, pipibibi_spriteram_r },
856 { 0x083800, 0x087fff, MRA_BANK2 },
857 { 0x0c0000, 0x0c0fff, paletteram_word_r },
858 { 0x120000, 0x120fff, MRA_BANK3 },
859 { 0x180000, 0x182fff, pipibibi_videoram_r },
860 { 0x190002, 0x190003, pipibibi_z80_status_r }, /* Z80 ready ? */
861 { 0x19c020, 0x19c021, input_port_4_r }, /* Dip Switch A */
862 { 0x19c024, 0x19c025, input_port_5_r }, /* Dip Switch B */
863 { 0x19c028, 0x19c029, input_port_6_r }, /* Territory Jumper block */
864 { 0x19c02c, 0x19c02d, input_port_3_r }, /* Coin/System inputs */
865 { 0x19c030, 0x19c031, input_port_1_r }, /* Player 1 controls */
866 { 0x19c034, 0x19c035, input_port_2_r }, /* Player 2 controls */
867 { -1 }
868 };
869
870 static struct MemoryWriteAddress pipibibi_writemem[] =
871 {
872 { 0x000000, 0x03ffff, MWA_ROM },
873 { 0x080000, 0x082fff, MWA_BANK1 },
874 { 0x083000, 0x0837ff, pipibibi_spriteram_w }, /* SpriteRAM */
875 { 0x083800, 0x087fff, MWA_BANK2 }, /* SpriteRAM (unused) */
876 { 0x0c0000, 0x0c0fff, paletteram_xBBBBBGGGGGRRRRR_word_w, &paletteram },
877 { 0x120000, 0x120fff, MWA_BANK3 }, /* Copy of SpriteRAM ? */
878 // { 0x13f000, 0x13f001, MWA_NOP }, /* ??? */
879 { 0x180000, 0x182fff, pipibibi_videoram_w }, /* TileRAM */
880 { 0x188000, 0x18800f, pipibibi_scroll_w },
881 { 0x190010, 0x190011, pipibibi_z80_task_w }, /* Z80 task to perform */
882 { 0x19c01c, 0x19c01d, toaplan2_coin_w }, /* Coin count/lock */
883 { -1 }
884 };
885
886 static struct MemoryReadAddress fixeight_readmem[] =
887 {
888 { 0x000000, 0x07ffff, MRA_ROM },
889 { 0x100000, 0x103fff, MRA_BANK1 },
890 { 0x200008, 0x200009, input_port_4_r }, /* Dip Switch A */
891 { 0x20000c, 0x20000d, input_port_5_r }, /* Dip Switch B */
892 { 0x200010, 0x200011, input_port_1_r }, /* Player 1 controls */
893 { 0x200014, 0x200015, input_port_2_r }, /* Player 2 controls */
894 { 0x200018, 0x200019, input_port_3_r }, /* Coin/System inputs */
895 { 0x280000, 0x28dfff, MRA_BANK2 }, /* part of shared ram ? */
896 #if Zx80
897 { 0x28e000, 0x28fbff, shared_ram_r }, /* $21f000 status port */
898 { 0x28fc00, 0x28ffff, Zx80_sharedram_r }, /* 16-bit on 68000 side, 8-bit on Zx80 side */
899 #else
900 { 0x28e000, 0x28efff, shared_ram_r },
901 { 0x28f000, 0x28f001, Zx80_status_port_r }, /* Zx80 status port */
902 { 0x28f002, 0x28fbff, MRA_BANK3 }, /* part of shared ram ? */
903 { 0x28fc00, 0x28ffff, Zx80_sharedram_r }, /* 16-bit on 68000 side, 8-bit on Zx80 side */
904 #endif
905 { 0x300004, 0x300007, toaplan2_0_videoram_r },
906 { 0x30000c, 0x30000d, input_port_0_r },
907 { 0x400000, 0x400fff, paletteram_word_r },
908 { 0x500000, 0x501fff, MRA_BANK4 },
909 { 0x502000, 0x5021ff, MRA_BANK5 },
910 { 0x503000, 0x5031ff, MRA_BANK6 },
911 { 0x600000, 0x60ffff, MRA_BANK7 },
912 { 0x800000, 0x800001, video_count_r },
913 { -1 }
914 };
915
916 static struct MemoryWriteAddress fixeight_writemem[] =
917 {
918 { 0x000000, 0x07ffff, MWA_ROM },
919 { 0x100000, 0x103fff, MWA_BANK1 },
920 { 0x20001c, 0x20001d, toaplan2_coin_w }, /* Coin count/lock */
921 { 0x280000, 0x28dfff, MWA_BANK2 }, /* part of shared ram ? */
922 #if Zx80
923 { 0x28e000, 0x28fbff, shared_ram_w, &toaplan2_shared_ram }, /* $21F000 */
924 { 0x28fc00, 0x28ffff, Zx80_sharedram_w, &Zx80_shared_ram }, /* 16-bit on 68000 side, 8-bit on Zx80 side */
925 #else
926 { 0x28e000, 0x28efff, shared_ram_w, &toaplan2_shared_ram },
927 { 0x28f000, 0x28f001, Zx80_command_port_w }, /* Zx80 command port */
928 { 0x28f002, 0x28fbff, MWA_BANK3 }, /* part of shared ram ? */
929 { 0x28fc00, 0x28ffff, Zx80_sharedram_w, &Zx80_shared_ram }, /* 16-bit on 68000 side, 8-bit on Zx80 side */
930 #endif
931 { 0x300000, 0x300001, toaplan2_0_voffs_w }, /* VideoRAM selector/offset */
932 { 0x300004, 0x300007, toaplan2_0_videoram_w }, /* Tile/Sprite VideoRAM */
933 { 0x300008, 0x300009, toaplan2_0_scroll_reg_select_w },
934 { 0x30000c, 0x30000d, toaplan2_0_scroll_reg_data_w },
935 { 0x400000, 0x400fff, paletteram_xBBBBBGGGGGRRRRR_word_w, &paletteram },
936 { 0x500000, 0x501fff, MWA_BANK4 },
937 { 0x502000, 0x5021ff, MWA_BANK5 },
938 { 0x503000, 0x5031ff, MWA_BANK6 },
939 { 0x600000, 0x60ffff, MWA_BANK7 },
940 { -1 }
941 };
942
943 static struct MemoryReadAddress vfive_readmem[] =
944 {
945 { 0x000000, 0x07ffff, MRA_ROM },
946 { 0x100000, 0x103fff, MRA_BANK1 },
947 // { 0x200000, 0x20ffff, MRA_ROM }, /* Sound ROM is here ??? */
948 { 0x200010, 0x200011, input_port_1_r }, /* Player 1 controls */
949 { 0x200014, 0x200015, input_port_2_r }, /* Player 2 controls */
950 { 0x200018, 0x200019, input_port_3_r }, /* Coin/System inputs */
951 #if Zx80
952 { 0x21e000, 0x21fbff, shared_ram_r }, /* $21f000 status port */
953 { 0x21fc00, 0x21ffff, Zx80_sharedram_r }, /* 16-bit on 68000 side, 8-bit on Zx80 side */
954 #else
955 { 0x21e000, 0x21efff, shared_ram_r },
956 { 0x21f000, 0x21f001, Zx80_status_port_r }, /* Zx80 status port */
957 { 0x21f004, 0x21f005, input_port_4_r }, /* Dip Switch A */
958 { 0x21f006, 0x21f007, input_port_5_r }, /* Dip Switch B */
959 { 0x21f008, 0x21f009, input_port_6_r }, /* Territory Jumper block */
960 { 0x21fc00, 0x21ffff, Zx80_sharedram_r }, /* 16-bit on 68000 side, 8-bit on Zx80 side */
961 #endif
962 { 0x300004, 0x300007, toaplan2_0_videoram_r },
963 { 0x30000c, 0x30000d, input_port_0_r },
964 { 0x400000, 0x400fff, paletteram_word_r },
965 { 0x700000, 0x700001, video_count_r },
966 { -1 }
967 };
968
969 static struct MemoryWriteAddress vfive_writemem[] =
970 {
971 { 0x000000, 0x07ffff, MWA_ROM },
972 { 0x100000, 0x103fff, MWA_BANK1 },
973 // { 0x200000, 0x20ffff, MWA_ROM }, /* Sound ROM is here ??? */
974 { 0x20001c, 0x20001d, toaplan2_coin_w }, /* Coin count/lock */
975 #if Zx80
976 { 0x21e000, 0x21fbff, shared_ram_w, &toaplan2_shared_ram }, /* $21F000 */
977 { 0x21fc00, 0x21ffff, Zx80_sharedram_w, &Zx80_shared_ram }, /* 16-bit on 68000 side, 8-bit on Zx80 side */
978 #else
979 { 0x21e000, 0x21efff, shared_ram_w, &toaplan2_shared_ram },
980 { 0x21f000, 0x21f001, Zx80_command_port_w }, /* Zx80 command port */
981 { 0x21fc00, 0x21ffff, Zx80_sharedram_w, &Zx80_shared_ram }, /* 16-bit on 68000 side, 8-bit on Zx80 side */
982 #endif
983 { 0x300000, 0x300001, toaplan2_0_voffs_w }, /* VideoRAM selector/offset */
984 { 0x300004, 0x300007, toaplan2_0_videoram_w }, /* Tile/Sprite VideoRAM */
985 { 0x300008, 0x300009, toaplan2_0_scroll_reg_select_w },
986 { 0x30000c, 0x30000d, toaplan2_0_scroll_reg_data_w },
987 { 0x400000, 0x400fff, paletteram_xBBBBBGGGGGRRRRR_word_w, &paletteram },
988 { -1 }
989 };
990
991 static struct MemoryReadAddress batsugun_readmem[] =
992 {
993 { 0x000000, 0x07ffff, MRA_ROM },
994 { 0x100000, 0x10ffff, MRA_BANK1 },
995 { 0x200010, 0x200011, input_port_1_r }, /* Player 1 controls */
996 { 0x200014, 0x200015, input_port_2_r }, /* Player 2 controls */
997 { 0x200018, 0x200019, input_port_3_r }, /* Coin/System inputs */
998 { 0x210000, 0x21bbff, MRA_BANK2 },
999 #if Zx80
1000 { 0x21e000, 0x21fbff, shared_ram_r }, /* $21f000 status port */
1001 { 0x21fc00, 0x21ffff, Zx80_sharedram_r }, /* 16-bit on 68000 side, 8-bit on Zx80 side */
1002 #else
1003 { 0x21e000, 0x21efff, shared_ram_r },
1004 { 0x21f000, 0x21f001, Zx80_status_port_r }, /* Zx80 status port */
1005 { 0x21f004, 0x21f005, input_port_4_r }, /* Dip Switch A */
1006 { 0x21f006, 0x21f007, input_port_5_r }, /* Dip Switch B */
1007 { 0x21f008, 0x21f009, input_port_6_r }, /* Territory Jumper block */
1008 { 0x21fc00, 0x21ffff, Zx80_sharedram_r }, /* 16-bit on 68000 side, 8-bit on Zx80 side */
1009 #endif
1010 /***** The following in 0x30000x are for video controller 2 ******/
1011 { 0x300004, 0x300007, toaplan2_1_videoram_r }, /* tile layers */
1012 { 0x30000c, 0x30000d, input_port_0_r }, /* VBlank */
1013 { 0x400000, 0x400fff, paletteram_word_r },
1014 /***** The following in 0x50000x are for video controller 1 ******/
1015 { 0x500004, 0x500007, toaplan2_0_videoram_r }, /* tile layers 2 */
1016 { 0x700000, 0x700001, video_count_r }, /* test bit 8 */
1017 { -1 }
1018 };
1019
1020 static struct MemoryWriteAddress batsugun_writemem[] =
1021 {
1022 { 0x000000, 0x07ffff, MWA_ROM },
1023 { 0x100000, 0x10ffff, MWA_BANK1 },
1024 { 0x20001c, 0x20001d, toaplan2_coin_w }, /* Coin count/lock */
1025 { 0x210000, 0x21bbff, MWA_BANK2 },
1026 #if Zx80
1027 { 0x21e000, 0x21fbff, shared_ram_w, &toaplan2_shared_ram }, /* $21F000 */
1028 { 0x21fc00, 0x21ffff, Zx80_sharedram_w, &Zx80_shared_ram }, /* 16-bit on 68000 side, 8-bit on Zx80 side */
1029 #else
1030 { 0x21e000, 0x21efff, shared_ram_w, &toaplan2_shared_ram },
1031 { 0x21f000, 0x21f001, Zx80_command_port_w }, /* Zx80 command port */
1032 { 0x21fc00, 0x21ffff, Zx80_sharedram_w, &Zx80_shared_ram }, /* 16-bit on 68000 side, 8-bit on Zx80 side */
1033 #endif
1034 /***** The following in 0x30000x are for video controller 2 ******/
1035 { 0x300000, 0x300001, toaplan2_1_voffs_w }, /* VideoRAM selector/offset */
1036 { 0x300004, 0x300007, toaplan2_1_videoram_w }, /* Tile/Sprite VideoRAM */
1037 { 0x300008, 0x300009, toaplan2_1_scroll_reg_select_w },
1038 { 0x30000c, 0x30000d, toaplan2_1_scroll_reg_data_w },
1039 { 0x400000, 0x400fff, paletteram_xBBBBBGGGGGRRRRR_word_w, &paletteram },
1040 /***** The following in 0x50000x are for video controller 1 ******/
1041 { 0x500000, 0x500001, toaplan2_0_voffs_w }, /* VideoRAM selector/offset */
1042 { 0x500004, 0x500007, toaplan2_0_videoram_w }, /* Tile/Sprite VideoRAM */
1043 { 0x500008, 0x500009, toaplan2_0_scroll_reg_select_w },
1044 { 0x50000c, 0x50000d, toaplan2_0_scroll_reg_data_w },
1045 { -1 }
1046 };
1047
1048 static struct MemoryReadAddress snowbro2_readmem[] =
1049 {
1050 { 0x000000, 0x07ffff, MRA_ROM },
1051 { 0x100000, 0x10ffff, MRA_BANK1 },
1052 { 0x300004, 0x300007, toaplan2_0_videoram_r }, /* tile layers */
1053 { 0x30000c, 0x30000d, input_port_0_r }, /* VBlank */
1054 { 0x400000, 0x400fff, paletteram_word_r },
1055 { 0x500002, 0x500003, YM2151_status_port_0_r },
1056 { 0x600000, 0x600001, OKIM6295_status_0_r },
1057 { 0x700000, 0x700001, input_port_8_r }, /* Territory Jumper block */
1058 { 0x700004, 0x700005, input_port_6_r }, /* Dip Switch A */
1059 { 0x700008, 0x700009, input_port_7_r }, /* Dip Switch B */
1060 { 0x70000c, 0x70000d, input_port_1_r }, /* Player 1 controls */
1061 { 0x700010, 0x700011, input_port_2_r }, /* Player 2 controls */
1062 { 0x700014, 0x700015, input_port_3_r }, /* Player 3 controls */
1063 { 0x700018, 0x700019, input_port_4_r }, /* Player 4 controls */
1064 { 0x70001c, 0x70001d, input_port_5_r }, /* Coin/System inputs */
1065 { -1 }
1066 };
1067
1068 static struct MemoryWriteAddress snowbro2_writemem[] =
1069 {
1070 { 0x000000, 0x07ffff, MWA_ROM },
1071 { 0x100000, 0x10ffff, MWA_BANK1 },
1072 { 0x300000, 0x300001, toaplan2_0_voffs_w }, /* VideoRAM selector/offset */
1073 { 0x300004, 0x300007, toaplan2_0_videoram_w }, /* Tile/Sprite VideoRAM */
1074 { 0x300008, 0x300009, toaplan2_0_scroll_reg_select_w },
1075 { 0x30000c, 0x30000d, toaplan2_0_scroll_reg_data_w },
1076 { 0x400000, 0x400fff, paletteram_xBBBBBGGGGGRRRRR_word_w, &paletteram },
1077 { 0x500000, 0x500001, YM2151_register_port_0_w },
1078 { 0x500002, 0x500003, YM2151_data_port_0_w },
1079 { 0x600000, 0x600001, OKIM6295_data_0_w },
1080 { 0x700030, 0x700031, oki_bankswitch_w }, /* Sample bank switch */
1081 { 0x700034, 0x700035, toaplan2_coin_w }, /* Coin count/lock */
1082 { -1 }
1083 };
1084
1085 static struct MemoryReadAddress mahoudai_readmem[] =
1086 {
1087 { 0x000000, 0x07ffff, MRA_ROM },
1088 { 0x100000, 0x10ffff, MRA_BANK1 },
1089 { 0x218000, 0x21bfff, raizing_shared_ram_r },
1090 { 0x21c002, 0x21c003, YM2151_status_port_0_r },
1091 // { 0x21c008, 0x21c009, OKIM6295_status_0_r },
1092 { 0x21c020, 0x21c021, input_port_1_r },
1093 { 0x21c024, 0x21c025, input_port_2_r },
1094 { 0x21c028, 0x21c029, input_port_3_r },
1095 { 0x21c02c, 0x21c02d, input_port_4_r },
1096 { 0x21c030, 0x21c031, input_port_5_r },
1097 { 0x21c034, 0x21c035, input_port_6_r },
1098 { 0x21c03c, 0x21c03d, video_count_r },
1099 { 0x300004, 0x300007, toaplan2_0_videoram_r }, /* tile layers */
1100 { 0x30000c, 0x30000d, input_port_0_r }, /* VBlank */
1101 { 0x400000, 0x400fff, paletteram_word_r },
1102 { 0x500000, 0x503fff, raizing_textram_r },
1103 { -1 }
1104 };
1105
1106 static struct MemoryWriteAddress mahoudai_writemem[] =
1107 {
1108 { 0x000000, 0x07ffff, MWA_ROM },
1109 { 0x100000, 0x10ffff, MWA_BANK1 },
1110 { 0x218000, 0x21bfff, raizing_shared_ram_w, &raizing_shared_ram },
1111 { 0x21c000, 0x21c001, YM2151_register_port_0_w },
1112 { 0x21c004, 0x21c005, YM2151_data_port_0_w },
1113 { 0x21c008, 0x21c009, OKIM6295_data_0_w },
1114 { 0x21c01c, 0x21c01d, toaplan2_coin_w },
1115 { 0x300000, 0x300001, toaplan2_0_voffs_w }, /* VideoRAM selector/offset */
1116 { 0x300004, 0x300007, toaplan2_0_videoram_w }, /* Tile/Sprite VideoRAM */
1117 { 0x300008, 0x300009, toaplan2_0_scroll_reg_select_w },
1118 { 0x30000c, 0x30000d, toaplan2_0_scroll_reg_data_w },
1119 { 0x400000, 0x400fff, paletteram_xBBBBBGGGGGRRRRR_word_w, &paletteram },
1120 { 0x500000, 0x503fff, raizing_textram_w, &textvideoram},
1121 { -1 }
1122 };
1123
1124 static struct MemoryReadAddress shippumd_readmem[] =
1125 {
1126 { 0x000000, 0x0fffff, MRA_ROM },
1127 { 0x100000, 0x10ffff, MRA_BANK1 },
1128 { 0x218000, 0x21bfff, raizing_shared_ram_r },
1129 { 0x21c002, 0x21c003, YM2151_status_port_0_r },
1130 // { 0x21c008, 0x21c009, OKIM6295_status_0_r },
1131 { 0x21c020, 0x21c021, input_port_1_r },
1132 { 0x21c024, 0x21c025, input_port_2_r },
1133 { 0x21c028, 0x21c029, input_port_3_r },
1134 { 0x21c02c, 0x21c02d, input_port_4_r },
1135 { 0x21c030, 0x21c031, input_port_5_r },
1136 { 0x21c034, 0x21c035, input_port_6_r },
1137 { 0x21c03c, 0x21c03d, video_count_r },
1138 { 0x300004, 0x300007, toaplan2_0_videoram_r }, /* tile layers */
1139 { 0x30000c, 0x30000d, input_port_0_r }, /* VBlank */
1140 { 0x400000, 0x400fff, paletteram_word_r },
1141 { 0x500000, 0x503fff, raizing_textram_r },
1142 { -1 }
1143 };
1144
1145 static struct MemoryWriteAddress shippumd_writemem[] =
1146 {
1147 { 0x000000, 0x0fffff, MWA_ROM },
1148 { 0x100000, 0x10ffff, MWA_BANK1 },
1149 { 0x218000, 0x21bfff, raizing_shared_ram_w, &raizing_shared_ram },
1150 { 0x21c000, 0x21c001, YM2151_register_port_0_w },
1151 { 0x21c004, 0x21c005, YM2151_data_port_0_w },
1152 { 0x21c008, 0x21c009, OKIM6295_data_0_w },
1153 { 0x21c01c, 0x21c01d, toaplan2_coin_w },
1154 { 0x300000, 0x300001, toaplan2_0_voffs_w }, /* VideoRAM selector/offset */
1155 { 0x300004, 0x300007, toaplan2_0_videoram_w }, /* Tile/Sprite VideoRAM */
1156 { 0x300008, 0x300009, toaplan2_0_scroll_reg_select_w },
1157 { 0x30000c, 0x30000d, toaplan2_0_scroll_reg_data_w },
1158 { 0x400000, 0x400fff, paletteram_xBBBBBGGGGGRRRRR_word_w, &paletteram },
1159 { 0x500000, 0x503fff, raizing_textram_w, &textvideoram},
1160 { -1 }
1161 };
1162
1163
1164 static struct MemoryReadAddress sound_readmem[] =
1165 {
1166 { 0x0000, 0x7fff, MRA_ROM },
1167 { 0x8000, 0x87ff, MRA_RAM },
1168 { 0xe000, 0xe000, YM3812_status_port_0_r },
1169 { -1 } /* end of table */
1170 };
1171
1172 static struct MemoryWriteAddress sound_writemem[] =
1173 {
1174 { 0x0000, 0x7fff, MWA_ROM },
1175 { 0x8000, 0x87ff, MWA_RAM, &toaplan2_shared_ram },
1176 { 0xe000, 0xe000, YM3812_control_port_0_w },
1177 { 0xe001, 0xe001, YM3812_write_port_0_w },
1178 { -1 } /* end of table */
1179 };
1180
1181 /* Added by Yochizo 2000/08/20 */
1182
1183 static struct MemoryReadAddress raizing_sound_readmem[] =
1184 {
1185 { 0x0000, 0xbfff, MRA_ROM },
1186 { 0xc000, 0xdfff, MRA_RAM },
1187 { 0xe001, 0xe001, YM2151_status_port_0_r },
1188 // { 0xe004, 0xe004, OKIM6295_status_0_r },
1189 { 0xe010, 0xe010, input_port_1_r },
1190 { 0xe012, 0xe012, input_port_2_r },
1191 { 0xe014, 0xe014, input_port_3_r },
1192 { 0xe016, 0xe016, input_port_4_r },
1193 { 0xe018, 0xe018, input_port_5_r },
1194 { 0xe01a, 0xe01a, input_port_6_r },
1195 { -1 } /* end of table */
1196 };
1197
1198 static struct MemoryWriteAddress raizing_sound_writemem[] =
1199 {
1200 { 0x0000, 0xbfff, MWA_ROM },
1201 { 0xc000, 0xdfff, MWA_RAM, &raizing_shared_ram },
1202 { 0xe000, 0xe000, YM2151_register_port_0_w },
1203 { 0xe001, 0xe001, YM2151_data_port_0_w },
1204 { 0xe004, 0xe004, OKIM6295_data_0_w },
1205 { 0xe00e, 0xe00e, toaplan2_coin_w },
1206 { -1 } /* end of table */
1207 };
1208
1209
1210 #if HD64x180
1211 static struct MemoryReadAddress hd647180_readmem[] =
1212 {
1213 { 0x0000, 0x7fff, MRA_ROM },
1214 { 0xfe00, 0xffff, MRA_RAM }, /* Internal 512 bytes of RAM */
1215 { -1 } /* end of table */
1216 };
1217
1218 static struct MemoryWriteAddress hd647180_writemem[] =
1219 {
1220 { 0x0000, 0x7fff, MWA_ROM },
1221 { 0xfe00, 0xffff, MWA_RAM }, /* Internal 512 bytes of RAM */
1222 { -1 } /* end of table */
1223 };
1224 #endif
1225
1226
1227 #if Zx80
1228 static struct MemoryReadAddress Zx80_readmem[] =
1229 {
1230 { 0x0000, 0x7fff, MRA_RAM },
1231 { -1 } /* end of table */
1232 };
1233
1234 static struct MemoryWriteAddress Zx80_writemem[] =
1235 {
1236 { 0x0000, 0x07fff, MWA_RAM, &Zx80_sharedram },
1237 { -1 } /* end of table */
1238 };
1239 #endif
1240
1241
1242
1243 /*****************************************************************************
1244 Input Port definitions
1245 Service input of the TOAPLAN2_SYSTEM_INPUTS is used as a Pause type input.
1246 If you press then release the following buttons, the following occurs:
1247 Service & P2 start : The game will pause.
1248 P1 start : The game will continue.
1249 Service & P1 start & P2 start : The game will play in slow motion.
1250 *****************************************************************************/
1251
1252 #define TOAPLAN2_PLAYER_INPUT( player, button3 ) \
1253 PORT_START \
1254 PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_JOYSTICK_UP | IPF_8WAY | player ) \
1255 PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_JOYSTICK_DOWN | IPF_8WAY | player ) \
1256 PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_JOYSTICK_LEFT | IPF_8WAY | player ) \
1257 PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_JOYSTICK_RIGHT | IPF_8WAY | player ) \
1258 PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_BUTTON1 | player) \
1259 PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_BUTTON2 | player) \
1260 PORT_BIT( 0x0040, IP_ACTIVE_HIGH, button3 ) \
1261 PORT_BIT( 0xff80, IP_ACTIVE_HIGH, IPT_UNKNOWN )
1262
1263 #define TOAPLAN2_SYSTEM_INPUTS \
1264 PORT_START \
1265 PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_COIN3 ) \
1266 PORT_BIT( 0x0002, IP_ACTIVE_HIGH, IPT_TILT ) \
1267 PORT_BIT( 0x0004, IP_ACTIVE_HIGH, IPT_SERVICE1 )\
1268 PORT_BIT( 0x0008, IP_ACTIVE_HIGH, IPT_COIN1 ) \
1269 PORT_BIT( 0x0010, IP_ACTIVE_HIGH, IPT_COIN2 ) \
1270 PORT_BIT( 0x0020, IP_ACTIVE_HIGH, IPT_START1 ) \
1271 PORT_BIT( 0x0040, IP_ACTIVE_HIGH, IPT_START2 ) \
1272 PORT_BIT( 0xff80, IP_ACTIVE_HIGH, IPT_UNKNOWN )
1273
1274 #define TOAPLAN2_DSW_A \
1275 PORT_START \
1276 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Unused ) ) \
1277 PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) \
1278 PORT_DIPSETTING( 0x01, DEF_STR( On ) ) \
1279 PORT_DIPNAME( 0x02, 0x00, DEF_STR( Flip_Screen ) ) \
1280 PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) \
1281 PORT_DIPSETTING( 0x02, DEF_STR( On ) ) \
1282 PORT_SERVICE( 0x04, IP_ACTIVE_HIGH ) /* Service Mode */ \
1283 PORT_DIPNAME( 0x08, 0x00, DEF_STR( Demo_Sounds ) ) \
1284 PORT_DIPSETTING( 0x08, DEF_STR( Off ) ) \
1285 PORT_DIPSETTING( 0x00, DEF_STR( On ) ) \
1286 PORT_DIPNAME( 0x30, 0x00, DEF_STR( Coin_A ) ) \
1287 PORT_DIPSETTING( 0x30, DEF_STR( 4C_1C ) ) \
1288 PORT_DIPSETTING( 0x20, DEF_STR( 3C_1C ) ) \
1289 PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) ) \
1290 PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) \
1291 PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Coin_B ) ) \
1292 PORT_DIPSETTING( 0x00, DEF_STR( 1C_2C ) ) \
1293 PORT_DIPSETTING( 0x40, DEF_STR( 1C_3C ) ) \
1294 PORT_DIPSETTING( 0x80, DEF_STR( 1C_4C ) ) \
1295 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_6C ) ) \
1296 /* Non-European territories coin setups \
1297 PORT_DIPNAME( 0x30, 0x00, DEF_STR( Coin_A ) ) \
1298 PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) ) \
1299 PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) \
1300 PORT_DIPSETTING( 0x30, DEF_STR( 2C_3C ) ) \
1301 PORT_DIPSETTING( 0x10, DEF_STR( 1C_2C ) ) \
1302 PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Coin_B ) ) \
1303 PORT_DIPSETTING( 0x80, DEF_STR( 2C_1C ) ) \
1304 PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) ) \
1305 PORT_DIPSETTING( 0xc0, DEF_STR( 2C_3C ) ) \
1306 PORT_DIPSETTING( 0x40, DEF_STR( 1C_2C ) ) \
1307 */
1308
1309
1310
1311
1312 INPUT_PORTS_START( tekipaki )
1313 PORT_START /* (0) VBlank */
1314 PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_VBLANK )
1315 PORT_BIT( 0xfffe, IP_ACTIVE_HIGH, IPT_UNKNOWN )
1316
1317 TOAPLAN2_PLAYER_INPUT( IPF_PLAYER1, IPT_UNKNOWN )
1318
1319 TOAPLAN2_PLAYER_INPUT( IPF_PLAYER2, IPT_UNKNOWN )
1320
1321 TOAPLAN2_SYSTEM_INPUTS
1322
1323 TOAPLAN2_DSW_A
1324
1325 PORT_START /* (5) DSWB */
1326 PORT_DIPNAME( 0x03, 0x00, DEF_STR( Difficulty ) )
1327 PORT_DIPSETTING( 0x01, "Easy" )
1328 PORT_DIPSETTING( 0x00, "Medium" )
1329 PORT_DIPSETTING( 0x02, "Hard" )
1330 PORT_DIPSETTING( 0x03, "Hardest" )
1331 PORT_DIPNAME( 0x04, 0x00, DEF_STR( Unused ) )
1332 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1333 PORT_DIPSETTING( 0x04, DEF_STR( On ) )
1334 PORT_DIPNAME( 0x08, 0x00, DEF_STR( Unused ) )
1335 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1336 PORT_DIPSETTING( 0x08, DEF_STR( On ) )
1337 PORT_DIPNAME( 0x10, 0x00, DEF_STR( Unused ) )
1338 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1339 PORT_DIPSETTING( 0x10, DEF_STR( On ) )
1340 PORT_DIPNAME( 0x20, 0x00, DEF_STR( Unused ) )
1341 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1342 PORT_DIPSETTING( 0x20, DEF_STR( On ) )
1343 PORT_DIPNAME( 0x40, 0x00, "Game Mode" )
1344 PORT_DIPSETTING( 0x00, "Normal" )
1345 PORT_DIPSETTING( 0x40, "Stop" )
1346 PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unused ) )
1347 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1348 PORT_DIPSETTING( 0x80, DEF_STR( On ) )
1349
1350 PORT_START /* (6) Territory Jumper block */
1351 PORT_DIPNAME( 0x0f, 0x02, "Territory" )
1352 PORT_DIPSETTING( 0x02, "Europe" )
1353 PORT_DIPSETTING( 0x01, "USA" )
1354 PORT_DIPSETTING( 0x00, "Japan" )
1355 PORT_DIPSETTING( 0x03, "Hong Kong" )
1356 PORT_DIPSETTING( 0x05, "Taiwan" )
1357 PORT_DIPSETTING( 0x04, "Korea" )
1358 PORT_DIPSETTING( 0x07, "USA (Romstar)" )
1359 PORT_DIPSETTING( 0x08, "Hong Kong (Honest Trading Co.)" )
1360 PORT_DIPSETTING( 0x06, "Taiwan (Spacy Co. Ltd)" )
1361 PORT_BIT( 0xf0, IP_ACTIVE_HIGH, IPT_UNKNOWN )
1362 INPUT_PORTS_END
1363
1364 INPUT_PORTS_START( ghox )
1365 PORT_START /* (0) VBlank */
1366 PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_VBLANK )
1367 PORT_BIT( 0xfffe, IP_ACTIVE_HIGH, IPT_UNKNOWN )
1368
1369 TOAPLAN2_PLAYER_INPUT( IPF_PLAYER1, IPT_UNKNOWN )
1370
1371 TOAPLAN2_PLAYER_INPUT( IPF_PLAYER2, IPT_UNKNOWN )
1372
1373 TOAPLAN2_SYSTEM_INPUTS
1374
1375 TOAPLAN2_DSW_A
1376
1377 PORT_START /* (5) DSWB */
1378 PORT_DIPNAME( 0x03, 0x00, DEF_STR( Difficulty ) )
1379 PORT_DIPSETTING( 0x01, "Easy" )
1380 PORT_DIPSETTING( 0x00, "Medium" )
1381 PORT_DIPSETTING( 0x02, "Hard" )
1382 PORT_DIPSETTING( 0x03, "Hardest" )
1383 PORT_DIPNAME( 0x0c, 0x00, DEF_STR( Bonus_Life ) )
1384 PORT_DIPSETTING( 0x00, "100K, every 200K" )
1385 PORT_DIPSETTING( 0x04, "100K, every 300K" )
1386 PORT_DIPSETTING( 0x08, "100K" )
1387 PORT_DIPSETTING( 0x0c, "None" )
1388 PORT_DIPNAME( 0x30, 0x00, DEF_STR( Lives ) )
1389 PORT_DIPSETTING( 0x30, "1" )
1390 PORT_DIPSETTING( 0x20, "2" )
1391 PORT_DIPSETTING( 0x00, "3" )
1392 PORT_DIPSETTING( 0x10, "5" )
1393 PORT_BITX( 0x40, 0x00, IPT_DIPSWITCH_NAME | IPF_CHEAT, "Invulnerability", IP_KEY_NONE, IP_JOY_NONE )
1394 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1395 PORT_DIPSETTING( 0x40, DEF_STR( On ) )
1396 PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unused ) )
1397 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1398 PORT_DIPSETTING( 0x80, DEF_STR( On ) )
1399
1400 PORT_START /* (6) Territory Jumper block */
1401 PORT_DIPNAME( 0x0f, 0x02, "Territory" )
1402 PORT_DIPSETTING( 0x02, "Europe" )
1403 PORT_DIPSETTING( 0x01, "USA" )
1404 PORT_DIPSETTING( 0x00, "Japan" )
1405 PORT_DIPSETTING( 0x04, "Korea" )
1406 PORT_DIPSETTING( 0x03, "Hong Kong (Honest Trading Co." )
1407 PORT_DIPSETTING( 0x05, "Taiwan" )
1408 PORT_DIPSETTING( 0x06, "Spain & Portugal (APM Electronics SA)" )
1409 PORT_DIPSETTING( 0x07, "Italy (Star Electronica SRL)" )
1410 PORT_DIPSETTING( 0x08, "UK (JP Leisure Ltd)" )
1411 PORT_DIPSETTING( 0x0a, "Europe (Nova Apparate GMBH & Co)" )
1412 PORT_DIPSETTING( 0x0d, "Europe (Taito Corporation Japan)" )
1413 PORT_DIPSETTING( 0x09, "USA (Romstar)" )
1414 PORT_DIPSETTING( 0x0b, "USA (Taito America Corporation)" )
1415 PORT_DIPSETTING( 0x0c, "USA (Taito Corporation Japan)" )
1416 PORT_DIPSETTING( 0x0e, "Japan (Taito Corporation)" )
1417 PORT_BIT( 0xf0, IP_ACTIVE_HIGH, IPT_UNKNOWN )
1418
1419 PORT_START /* (7) Paddle 1 (left-right) read at $100000 */
1420 PORT_ANALOG( 0xff, 0x00, IPT_DIAL | IPF_PLAYER1, 25, 15, 0, 0xff )
1421
1422 PORT_START /* (8) Paddle 2 (left-right) read at $040000 */
1423 PORT_ANALOG( 0xff, 0x00, IPT_DIAL | IPF_PLAYER2, 25, 15, 0, 0xff )
1424
1425 PORT_START /* (9) Paddle 1 (fake up-down) */
1426 PORT_ANALOG( 0xff, 0x00, IPT_DIAL_V | IPF_PLAYER1, 15, 0, 0, 0xff )
1427
1428 PORT_START /* (10) Paddle 2 (fake up-down) */
1429 PORT_ANALOG( 0xff, 0x00, IPT_DIAL_V | IPF_PLAYER2, 15, 0, 0, 0xff )
1430 INPUT_PORTS_END
1431
1432 INPUT_PORTS_START( dogyuun )
1433 PORT_START /* (0) VBlank */
1434 PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_VBLANK )
1435 PORT_BIT( 0xfffe, IP_ACTIVE_HIGH, IPT_UNKNOWN )
1436
1437 TOAPLAN2_PLAYER_INPUT( IPF_PLAYER1, IPT_BUTTON3 | IPF_PLAYER1 )
1438
1439 TOAPLAN2_PLAYER_INPUT( IPF_PLAYER2, IPT_BUTTON3 | IPF_PLAYER2 )
1440
1441 TOAPLAN2_SYSTEM_INPUTS
1442
1443 PORT_START /* (4) DSWA */
1444 PORT_DIPNAME( 0x0001, 0x0000, "Play Mode" )
1445 PORT_DIPSETTING( 0x0000, "Coin Play" )
1446 PORT_DIPSETTING( 0x0001, DEF_STR( Free_Play) )
1447 PORT_DIPNAME( 0x0002, 0x0000, DEF_STR( Flip_Screen ) )
1448 PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
1449 PORT_DIPSETTING( 0x0002, DEF_STR( On ) )
1450 PORT_SERVICE( 0x0004, IP_ACTIVE_HIGH ) /* Service Mode */
1451 PORT_DIPNAME( 0x0008, 0x0000, DEF_STR( Demo_Sounds ) )
1452 PORT_DIPSETTING( 0x0008, DEF_STR( Off ) )
1453 PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
1454 PORT_DIPNAME( 0x0030, 0x0000, DEF_STR( Coin_A ) )
1455 PORT_DIPSETTING( 0x0030, DEF_STR( 4C_1C ) )
1456 PORT_DIPSETTING( 0x0020, DEF_STR( 3C_1C ) )
1457 PORT_DIPSETTING( 0x0010, DEF_STR( 2C_1C ) )
1458 PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) )
1459 PORT_DIPNAME( 0x00c0, 0x0000, DEF_STR( Coin_B ) )
1460 PORT_DIPSETTING( 0x0000, DEF_STR( 1C_2C ) )
1461 PORT_DIPSETTING( 0x0040, DEF_STR( 1C_3C ) )
1462 PORT_DIPSETTING( 0x0080, DEF_STR( 1C_4C ) )
1463 PORT_DIPSETTING( 0x00c0, DEF_STR( 1C_6C ) )
1464 /* Non-European territories coin setups
1465 PORT_DIPNAME( 0x0030, 0x0000, DEF_STR( Coin_A ) )
1466 PORT_DIPSETTING( 0x0020, DEF_STR( 2C_1C ) )
1467 PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) )
1468 PORT_DIPSETTING( 0x0030, DEF_STR( 2C_3C ) )
1469 PORT_DIPSETTING( 0x0010, DEF_STR( 1C_2C ) )
1470 PORT_DIPNAME( 0xc0, 0x0000, DEF_STR( Coin_B ) )
1471 PORT_DIPSETTING( 0x0080, DEF_STR( 2C_1C ) )
1472 PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) )
1473 PORT_DIPSETTING( 0x00c0, DEF_STR( 2C_3C ) )
1474 PORT_DIPSETTING( 0x0040, DEF_STR( 1C_2C ) )
1475 */
1476 PORT_BIT( 0xff00, IP_ACTIVE_HIGH, IPT_UNKNOWN )
1477
1478 PORT_START /* (5) DSWB */
1479 PORT_DIPNAME( 0x0003, 0x0000, DEF_STR( Difficulty ) )
1480 PORT_DIPSETTING( 0x0001, "Easy" )
1481 PORT_DIPSETTING( 0x0000, "Medium" )
1482 PORT_DIPSETTING( 0x0002, "Hard" )
1483 PORT_DIPSETTING( 0x0003, "Hardest" )
1484 PORT_DIPNAME( 0x000c, 0x0000, DEF_STR( Bonus_Life ) )
1485 PORT_DIPSETTING( 0x0004, "200K, 400K, 600K" )
1486 PORT_DIPSETTING( 0x0000, "200K" )
1487 PORT_DIPSETTING( 0x0008, "400K" )
1488 PORT_DIPSETTING( 0x000c, "None" )
1489 PORT_DIPNAME( 0x0030, 0x0000, DEF_STR( Lives ) )
1490 PORT_DIPSETTING( 0x0030, "1" )
1491 PORT_DIPSETTING( 0x0020, "2" )
1492 PORT_DIPSETTING( 0x0000, "3" )
1493 PORT_DIPSETTING( 0x0010, "5" )
1494 PORT_BITX( 0x0040, 0x0000, IPT_DIPSWITCH_NAME | IPF_CHEAT, "Invulnerability", IP_KEY_NONE, IP_JOY_NONE )
1495 PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
1496 PORT_DIPSETTING( 0x0040, DEF_STR( On ) )
1497 PORT_DIPNAME( 0x0080, 0x0000, "Allow Continue" )
1498 PORT_DIPSETTING( 0x0080, DEF_STR( No ) )
1499 PORT_DIPSETTING( 0x0000, DEF_STR( Yes ) )
1500
1501 PORT_START /* (6) Territory Jumper block */
1502 PORT_DIPNAME( 0x0f, 0x03, "Territory" )
1503 PORT_DIPSETTING( 0x03, "Europe" )
1504 PORT_DIPSETTING( 0x01, "USA" )
1505 PORT_DIPSETTING( 0x00, "Japan" )
1506 PORT_DIPSETTING( 0x05, "Korea (Unite Trading license)" )
1507 PORT_DIPSETTING( 0x04, "Hong Kong (Charterfield license)" )
1508 PORT_DIPSETTING( 0x06, "Taiwan" )
1509 PORT_DIPSETTING( 0x08, "South East Asia (Charterfield license)" )
1510 PORT_DIPSETTING( 0x0c, "USA (Atari Games Corp license)" )
1511 PORT_DIPSETTING( 0x0f, "Japan (Taito Corp license)" )
1512 /* Duplicate settings
1513 PORT_DIPSETTING( 0x0b, "Europe" )
1514 PORT_DIPSETTING( 0x07, "USA" )
1515 PORT_DIPSETTING( 0x0a, "Korea (Unite Trading license)" )
1516 PORT_DIPSETTING( 0x09, "Hong Kong (Charterfield license)" )
1517 PORT_DIPSETTING( 0x0b, "Taiwan" )
1518 PORT_DIPSETTING( 0x0d, "South East Asia (Charterfield license)" )
1519 PORT_DIPSETTING( 0x0c, "USA (Atari Games Corp license)" )
1520 */
1521 PORT_BIT( 0xf0, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* bit 0x10 sound ready */
1522 INPUT_PORTS_END
1523
1524 INPUT_PORTS_START( kbash )
1525 PORT_START /* (0) VBlank */
1526 PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_VBLANK )
1527 PORT_BIT( 0xfffe, IP_ACTIVE_HIGH, IPT_UNKNOWN )
1528
1529 TOAPLAN2_PLAYER_INPUT( IPF_PLAYER1, IPT_BUTTON3 | IPF_PLAYER1 )
1530
1531 TOAPLAN2_PLAYER_INPUT( IPF_PLAYER2, IPT_BUTTON3 | IPF_PLAYER2 )
1532
1533 TOAPLAN2_SYSTEM_INPUTS
1534
1535 PORT_START /* (4) DSWA */
1536 PORT_DIPNAME( 0x0001, 0x0000, "Continue Mode" )
1537 PORT_DIPSETTING( 0x0000, "Normal" )
1538 PORT_DIPSETTING( 0x0001, "Discount" )
1539 PORT_DIPNAME( 0x0002, 0x0000, DEF_STR( Flip_Screen ) )
1540 PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
1541 PORT_DIPSETTING( 0x0002, DEF_STR( On ) )
1542 PORT_SERVICE( 0x0004, IP_ACTIVE_HIGH ) /* Service Mode */
1543 PORT_DIPNAME( 0x0008, 0x0000, DEF_STR( Demo_Sounds ) )
1544 PORT_DIPSETTING( 0x0008, DEF_STR( Off ) )
1545 PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
1546 PORT_DIPNAME( 0x0030, 0x0000, DEF_STR( Coin_A ) )
1547 PORT_DIPSETTING( 0x0030, DEF_STR( 4C_1C ) )
1548 PORT_DIPSETTING( 0x0020, DEF_STR( 3C_1C ) )
1549 PORT_DIPSETTING( 0x0010, DEF_STR( 2C_1C ) )
1550 PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) )
1551 PORT_DIPNAME( 0x00c0, 0x0000, DEF_STR( Coin_B ) )
1552 PORT_DIPSETTING( 0x0000, DEF_STR( 1C_2C ) )
1553 PORT_DIPSETTING( 0x0040, DEF_STR( 1C_3C ) )
1554 PORT_DIPSETTING( 0x0080, DEF_STR( 1C_4C ) )
1555 PORT_DIPSETTING( 0x00c0, DEF_STR( 1C_6C ) )
1556 /* Non-European territories coin setup
1557 PORT_DIPNAME( 0x0030, 0x0000, DEF_STR( Coin_A ) )
1558 PORT_DIPSETTING( 0x0020, DEF_STR( 2C_1C ) )
1559 PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) )
1560 PORT_DIPSETTING( 0x0030, DEF_STR( 2C_3C ) )
1561 PORT_DIPSETTING( 0x0010, DEF_STR( 1C_2C ) )
1562 PORT_DIPNAME( 0x00c0, 0x0000, DEF_STR( Coin_B ) )
1563 PORT_DIPSETTING( 0x0080, DEF_STR( 2C_1C ) )
1564 PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) )
1565 PORT_DIPSETTING( 0x00c0, DEF_STR( 2C_3C ) )
1566 PORT_DIPSETTING( 0x0040, DEF_STR( 1C_2C ) )
1567 */
1568 PORT_BIT( 0xff00, IP_ACTIVE_HIGH, IPT_UNKNOWN )
1569
1570 PORT_START /* (5) DSWB */
1571 PORT_DIPNAME( 0x0003, 0x0000, DEF_STR( Difficulty ) )
1572 PORT_DIPSETTING( 0x0001, "Easy" )
1573 PORT_DIPSETTING( 0x0000, "Medium" )
1574 PORT_DIPSETTING( 0x0002, "Hard" )
1575 PORT_DIPSETTING( 0x0003, "Hardest" )
1576 PORT_DIPNAME( 0x000c, 0x0000, DEF_STR( Bonus_Life ) )
1577 PORT_DIPSETTING( 0x0000, "100K, every 400K" )
1578 PORT_DIPSETTING( 0x0004, "100K" )
1579 PORT_DIPSETTING( 0x0008, "200K" )
1580 PORT_DIPSETTING( 0x000c, "None" )
1581 PORT_DIPNAME( 0x0030, 0x0020, DEF_STR( Lives ) )
1582 PORT_DIPSETTING( 0x0030, "1" )
1583 PORT_DIPSETTING( 0x0000, "2" )
1584 PORT_DIPSETTING( 0x0020, "3" )
1585 PORT_DIPSETTING( 0x0010, "4" )
1586 PORT_BITX( 0x0040, 0x0000, IPT_DIPSWITCH_NAME | IPF_CHEAT, "Invulnerability", IP_KEY_NONE, IP_JOY_NONE )
1587 PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
1588 PORT_DIPSETTING( 0x0040, DEF_STR( On ) )
1589 PORT_DIPNAME( 0x0080, 0x0000, "Allow Continue" )
1590 PORT_DIPSETTING( 0x0080, DEF_STR( No ) )
1591 PORT_DIPSETTING( 0x0000, DEF_STR( Yes ) )
1592 PORT_BIT( 0xff00, IP_ACTIVE_HIGH, IPT_UNKNOWN )
1593
1594 PORT_START /* (6) Territory Jumper block */
1595 PORT_DIPNAME( 0x000f, 0x000a, "Territory" )
1596 PORT_DIPSETTING( 0x000a, "Europe" )
1597 PORT_DIPSETTING( 0x0009, "USA" )
1598 PORT_DIPSETTING( 0x0000, "Japan" )
1599 PORT_DIPSETTING( 0x0003, "Korea" )
1600 PORT_DIPSETTING( 0x0004, "Hong Kong" )
1601 PORT_DIPSETTING( 0x0007, "Taiwan" )
1602 PORT_DIPSETTING( 0x0006, "South East Asia" )
1603 PORT_DIPSETTING( 0x0002, "Europe, USA (Atari License)" )
1604 PORT_DIPSETTING( 0x0001, "USA, Europe (Atari License)" )
1605 PORT_BIT( 0xfff0, IP_ACTIVE_HIGH, IPT_UNKNOWN )
1606 INPUT_PORTS_END
1607
1608 /* Added by Yochizo 2000/08/16 */
1609 INPUT_PORTS_START( tatsujn2 )
1610 PORT_START /* (0) VBlank */
1611 PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_VBLANK )
1612 PORT_BIT( 0xfffe, IP_ACTIVE_HIGH, IPT_UNKNOWN )
1613
1614 TOAPLAN2_PLAYER_INPUT( IPF_PLAYER1, IPT_UNKNOWN )
1615
1616 TOAPLAN2_PLAYER_INPUT( IPF_PLAYER2, IPT_UNKNOWN )
1617
1618 TOAPLAN2_SYSTEM_INPUTS
1619
1620 PORT_START /* (4) DSWA */
1621 PORT_DIPNAME( 0x0002, 0x0000, DEF_STR( Flip_Screen ) )
1622 PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
1623 PORT_DIPSETTING( 0x0002, DEF_STR( On ) )
1624 PORT_DIPNAME( 0x0004, 0x0000, "Test Switch" )
1625 PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
1626 PORT_DIPSETTING( 0x0004, DEF_STR( On ) )
1627 PORT_DIPNAME( 0x0008, 0x0000, DEF_STR( Demo_Sounds ) )
1628 PORT_DIPSETTING( 0x0008, DEF_STR( Off ) )
1629 PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
1630 PORT_DIPNAME( 0x0030, 0x0000, DEF_STR( Coin_A ) )
1631 PORT_DIPSETTING( 0x0020, DEF_STR( 2C_1C ) )
1632 PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) )
1633 PORT_DIPSETTING( 0x0030, DEF_STR( 2C_3C ) )
1634 PORT_DIPSETTING( 0x0010, DEF_STR( 1C_2C ) )
1635 PORT_DIPNAME( 0x00c0, 0x0000, DEF_STR( Coin_B ) )
1636 PORT_DIPSETTING( 0x0080, DEF_STR( 2C_1C ) )
1637 PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) )
1638 PORT_DIPSETTING( 0x00c0, DEF_STR( 2C_3C ) )
1639 PORT_DIPSETTING( 0x0040, DEF_STR( 1C_2C ) )
1640 PORT_BIT( 0xff00, IP_ACTIVE_HIGH, IPT_UNKNOWN )
1641
1642 PORT_START /* (5) DSWB */
1643 PORT_DIPNAME( 0x0003, 0x0000, DEF_STR( Difficulty ) )
1644 PORT_DIPSETTING( 0x0001, "Easy" )
1645 PORT_DIPSETTING( 0x0000, "Medium" )
1646 PORT_DIPSETTING( 0x0002, "Hard" )
1647 PORT_DIPSETTING( 0x0003, "Hardest" )
1648 PORT_DIPNAME( 0x000c, 0x0000, DEF_STR( Bonus_Life ) )
1649 PORT_DIPSETTING( 0x0000, "70K, and 200K" )
1650 PORT_DIPSETTING( 0x0004, "100K, and 250K" )
1651 PORT_DIPSETTING( 0x0008, "100K" )
1652 PORT_DIPSETTING( 0x000c, "200K" )
1653 PORT_DIPNAME( 0x0030, 0x0000, DEF_STR( Lives ) )
1654 PORT_DIPSETTING( 0x0030, "2" )
1655 PORT_DIPSETTING( 0x0020, "4" )
1656 PORT_DIPSETTING( 0x0000, "3" )
1657 PORT_DIPSETTING( 0x0010, "5" )
1658 PORT_BITX( 0x0040, 0x0000, IPT_DIPSWITCH_NAME | IPF_CHEAT, "Invulnerability", IP_KEY_NONE, IP_JOY_NONE )
1659 PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
1660 PORT_DIPSETTING( 0x0040, DEF_STR( On ) )
1661 PORT_DIPNAME( 0x0080, 0x0000, "Allow Continue" )
1662 PORT_DIPSETTING( 0x0080, DEF_STR( No ) )
1663 PORT_DIPSETTING( 0x0000, DEF_STR( Yes ) )
1664
1665 PORT_START /* (6) Territory Jumper block */
1666 PORT_DIPNAME( 0x07, 0x02, "Territory" )
1667 PORT_DIPSETTING( 0x02, "Europe" )
1668 PORT_DIPSETTING( 0x01, "USA" )
1669 PORT_DIPSETTING( 0x00, "Japan" )
1670 PORT_DIPSETTING( 0x03, "Hong Kong" )
1671 PORT_DIPSETTING( 0x05, "Taiwan" )
1672 PORT_DIPSETTING( 0x06, "Asia" )
1673 PORT_DIPSETTING( 0x04, "Korea" )
1674 INPUT_PORTS_END
1675
1676 INPUT_PORTS_START( pipibibs )
1677 PORT_START /* (0) VBlank */
1678 PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_VBLANK )
1679 PORT_BIT( 0xfffe, IP_ACTIVE_HIGH, IPT_UNKNOWN )
1680
1681 TOAPLAN2_PLAYER_INPUT( IPF_PLAYER1, IPT_UNKNOWN )
1682
1683 TOAPLAN2_PLAYER_INPUT( IPF_PLAYER2, IPT_UNKNOWN )
1684
1685 TOAPLAN2_SYSTEM_INPUTS
1686
1687 TOAPLAN2_DSW_A
1688
1689 PORT_START /* (5) DSWB */
1690 PORT_DIPNAME( 0x03, 0x00, DEF_STR( Difficulty ) )
1691 PORT_DIPSETTING( 0x01, "Easy" )
1692 PORT_DIPSETTING( 0x00, "Medium" )
1693 PORT_DIPSETTING( 0x02, "Hard" )
1694 PORT_DIPSETTING( 0x03, "Hardest" )
1695 PORT_DIPNAME( 0x0c, 0x00, DEF_STR( Bonus_Life ) )
1696 PORT_DIPSETTING( 0x04, "150K, every 200K" )
1697 PORT_DIPSETTING( 0x00, "200K, every 300K" )
1698 PORT_DIPSETTING( 0x08, "200K" )
1699 PORT_DIPSETTING( 0x0c, "None" )
1700 PORT_DIPNAME( 0x30, 0x00, DEF_STR( Lives ) )
1701 PORT_DIPSETTING( 0x30, "1" )
1702 PORT_DIPSETTING( 0x20, "2" )
1703 PORT_DIPSETTING( 0x00, "3" )
1704 PORT_DIPSETTING( 0x10, "5" )
1705 PORT_BITX( 0x40, 0x00, IPT_DIPSWITCH_NAME | IPF_CHEAT, "Invulnerability", IP_KEY_NONE, IP_JOY_NONE )
1706 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1707 PORT_DIPSETTING( 0x40, DEF_STR( On ) )
1708 PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unused ) )
1709 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1710 PORT_DIPSETTING( 0x80, DEF_STR( On ) )
1711
1712 PORT_START /* (6) Territory Jumper block */
1713 PORT_DIPNAME( 0x07, 0x06, "Territory" )
1714 PORT_DIPSETTING( 0x06, "Europe" )
1715 PORT_DIPSETTING( 0x04, "USA" )
1716 PORT_DIPSETTING( 0x00, "Japan" )
1717 PORT_DIPSETTING( 0x02, "Hong Kong" )
1718 PORT_DIPSETTING( 0x03, "Taiwan" )
1719 PORT_DIPSETTING( 0x01, "Asia" )
1720 PORT_DIPSETTING( 0x07, "Europe (Nova Apparate GMBH & Co)" )
1721 PORT_DIPSETTING( 0x05, "USA (Romstar)" )
1722 PORT_BIT( 0xf8, IP_ACTIVE_HIGH, IPT_UNKNOWN )
1723 INPUT_PORTS_END
1724
1725 INPUT_PORTS_START( whoopee )
1726 PORT_START /* (0) VBlank */
1727 PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_VBLANK )
1728 PORT_BIT( 0xfffe, IP_ACTIVE_HIGH, IPT_UNKNOWN )
1729
1730 TOAPLAN2_PLAYER_INPUT( IPF_PLAYER1, IPT_UNKNOWN )
1731
1732 TOAPLAN2_PLAYER_INPUT( IPF_PLAYER2, IPT_UNKNOWN )
1733
1734 TOAPLAN2_SYSTEM_INPUTS
1735
1736 PORT_START /* (4) DSWA */
1737 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Unused ) )
1738 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1739 PORT_DIPSETTING( 0x01, DEF_STR( On ) )
1740 PORT_DIPNAME( 0x02, 0x00, DEF_STR( Flip_Screen ) )
1741 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1742 PORT_DIPSETTING( 0x02, DEF_STR( On ) )
1743 PORT_SERVICE( 0x04, IP_ACTIVE_HIGH ) /* Service Mode */
1744 PORT_DIPNAME( 0x08, 0x00, DEF_STR( Demo_Sounds ) )
1745 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
1746 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1747 PORT_DIPNAME( 0x30, 0x00, DEF_STR( Coin_A ) )
1748 PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) )
1749 PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
1750 PORT_DIPSETTING( 0x30, DEF_STR( 2C_3C ) )
1751 PORT_DIPSETTING( 0x10, DEF_STR( 1C_2C ) )
1752 PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Coin_B ) )
1753 PORT_DIPSETTING( 0x80, DEF_STR( 2C_1C ) )
1754 PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
1755 PORT_DIPSETTING( 0xc0, DEF_STR( 2C_3C ) )
1756 PORT_DIPSETTING( 0x40, DEF_STR( 1C_2C ) )
1757 /* European territories coin setups
1758 PORT_DIPNAME( 0x30, 0x00, DEF_STR( Coin_A ) )
1759 PORT_DIPSETTING( 0x30, DEF_STR( 4C_1C ) )
1760 PORT_DIPSETTING( 0x20, DEF_STR( 3C_1C ) )
1761 PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) )
1762 PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
1763 PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Coin_B ) )
1764 PORT_DIPSETTING( 0x00, DEF_STR( 1C_2C ) )
1765 PORT_DIPSETTING( 0x40, DEF_STR( 1C_3C ) )
1766 PORT_DIPSETTING( 0x80, DEF_STR( 1C_4C ) )
1767 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_6C ) )
1768 */
1769
1770 PORT_START /* (5) DSWB */
1771 PORT_DIPNAME( 0x03, 0x00, DEF_STR( Difficulty ) )
1772 PORT_DIPSETTING( 0x01, "Easy" )
1773 PORT_DIPSETTING( 0x00, "Medium" )
1774 PORT_DIPSETTING( 0x02, "Hard" )
1775 PORT_DIPSETTING( 0x03, "Hardest" )
1776 PORT_DIPNAME( 0x0c, 0x00, DEF_STR( Bonus_Life ) )
1777 PORT_DIPSETTING( 0x04, "150K, every 200K" )
1778 PORT_DIPSETTING( 0x00, "200K, every 300K" )
1779 PORT_DIPSETTING( 0x08, "200K" )
1780 PORT_DIPSETTING( 0x0c, "None" )
1781 PORT_DIPNAME( 0x30, 0x00, DEF_STR( Lives ) )
1782 PORT_DIPSETTING( 0x30, "1" )
1783 PORT_DIPSETTING( 0x20, "2" )
1784 PORT_DIPSETTING( 0x00, "3" )
1785 PORT_DIPSETTING( 0x10, "5" )
1786 PORT_BITX( 0x40, 0x00, IPT_DIPSWITCH_NAME | IPF_CHEAT, "Invulnerability", IP_KEY_NONE, IP_JOY_NONE )
1787 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1788 PORT_DIPSETTING( 0x40, DEF_STR( On ) )
1789 PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unused ) )
1790 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1791 PORT_DIPSETTING( 0x80, DEF_STR( On ) )
1792
1793 PORT_START /* (6) Territory Jumper block */
1794 PORT_DIPNAME( 0x07, 0x06, "Territory" )
1795 PORT_DIPSETTING( 0x06, "Europe" )
1796 PORT_DIPSETTING( 0x04, "USA" )
1797 PORT_DIPSETTING( 0x00, "Japan" )
1798 PORT_DIPSETTING( 0x02, "Hong Kong" )
1799 PORT_DIPSETTING( 0x03, "Taiwan" )
1800 PORT_DIPSETTING( 0x01, "Asia" )
1801 PORT_DIPSETTING( 0x07, "Europe (Nova Apparate GMBH & Co)" )
1802 PORT_DIPSETTING( 0x05, "USA (Romstar)" )
1803 PORT_BIT( 0xf8, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* bit 0x10 sound ready */
1804 INPUT_PORTS_END
1805
1806 INPUT_PORTS_START( pipibibi )
1807 PORT_START /* (0) VBlank */
1808 // PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_VBLANK ) /* This video HW */
1809 // PORT_BIT( 0xfffe, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* doesnt wait for VBlank */
1810
1811 TOAPLAN2_PLAYER_INPUT( IPF_PLAYER1, IPT_UNKNOWN )
1812
1813 TOAPLAN2_PLAYER_INPUT( IPF_PLAYER2, IPT_UNKNOWN )
1814
1815 TOAPLAN2_SYSTEM_INPUTS
1816
1817 PORT_START /* (4) DSWA */
1818 PORT_DIPNAME( 0x01, 0x00, DEF_STR( Unused ) )
1819 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1820 PORT_DIPSETTING( 0x01, DEF_STR( On ) )
1821 // PORT_DIPNAME( 0x02, 0x00, DEF_STR( Flip_Screen ) ) /* This video HW */
1822 // PORT_DIPSETTING( 0x00, DEF_STR( Off ) ) /* doesn't support */
1823 // PORT_DIPSETTING( 0x02, DEF_STR( On ) ) /* flip screen */
1824 PORT_SERVICE( 0x04, IP_ACTIVE_HIGH ) /* Service Mode */
1825 PORT_DIPNAME( 0x08, 0x00, DEF_STR( Demo_Sounds ) )
1826 PORT_DIPSETTING( 0x08, DEF_STR( Off ) )
1827 PORT_DIPSETTING( 0x00, DEF_STR( On ) )
1828 PORT_DIPNAME( 0x30, 0x00, DEF_STR( Coin_A ) )
1829 PORT_DIPSETTING( 0x20, DEF_STR( 2C_1C ) )
1830 PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
1831 PORT_DIPSETTING( 0x30, DEF_STR( 2C_3C ) )
1832 PORT_DIPSETTING( 0x10, DEF_STR( 1C_2C ) )
1833 PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Coin_B ) )
1834 PORT_DIPSETTING( 0x80, DEF_STR( 2C_1C ) )
1835 PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
1836 PORT_DIPSETTING( 0xc0, DEF_STR( 2C_3C ) )
1837 PORT_DIPSETTING( 0x40, DEF_STR( 1C_2C ) )
1838 /* European territories coin setups
1839 PORT_DIPNAME( 0x30, 0x00, DEF_STR( Coin_A ) )
1840 PORT_DIPSETTING( 0x30, DEF_STR( 4C_1C ) )
1841 PORT_DIPSETTING( 0x20, DEF_STR( 3C_1C ) )
1842 PORT_DIPSETTING( 0x10, DEF_STR( 2C_1C ) )
1843 PORT_DIPSETTING( 0x00, DEF_STR( 1C_1C ) )
1844 PORT_DIPNAME( 0xc0, 0x00, DEF_STR( Coin_B ) )
1845 PORT_DIPSETTING( 0x00, DEF_STR( 1C_2C ) )
1846 PORT_DIPSETTING( 0x40, DEF_STR( 1C_3C ) )
1847 PORT_DIPSETTING( 0x80, DEF_STR( 1C_4C ) )
1848 PORT_DIPSETTING( 0xc0, DEF_STR( 1C_6C ) )
1849 */
1850
1851 PORT_START /* (5) DSWB */
1852 PORT_DIPNAME( 0x03, 0x00, DEF_STR( Difficulty ) )
1853 PORT_DIPSETTING( 0x01, "Easy" )
1854 PORT_DIPSETTING( 0x00, "Medium" )
1855 PORT_DIPSETTING( 0x02, "Hard" )
1856 PORT_DIPSETTING( 0x03, "Hardest" )
1857 PORT_DIPNAME( 0x0c, 0x00, DEF_STR( Bonus_Life ) )
1858 PORT_DIPSETTING( 0x04, "150K, every 200K" )
1859 PORT_DIPSETTING( 0x00, "200K, every 300K" )
1860 PORT_DIPSETTING( 0x08, "200K" )
1861 PORT_DIPSETTING( 0x0c, "None" )
1862 PORT_DIPNAME( 0x30, 0x00, DEF_STR( Lives ) )
1863 PORT_DIPSETTING( 0x30, "1" )
1864 PORT_DIPSETTING( 0x20, "2" )
1865 PORT_DIPSETTING( 0x00, "3" )
1866 PORT_DIPSETTING( 0x10, "5" )
1867 PORT_BITX( 0x40, 0x00, IPT_DIPSWITCH_NAME | IPF_CHEAT, "Invulnerability", IP_KEY_NONE, IP_JOY_NONE )
1868 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1869 PORT_DIPSETTING( 0x40, DEF_STR( On ) )
1870 PORT_DIPNAME( 0x80, 0x00, DEF_STR( Unused ) )
1871 PORT_DIPSETTING( 0x00, DEF_STR( Off ) )
1872 PORT_DIPSETTING( 0x80, DEF_STR( On ) )
1873
1874 PORT_START /* (6) Territory Jumper block */
1875 PORT_DIPNAME( 0x07, 0x05, "Territory" )
1876 PORT_DIPSETTING( 0x07, "World (Ryouta Kikaku)" )
1877 PORT_DIPSETTING( 0x00, "Japan (Ryouta Kikaku)" )
1878 PORT_DIPSETTING( 0x02, "World" )
1879 PORT_DIPSETTING( 0x05, "Europe" )
1880 PORT_DIPSETTING( 0x04, "USA" )
1881 PORT_DIPSETTING( 0x01, "Hong Kong (Honest Trading Co." )
1882 PORT_DIPSETTING( 0x06, "Spain & Portugal (APM Electronics SA)" )
1883 // PORT_DIPSETTING( 0x03, "World" )
1884 PORT_BIT( 0xf8, IP_ACTIVE_HIGH, IPT_UNKNOWN )
1885 INPUT_PORTS_END
1886
1887 INPUT_PORTS_START( grindstm )
1888 PORT_START /* (0) VBlank */
1889 PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_VBLANK )
1890 PORT_BIT( 0xfffe, IP_ACTIVE_HIGH, IPT_UNKNOWN )
1891
1892 TOAPLAN2_PLAYER_INPUT( IPF_PLAYER1, IPT_UNKNOWN )
1893
1894 TOAPLAN2_PLAYER_INPUT( IPF_PLAYER2, IPT_UNKNOWN )
1895
1896 TOAPLAN2_SYSTEM_INPUTS
1897
1898 PORT_START /* (4) DSWA */
1899 PORT_DIPNAME( 0x0001, 0x0000, DEF_STR( Cabinet ) )
1900 PORT_DIPSETTING( 0x0000, DEF_STR( Upright ) )
1901 PORT_DIPSETTING( 0x0001, DEF_STR( Cocktail ) )
1902 PORT_DIPNAME( 0x0002, 0x0000, DEF_STR( Flip_Screen ) )
1903 PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
1904 PORT_DIPSETTING( 0x0002, DEF_STR( On ) )
1905 PORT_SERVICE( 0x0004, IP_ACTIVE_HIGH ) /* Service Mode */
1906 PORT_DIPNAME( 0x0008, 0x0000, DEF_STR( Demo_Sounds ) )
1907 PORT_DIPSETTING( 0x0008, DEF_STR( Off ) )
1908 PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
1909 PORT_DIPNAME( 0x0030, 0x0000, DEF_STR( Coin_A ) )
1910 PORT_DIPSETTING( 0x0030, DEF_STR( 4C_1C ) )
1911 PORT_DIPSETTING( 0x0020, DEF_STR( 3C_1C ) )
1912 PORT_DIPSETTING( 0x0010, DEF_STR( 2C_1C ) )
1913 PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) )
1914 PORT_DIPNAME( 0x00c0, 0x0000, DEF_STR( Coin_B ) )
1915 PORT_DIPSETTING( 0x0000, DEF_STR( 1C_2C ) )
1916 PORT_DIPSETTING( 0x0040, DEF_STR( 1C_3C ) )
1917 PORT_DIPSETTING( 0x0080, DEF_STR( 1C_4C ) )
1918 PORT_DIPSETTING( 0x00c0, DEF_STR( 1C_6C ) )
1919 /* Non-European territories coin setups
1920 PORT_DIPNAME( 0x0030, 0x0000, DEF_STR( Coin_A ) )
1921 PORT_DIPSETTING( 0x0020, DEF_STR( 2C_1C ) )
1922 PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) )
1923 PORT_DIPSETTING( 0x0030, DEF_STR( 2C_3C ) )
1924 PORT_DIPSETTING( 0x0010, DEF_STR( 1C_2C ) )
1925 PORT_DIPNAME( 0x00c0, 0x0000, DEF_STR( Coin_B ) )
1926 PORT_DIPSETTING( 0x0080, DEF_STR( 2C_1C ) )
1927 PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) )
1928 PORT_DIPSETTING( 0x00c0, DEF_STR( 2C_3C ) )
1929 PORT_DIPSETTING( 0x0040, DEF_STR( 1C_2C ) )
1930 */
1931 PORT_BIT( 0xff00, IP_ACTIVE_HIGH, IPT_UNKNOWN )
1932
1933 PORT_START /* (5) DSWB */
1934 PORT_DIPNAME( 0x0003, 0x0000, DEF_STR( Difficulty ) )
1935 PORT_DIPSETTING( 0x0001, "Easy" )
1936 PORT_DIPSETTING( 0x0000, "Medium" )
1937 PORT_DIPSETTING( 0x0002, "Hard" )
1938 PORT_DIPSETTING( 0x0003, "Hardest" )
1939 PORT_DIPNAME( 0x000c, 0x0000, DEF_STR( Bonus_Life ) )
1940 PORT_DIPSETTING( 0x0008, "200K" )
1941 PORT_DIPSETTING( 0x0004, "300K, then every 800K" )
1942 PORT_DIPSETTING( 0x0000, "300K, and 800K" )
1943 PORT_DIPSETTING( 0x000c, "None" )
1944 PORT_DIPNAME( 0x0030, 0x0000, DEF_STR( Lives ) )
1945 PORT_DIPSETTING( 0x0030, "1" )
1946 PORT_DIPSETTING( 0x0020, "2" )
1947 PORT_DIPSETTING( 0x0000, "3" )
1948 PORT_DIPSETTING( 0x0010, "5" )
1949 PORT_BITX( 0x0040, 0x0000, IPT_DIPSWITCH_NAME | IPF_CHEAT, "Invulnerability", IP_KEY_NONE, IP_JOY_NONE )
1950 PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
1951 PORT_DIPSETTING( 0x0040, DEF_STR( On ) )
1952 PORT_DIPNAME( 0x0080, 0x0000, "Allow Continue" )
1953 PORT_DIPSETTING( 0x0080, DEF_STR( No ) )
1954 PORT_DIPSETTING( 0x0000, DEF_STR( Yes ) )
1955
1956 PORT_START /* (6) Territory Jumper block */
1957 PORT_DIPNAME( 0x0f, 0x08, "Territory" )
1958 PORT_DIPSETTING( 0x08, "Europe" )
1959 PORT_DIPSETTING( 0x0b, "USA" )
1960 PORT_DIPSETTING( 0x01, "Korea" )
1961 PORT_DIPSETTING( 0x03, "Hong Kong" )
1962 PORT_DIPSETTING( 0x05, "Taiwan" )
1963 PORT_DIPSETTING( 0x07, "South East Asia" )
1964 PORT_DIPSETTING( 0x0a, "USA (American Sammy Corporation License)" )
1965 PORT_DIPSETTING( 0x00, "Korea (Unite Trading License)" )
1966 PORT_DIPSETTING( 0x02, "Hong Kong (Charterfield License)" )
1967 PORT_DIPSETTING( 0x04, "Taiwan (Anomoto International Inc License)" )
1968 PORT_DIPSETTING( 0x06, "South East Asia (Charterfield License)" )
1969 /* Duplicate settings
1970 PORT_DIPSETTING( 0x09, "Europe" )
1971 PORT_DIPSETTING( 0x0d, "USA" )
1972 PORT_DIPSETTING( 0x0e, "Korea" )
1973 PORT_DIPSETTING( 0x0f, "Korea" )
1974 PORT_DIPSETTING( 0x0c, "USA (American Sammy Corporation License)" )
1975 */
1976 PORT_BIT( 0xf0, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* bit 0x10 sound ready */
1977 INPUT_PORTS_END
1978
1979 INPUT_PORTS_START( vfive )
1980 PORT_START /* (0) VBlank */
1981 PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_VBLANK )
1982 PORT_BIT( 0xfffe, IP_ACTIVE_HIGH, IPT_UNKNOWN )
1983
1984 TOAPLAN2_PLAYER_INPUT( IPF_PLAYER1, IPT_UNKNOWN )
1985
1986 TOAPLAN2_PLAYER_INPUT( IPF_PLAYER2, IPT_UNKNOWN )
1987
1988 TOAPLAN2_SYSTEM_INPUTS
1989
1990 PORT_START /* (4) DSWA */
1991 PORT_DIPNAME( 0x0001, 0x0000, DEF_STR( Cabinet ) )
1992 PORT_DIPSETTING( 0x0000, DEF_STR( Upright ) )
1993 PORT_DIPSETTING( 0x0001, DEF_STR( Cocktail ) )
1994 PORT_DIPNAME( 0x0002, 0x0000, DEF_STR( Flip_Screen ) )
1995 PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
1996 PORT_DIPSETTING( 0x0002, DEF_STR( On ) )
1997 PORT_SERVICE( 0x0004, IP_ACTIVE_HIGH ) /* Service Mode */
1998 PORT_DIPNAME( 0x0008, 0x0000, DEF_STR( Demo_Sounds ) )
1999 PORT_DIPSETTING( 0x0008, DEF_STR( Off ) )
2000 PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
2001 PORT_DIPNAME( 0x0030, 0x0000, DEF_STR( Coin_A ) )
2002 PORT_DIPSETTING( 0x0020, DEF_STR( 2C_1C ) )
2003 PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) )
2004 PORT_DIPSETTING( 0x0030, DEF_STR( 2C_3C ) )
2005 PORT_DIPSETTING( 0x0010, DEF_STR( 1C_2C ) )
2006 PORT_DIPNAME( 0x00c0, 0x0000, DEF_STR( Coin_B ) )
2007 PORT_DIPSETTING( 0x0080, DEF_STR( 2C_1C ) )
2008 PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) )
2009 PORT_DIPSETTING( 0x00c0, DEF_STR( 2C_3C ) )
2010 PORT_DIPSETTING( 0x0040, DEF_STR( 1C_2C ) )
2011 PORT_BIT( 0xff00, IP_ACTIVE_HIGH, IPT_UNKNOWN )
2012
2013 PORT_START /* (5) DSWB */
2014 PORT_DIPNAME( 0x0003, 0x0000, DEF_STR( Difficulty ) )
2015 PORT_DIPSETTING( 0x0001, "Easy" )
2016 PORT_DIPSETTING( 0x0000, "Medium" )
2017 PORT_DIPSETTING( 0x0002, "Hard" )
2018 PORT_DIPSETTING( 0x0003, "Hardest" )
2019 PORT_DIPNAME( 0x000c, 0x0000, DEF_STR( Bonus_Life ) )
2020 PORT_DIPSETTING( 0x0004, "300K, then every 800K" )
2021 PORT_DIPSETTING( 0x0000, "300K, and 800K" )
2022 PORT_DIPSETTING( 0x0008, "200K" )
2023 PORT_DIPSETTING( 0x000c, "None" )
2024 PORT_DIPNAME( 0x0030, 0x0000, DEF_STR( Lives ) )
2025 PORT_DIPSETTING( 0x0030, "1" )
2026 PORT_DIPSETTING( 0x0020, "2" )
2027 PORT_DIPSETTING( 0x0000, "3" )
2028 PORT_DIPSETTING( 0x0010, "5" )
2029 PORT_BITX( 0x0040, 0x0000, IPT_DIPSWITCH_NAME | IPF_CHEAT, "Invulnerability", IP_KEY_NONE, IP_JOY_NONE )
2030 PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
2031 PORT_DIPSETTING( 0x0040, DEF_STR( On ) )
2032 PORT_DIPNAME( 0x0080, 0x0000, "Allow Continue" )
2033 PORT_DIPSETTING( 0x0080, DEF_STR( No ) )
2034 PORT_DIPSETTING( 0x0000, DEF_STR( Yes ) )
2035
2036 PORT_START /* (6) Territory Jumper block */
2037 /* Territory is forced to Japan in this set. */
2038 PORT_BIT( 0xff, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* bit 0x10 sound ready */
2039 INPUT_PORTS_END
2040
2041 INPUT_PORTS_START( batsugun )
2042 PORT_START /* (0) VBlank */
2043 PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_VBLANK )
2044 PORT_BIT( 0xfffe, IP_ACTIVE_HIGH, IPT_UNKNOWN )
2045
2046 TOAPLAN2_PLAYER_INPUT( IPF_PLAYER1, IPT_UNKNOWN )
2047
2048 TOAPLAN2_PLAYER_INPUT( IPF_PLAYER2, IPT_UNKNOWN )
2049
2050 TOAPLAN2_SYSTEM_INPUTS
2051
2052 PORT_START /* (4) DSWA */
2053 PORT_DIPNAME( 0x0001, 0x0000, "Continue Mode" )
2054 PORT_DIPSETTING( 0x0000, "Normal" )
2055 PORT_DIPSETTING( 0x0001, "Discount" )
2056 PORT_DIPNAME( 0x0002, 0x0000, DEF_STR( Flip_Screen ) )
2057 PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
2058 PORT_DIPSETTING( 0x0002, DEF_STR( On ) )
2059 PORT_SERVICE( 0x0004, IP_ACTIVE_HIGH ) /* Service Mode */
2060 PORT_DIPNAME( 0x0008, 0x0000, DEF_STR( Demo_Sounds ) )
2061 PORT_DIPSETTING( 0x0008, DEF_STR( Off ) )
2062 PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
2063 PORT_DIPNAME( 0x0030, 0x0000, DEF_STR( Coin_A ) )
2064 PORT_DIPSETTING( 0x0030, DEF_STR( 4C_1C ) )
2065 PORT_DIPSETTING( 0x0020, DEF_STR( 3C_1C ) )
2066 PORT_DIPSETTING( 0x0010, DEF_STR( 2C_1C ) )
2067 PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) )
2068 PORT_DIPNAME( 0x00c0, 0x0000, DEF_STR( Coin_B ) )
2069 PORT_DIPSETTING( 0x0000, DEF_STR( 1C_2C ) )
2070 PORT_DIPSETTING( 0x0040, DEF_STR( 1C_3C ) )
2071 PORT_DIPSETTING( 0x0080, DEF_STR( 1C_4C ) )
2072 PORT_DIPSETTING( 0x00c0, DEF_STR( 1C_6C ) )
2073 /* Non-European territories coin setups
2074 PORT_DIPNAME( 0x0030, 0x0000, DEF_STR( Coin_A ) )
2075 PORT_DIPSETTING( 0x0020, DEF_STR( 2C_1C ) )
2076 PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) )
2077 PORT_DIPSETTING( 0x0030, DEF_STR( 2C_3C ) )
2078 PORT_DIPSETTING( 0x0010, DEF_STR( 1C_2C ) )
2079 PORT_DIPNAME( 0x00c0, 0x0000, DEF_STR( Coin_B ) )
2080 PORT_DIPSETTING( 0x0080, DEF_STR( 2C_1C ) )
2081 PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) )
2082 PORT_DIPSETTING( 0x00c0, DEF_STR( 2C_3C ) )
2083 PORT_DIPSETTING( 0x0040, DEF_STR( 1C_2C ) )
2084 */
2085 PORT_BIT( 0xff00, IP_ACTIVE_HIGH, IPT_UNKNOWN )
2086
2087 PORT_START /* (5) DSWB */
2088 PORT_DIPNAME( 0x0003, 0x0000, DEF_STR( Difficulty ) )
2089 PORT_DIPSETTING( 0x0001, "Easy" )
2090 PORT_DIPSETTING( 0x0000, "Medium" )
2091 PORT_DIPSETTING( 0x0002, "Hard" )
2092 PORT_DIPSETTING( 0x0003, "Hardest" )
2093 PORT_DIPNAME( 0x000c, 0x0000, DEF_STR( Bonus_Life ) )
2094 PORT_DIPSETTING( 0x0004, "500K, then every 600K" )
2095 PORT_DIPSETTING( 0x0000, "1 Million" )
2096 PORT_DIPSETTING( 0x0008, "1.5 Million" )
2097 PORT_DIPSETTING( 0x000c, "None" )
2098 PORT_DIPNAME( 0x0030, 0x0000, DEF_STR( Lives ) )
2099 PORT_DIPSETTING( 0x0030, "1" )
2100 PORT_DIPSETTING( 0x0020, "2" )
2101 PORT_DIPSETTING( 0x0000, "3" )
2102 PORT_DIPSETTING( 0x0010, "5" )
2103 PORT_BITX( 0x0040, 0x0000, IPT_DIPSWITCH_NAME | IPF_CHEAT, "Invulnerability", IP_KEY_NONE, IP_JOY_NONE )
2104 PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
2105 PORT_DIPSETTING( 0x0040, DEF_STR( On ) )
2106 PORT_DIPNAME( 0x0080, 0x0000, "Allow Continue" )
2107 PORT_DIPSETTING( 0x0080, DEF_STR( No ) )
2108 PORT_DIPSETTING( 0x0000, DEF_STR( Yes ) )
2109
2110 PORT_START /* (6) Territory Jumper block */
2111 PORT_DIPNAME( 0x000f, 0x0009, "Territory" )
2112 PORT_DIPSETTING( 0x0009, "Europe" )
2113 PORT_DIPSETTING( 0x000b, "USA" )
2114 PORT_DIPSETTING( 0x000e, "Japan" )
2115 // PORT_DIPSETTING( 0x000f, "Japan" )
2116 PORT_DIPSETTING( 0x0001, "Korea" )
2117 PORT_DIPSETTING( 0x0003, "Hong Kong" )
2118 PORT_DIPSETTING( 0x0005, "Taiwan" )
2119 PORT_DIPSETTING( 0x0007, "South East Asia" )
2120 PORT_DIPSETTING( 0x0008, "Europe (Taito Corp License)" )
2121 PORT_DIPSETTING( 0x000a, "USA (Taito Corp License)" )
2122 PORT_DIPSETTING( 0x000c, "Japan (Taito Corp License)" )
2123 // PORT_DIPSETTING( 0x000d, "Japan (Taito Corp License)" )
2124 PORT_DIPSETTING( 0x0000, "Korea (Unite Trading License)" )
2125 PORT_DIPSETTING( 0x0002, "Hong Kong (Taito Corp License)" )
2126 PORT_DIPSETTING( 0x0004, "Taiwan (Taito Corp License)" )
2127 PORT_DIPSETTING( 0x0006, "South East Asia (Taito Corp License)" )
2128 PORT_BIT( 0xfff0, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* bit 0x10 sound ready */
2129 INPUT_PORTS_END
2130
2131 INPUT_PORTS_START( snowbro2 )
2132 PORT_START /* (0) VBlank */
2133 PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_VBLANK )
2134 PORT_BIT( 0xfffe, IP_ACTIVE_HIGH, IPT_UNKNOWN )
2135
2136 TOAPLAN2_PLAYER_INPUT( IPF_PLAYER1, IPT_UNKNOWN )
2137
2138 TOAPLAN2_PLAYER_INPUT( IPF_PLAYER2, IPT_UNKNOWN )
2139
2140 TOAPLAN2_PLAYER_INPUT( IPF_PLAYER3, IPT_START3 )
2141
2142 TOAPLAN2_PLAYER_INPUT( IPF_PLAYER4, IPT_START4 )
2143
2144 TOAPLAN2_SYSTEM_INPUTS
2145
2146 PORT_START /* (6) DSWA */
2147 PORT_DIPNAME( 0x0001, 0x0000, "Continue Mode" )
2148 PORT_DIPSETTING( 0x0000, "Normal" )
2149 PORT_DIPSETTING( 0x0001, "Discount" )
2150 PORT_DIPNAME( 0x0002, 0x0000, DEF_STR( Flip_Screen ) )
2151 PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
2152 PORT_DIPSETTING( 0x0002, DEF_STR( On ) )
2153 PORT_SERVICE( 0x0004, IP_ACTIVE_HIGH ) /* Service Mode */
2154 PORT_DIPNAME( 0x0008, 0x0000, DEF_STR( Demo_Sounds ) )
2155 PORT_DIPSETTING( 0x0008, DEF_STR( Off ) )
2156 PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
2157 PORT_DIPNAME( 0x0030, 0x0000, DEF_STR( Coin_A ) )
2158 PORT_DIPSETTING( 0x0020, DEF_STR( 2C_1C ) )
2159 PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) )
2160 PORT_DIPSETTING( 0x0030, DEF_STR( 2C_3C ) )
2161 PORT_DIPSETTING( 0x0010, DEF_STR( 1C_2C ) )
2162 PORT_DIPNAME( 0x00c0, 0x0000, DEF_STR( Coin_B ) )
2163 PORT_DIPSETTING( 0x0080, DEF_STR( 2C_1C ) )
2164 PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) )
2165 PORT_DIPSETTING( 0x00c0, DEF_STR( 2C_3C ) )
2166 PORT_DIPSETTING( 0x0040, DEF_STR( 1C_2C ) )
2167 /* The following are listed in service mode for European territory,
2168 but are not actually used in game play.
2169 PORT_DIPNAME( 0x0030, 0x0000, DEF_STR( Coin_A ) )
2170 PORT_DIPSETTING( 0x0030, DEF_STR( 4C_1C ) )
2171 PORT_DIPSETTING( 0x0020, DEF_STR( 3C_1C ) )
2172 PORT_DIPSETTING( 0x0010, DEF_STR( 2C_1C ) )
2173 PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) )
2174 PORT_DIPNAME( 0x00c0, 0x0000, DEF_STR( Coin_B ) )
2175 PORT_DIPSETTING( 0x0000, DEF_STR( 1C_2C ) )
2176 PORT_DIPSETTING( 0x0040, DEF_STR( 1C_3C ) )
2177 PORT_DIPSETTING( 0x0080, DEF_STR( 1C_4C ) )
2178 PORT_DIPSETTING( 0x00c0, DEF_STR( 1C_6C ) )
2179 */
2180 PORT_BIT( 0xff00, IP_ACTIVE_HIGH, IPT_UNKNOWN )
2181
2182 PORT_START /* (7) DSWB */
2183 PORT_DIPNAME( 0x0003, 0x0000, DEF_STR( Difficulty ) )
2184 PORT_DIPSETTING( 0x0001, "Easy" )
2185 PORT_DIPSETTING( 0x0000, "Medium" )
2186 PORT_DIPSETTING( 0x0002, "Hard" )
2187 PORT_DIPSETTING( 0x0003, "Hardest" )
2188 PORT_DIPNAME( 0x000c, 0x0000, DEF_STR( Bonus_Life ) )
2189 PORT_DIPSETTING( 0x0004, "100K, every 500K" )
2190 PORT_DIPSETTING( 0x0000, "100K" )
2191 PORT_DIPSETTING( 0x0008, "200K" )
2192 PORT_DIPSETTING( 0x000c, "None" )
2193 PORT_DIPNAME( 0x0030, 0x0000, DEF_STR( Lives ) )
2194 PORT_DIPSETTING( 0x0030, "1" )
2195 PORT_DIPSETTING( 0x0020, "2" )
2196 PORT_DIPSETTING( 0x0000, "3" )
2197 PORT_DIPSETTING( 0x0010, "4" )
2198 PORT_BITX( 0x0040, 0x0000, IPT_DIPSWITCH_NAME | IPF_CHEAT, "Invulnerability", IP_KEY_NONE, IP_JOY_NONE )
2199 PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
2200 PORT_DIPSETTING( 0x0040, DEF_STR( On ) )
2201 PORT_DIPNAME( 0x0080, 0x0000, "Maximum Players" )
2202 PORT_DIPSETTING( 0x0080, "2" )
2203 PORT_DIPSETTING( 0x0000, "4" )
2204 PORT_BIT( 0xff00, IP_ACTIVE_HIGH, IPT_UNKNOWN )
2205
2206 PORT_START /* (8) Territory Jumper block */
2207 PORT_DIPNAME( 0x1c00, 0x0800, "Territory" )
2208 PORT_DIPSETTING( 0x0800, "Europe" )
2209 PORT_DIPSETTING( 0x0400, "USA" )
2210 PORT_DIPSETTING( 0x0000, "Japan" )
2211 PORT_DIPSETTING( 0x0c00, "Korea" )
2212 PORT_DIPSETTING( 0x1000, "Hong Kong" )
2213 PORT_DIPSETTING( 0x1400, "Taiwan" )
2214 PORT_DIPSETTING( 0x1800, "South East Asia" )
2215 PORT_DIPSETTING( 0x1c00, DEF_STR( Unused ) )
2216 PORT_DIPNAME( 0x2000, 0x0000, "Show All Rights Reserved" )
2217 PORT_DIPSETTING( 0x0000, DEF_STR( No ) )
2218 PORT_DIPSETTING( 0x2000, DEF_STR( Yes ) )
2219 PORT_BIT( 0xc3ff, IP_ACTIVE_HIGH, IPT_UNKNOWN )
2220 INPUT_PORTS_END
2221
2222 INPUT_PORTS_START( mahoudai )
2223 PORT_START /* (0) VBlank */
2224 PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_VBLANK )
2225 PORT_BIT( 0xfffe, IP_ACTIVE_HIGH, IPT_UNKNOWN )
2226
2227 TOAPLAN2_PLAYER_INPUT( IPF_PLAYER1, IPT_UNKNOWN )
2228
2229 TOAPLAN2_PLAYER_INPUT( IPF_PLAYER2, IPT_UNKNOWN )
2230
2231 TOAPLAN2_SYSTEM_INPUTS
2232
2233 PORT_START /* (4) DSWA */
2234 PORT_DIPNAME( 0x0001, 0x0000, DEF_STR( Free_Play ) )
2235 PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
2236 PORT_DIPSETTING( 0x0001, DEF_STR( On ) )
2237 PORT_DIPNAME( 0x0002, 0x0000, DEF_STR( Flip_Screen ) )
2238 PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
2239 PORT_DIPSETTING( 0x0002, DEF_STR( On ) )
2240 PORT_SERVICE( 0x0004, IP_ACTIVE_HIGH ) /* Service Mode */
2241 PORT_DIPNAME( 0x0008, 0x0000, DEF_STR( Demo_Sounds ) )
2242 PORT_DIPSETTING( 0x0008, DEF_STR( Off ) )
2243 PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
2244 PORT_DIPNAME( 0x0030, 0x0000, DEF_STR( Coin_A ) )
2245 PORT_DIPSETTING( 0x0020, DEF_STR( 2C_1C ) )
2246 PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) )
2247 PORT_DIPSETTING( 0x0030, DEF_STR( 2C_3C ) )
2248 PORT_DIPSETTING( 0x0010, DEF_STR( 1C_2C ) )
2249 PORT_DIPNAME( 0x00c0, 0x0000, DEF_STR( Coin_B ) )
2250 PORT_DIPSETTING( 0x0080, DEF_STR( 2C_1C ) )
2251 PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) )
2252 PORT_DIPSETTING( 0x00c0, DEF_STR( 2C_3C ) )
2253 PORT_DIPSETTING( 0x0040, DEF_STR( 1C_2C ) )
2254 PORT_BIT( 0xff00, IP_ACTIVE_HIGH, IPT_UNKNOWN )
2255
2256 PORT_START /* (5) DSWB */
2257 PORT_DIPNAME( 0x0003, 0x0000, DEF_STR( Difficulty ) )
2258 PORT_DIPSETTING( 0x0001, "Easy" )
2259 PORT_DIPSETTING( 0x0000, "Medium" )
2260 PORT_DIPSETTING( 0x0002, "Hard" )
2261 PORT_DIPSETTING( 0x0003, "Hardest" )
2262 PORT_DIPNAME( 0x000c, 0x0000, DEF_STR( Bonus_Life ) )
2263 PORT_DIPSETTING( 0x0004, "200K, 500K" )
2264 PORT_DIPSETTING( 0x0000, "every 300K" )
2265 PORT_DIPSETTING( 0x0008, "200K" )
2266 PORT_DIPSETTING( 0x000c, "None" )
2267 PORT_DIPNAME( 0x0030, 0x0000, DEF_STR( Lives ) )
2268 PORT_DIPSETTING( 0x0030, "1" )
2269 PORT_DIPSETTING( 0x0020, "2" )
2270 PORT_DIPSETTING( 0x0000, "3" )
2271 PORT_DIPSETTING( 0x0010, "5" )
2272 PORT_BITX( 0x0040, 0x0000, IPT_DIPSWITCH_NAME | IPF_CHEAT, "Invulnerability", IP_KEY_NONE, IP_JOY_NONE )
2273 PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
2274 PORT_DIPSETTING( 0x0040, DEF_STR( On ) )
2275 PORT_DIPNAME( 0x0080, 0x0000, "Allow Continue" )
2276 PORT_DIPSETTING( 0x0080, DEF_STR( No ) )
2277 PORT_DIPSETTING( 0x0000, DEF_STR( Yes ) )
2278
2279 PORT_START /* (6) Territory Jumper block */
2280 PORT_BIT( 0xffff, IP_ACTIVE_HIGH, IPT_UNKNOWN ) /* not used, it seems */
2281 INPUT_PORTS_END
2282
2283 INPUT_PORTS_START( shippumd )
2284 PORT_START /* (0) VBlank */
2285 PORT_BIT( 0x0001, IP_ACTIVE_HIGH, IPT_VBLANK )
2286 PORT_BIT( 0xfffe, IP_ACTIVE_HIGH, IPT_UNKNOWN )
2287
2288 TOAPLAN2_PLAYER_INPUT( IPF_PLAYER1, IPT_UNKNOWN )
2289
2290 TOAPLAN2_PLAYER_INPUT( IPF_PLAYER2, IPT_UNKNOWN )
2291
2292 TOAPLAN2_SYSTEM_INPUTS
2293
2294 PORT_START /* (4) DSWA */
2295 PORT_DIPNAME( 0x0001, 0x0000, DEF_STR( Free_Play ) )
2296 PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
2297 PORT_DIPSETTING( 0x0001, DEF_STR( On ) )
2298 PORT_DIPNAME( 0x0002, 0x0000, DEF_STR( Flip_Screen ) )
2299 PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
2300 PORT_DIPSETTING( 0x0002, DEF_STR( On ) )
2301 PORT_SERVICE( 0x0004, IP_ACTIVE_HIGH ) /* Service Mode */
2302 PORT_DIPNAME( 0x0008, 0x0000, DEF_STR( Demo_Sounds ) )
2303 PORT_DIPSETTING( 0x0008, DEF_STR( Off ) )
2304 PORT_DIPSETTING( 0x0000, DEF_STR( On ) )
2305 PORT_DIPNAME( 0x0030, 0x0000, DEF_STR( Coin_A ) )
2306 PORT_DIPSETTING( 0x0020, DEF_STR( 2C_1C ) )
2307 PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) )
2308 PORT_DIPSETTING( 0x0030, DEF_STR( 2C_3C ) )
2309 PORT_DIPSETTING( 0x0010, DEF_STR( 1C_2C ) )
2310 PORT_DIPNAME( 0x00c0, 0x0000, DEF_STR( Coin_B ) )
2311 PORT_DIPSETTING( 0x0080, DEF_STR( 2C_1C ) )
2312 PORT_DIPSETTING( 0x0000, DEF_STR( 1C_1C ) )
2313 PORT_DIPSETTING( 0x00c0, DEF_STR( 2C_3C ) )
2314 PORT_DIPSETTING( 0x0040, DEF_STR( 1C_2C ) )
2315 PORT_BIT( 0xff00, IP_ACTIVE_HIGH, IPT_UNKNOWN )
2316
2317 PORT_START /* (5) DSWB */
2318 PORT_DIPNAME( 0x0003, 0x0000, DEF_STR( Difficulty ) )
2319 PORT_DIPSETTING( 0x0001, "Easy" )
2320 PORT_DIPSETTING( 0x0000, "Medium" )
2321 PORT_DIPSETTING( 0x0002, "Hard" )
2322 PORT_DIPSETTING( 0x0003, "Hardest" )
2323 PORT_DIPNAME( 0x000c, 0x0000, DEF_STR( Bonus_Life ) )
2324 PORT_DIPSETTING( 0x0004, "200K, 500K" )
2325 PORT_DIPSETTING( 0x0000, "every 300K" )
2326 PORT_DIPSETTING( 0x0008, "200K" )
2327 PORT_DIPSETTING( 0x000c, "None" )
2328 PORT_DIPNAME( 0x0030, 0x0000, DEF_STR( Lives ) )
2329 PORT_DIPSETTING( 0x0030, "1" )
2330 PORT_DIPSETTING( 0x0020, "2" )
2331 PORT_DIPSETTING( 0x0000, "3" )
2332 PORT_DIPSETTING( 0x0010, "5" )
2333 PORT_BITX( 0x0040, 0x0000, IPT_DIPSWITCH_NAME | IPF_CHEAT, "Invulnerability", IP_KEY_NONE, IP_JOY_NONE )
2334 PORT_DIPSETTING( 0x0000, DEF_STR( Off ) )
2335 PORT_DIPSETTING( 0x0040, DEF_STR( On ) )
2336 PORT_DIPNAME( 0x0080, 0x0000, "Allow Continue" )
2337 PORT_DIPSETTING( 0x0080, DEF_STR( No ) )
2338 PORT_DIPSETTING( 0x0000, DEF_STR( Yes ) )
2339
2340 PORT_START /* (6) Territory Jumper block */
2341 /* title screen is wrong when set to other countries */
2342 PORT_DIPNAME( 0x000e, 0x0000, "Territory" )
2343 PORT_DIPSETTING( 0x0004, "Europe" )
2344 PORT_DIPSETTING( 0x0002, "USA" )
2345 PORT_DIPSETTING( 0x0000, "Japan" )
2346 PORT_DIPSETTING( 0x0006, "South East Asia" )
2347 PORT_DIPSETTING( 0x0008, "China" )
2348 PORT_DIPSETTING( 0x000a, "Korea" )
2349 PORT_DIPSETTING( 0x000c, "Hong Kong" )
2350 PORT_DIPSETTING( 0x000e, "Taiwan" )
2351 PORT_BIT( 0xfff1, IP_ACTIVE_HIGH, IPT_UNKNOWN )
2352 INPUT_PORTS_END
2353
2354
2355
2356 static struct GfxLayout tilelayout =
2357 {
2358 16,16, /* 16x16 */
2359 RGN_FRAC(1,2), /* Number of tiles */
2360 4, /* 4 bits per pixel */
2361 { RGN_FRAC(1,2)+8, RGN_FRAC(1,2), 8, 0 },
2362 { 0, 1, 2, 3, 4, 5, 6, 7,
2363 8*16+0, 8*16+1, 8*16+2, 8*16+3, 8*16+4, 8*16+5, 8*16+6, 8*16+7 },
2364 { 0*16, 1*16, 2*16, 3*16, 4*16, 5*16, 6*16, 7*16,
2365 16*16, 17*16, 18*16, 19*16, 20*16, 21*16, 22*16, 23*16 },
2366 8*4*16
2367 };
2368
2369 static struct GfxLayout spritelayout =
2370 {
2371 8,8, /* 8x8 */
2372 RGN_FRAC(1,2), /* Number of 8x8 sprites */
2373 4, /* 4 bits per pixel */
2374 { RGN_FRAC(1,2)+8, RGN_FRAC(1,2), 8, 0 },
2375 { 0, 1, 2, 3, 4, 5, 6, 7 },
2376 { 0*16, 1*16, 2*16, 3*16, 4*16, 5*16, 6*16, 7*16 },
2377 8*16
2378 };
2379
2380 #ifdef MSB_FIRST
2381 static struct GfxLayout tatsujn2_textlayout =
2382 {
2383 8,8, /* 8x8 characters */
2384 1024, /* 1024 characters */
2385 4, /* 4 bits per pixel */
2386 { 0, 1, 2, 3 },
2387 { 0, 4, 8, 12, 16, 20, 24, 28 },
2388 { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 },
2389 8*32
2390 };
2391 #else
2392 static struct GfxLayout tatsujn2_textlayout =
2393 {
2394 8,8, /* 8x8 characters */
2395 1024, /* 1024 characters */
2396 4, /* 4 bits per pixel */
2397 { 0, 1, 2, 3 },
2398 { 8, 12, 0, 4, 24, 28, 16, 20 },
2399 { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 },
2400 8*32
2401 };
2402 #endif
2403
2404
2405 static struct GfxLayout raizing_textlayout =
2406 {
2407 8,8, /* 8x8 characters */
2408 1024, /* 1024 characters */
2409 4, /* 4 bits per pixel */
2410 { 0, 1, 2, 3 },
2411 { 0, 4, 8, 12, 16, 20, 24, 28 },
2412 { 0*32, 1*32, 2*32, 3*32, 4*32, 5*32, 6*32, 7*32 },
2413 8*32
2414 };
2415
2416
2417 static struct GfxDecodeInfo gfxdecodeinfo[] =
2418 {
2419 { REGION_GFX1, 0, &tilelayout, 0, 128 },
2420 { REGION_GFX1, 0, &spritelayout, 0, 64 },
2421 { -1 } /* end of array */
2422 };
2423
2424 static struct GfxDecodeInfo gfxdecodeinfo_2[] =
2425 {
2426 { REGION_GFX1, 0, &tilelayout, 0, 128 },
2427 { REGION_GFX1, 0, &spritelayout, 0, 64 },
2428 { REGION_GFX2, 0, &tilelayout, 0, 128 },
2429 { REGION_GFX2, 0, &spritelayout, 0, 64 },
2430 { -1 } /* end of array */
2431 };
2432
2433 /* Added by Yochizo 2000/08/19 */
2434 static struct GfxDecodeInfo tatsujn2_gfxdecodeinfo[] =
2435 {
2436 { REGION_GFX1, 0, &tilelayout, 0, 128 },
2437 { REGION_GFX1, 0, &spritelayout, 0, 64 },
2438 /* Tatsujin2 have extra-text tile data in CPU rom */
2439 { REGION_CPU1, 0x40000, &tatsujn2_textlayout, 0, 128 },
2440 { -1 } /* end of array */
2441 };
2442
2443 static struct GfxDecodeInfo raizing_gfxdecodeinfo[] =
2444 {
2445 { REGION_GFX1, 0, &tilelayout, 0, 128 },
2446 { REGION_GFX1, 0, &spritelayout, 0, 64 },
2447 { REGION_GFX2, 0, &raizing_textlayout, 0, 128 }, /* Extra-text layer */
2448 { -1 } /* end of array */
2449 };
2450
2451 // Not used yet
2452 //static struct GfxDecodeInfo raizing_gfxdecodeinfo_2[] =
2453 //{
2454 // { REGION_GFX1, 0, &tilelayout, 0, 128 },
2455 // { REGION_GFX1, 0, &spritelayout, 0, 64 },
2456 // { REGION_GFX2, 0, &tilelayout, 0, 128 },
2457 // { REGION_GFX2, 0, &spritelayout, 0, 64 },
2458 // { REGION_GFX3, 0, &textlayout, 0, 128 }, /* Extra-text layer */
2459 // { -1 } /* end of array */
2460 //};
2461
2462
irqhandler(int linestate)2463 static void irqhandler(int linestate)
2464 {
2465 cpu_set_irq_line(1,0,linestate);
2466 }
2467
2468 static struct YM3812interface ym3812_interface =
2469 {
2470 1, /* 1 chip */
2471 27000000/8, /* 3.375MHz , 27MHz Oscillator */
2472 { 100 }, /* volume */
2473 { irqhandler },
2474 };
2475
2476 static struct YM2151interface ym2151_interface =
2477 {
2478 1, /* 1 chip */
2479 27000000/8, /* 3.375MHz , 27MHz Oscillator */
2480 { YM3012_VOL(45,MIXER_PAN_LEFT,45,MIXER_PAN_RIGHT) },
2481 { 0 }
2482 };
2483
2484 static struct OKIM6295interface okim6295_interface =
2485 {
2486 1, /* 1 chip */
2487 { 22050 }, /* frequency (Hz). M6295 has 1MHz on its clock input */
2488 { REGION_SOUND1 }, /* memory region */
2489 { 47 }
2490 };
2491
2492 /* Added by Yochizo */
2493 /* This is M6295 interface for Raizing games. Raizing games use lower sampling */
2494 /* frequency probably but I don't know real number. */
2495 static struct OKIM6295interface okim6295_raizing_interface =
2496 {
2497 1, /* 1 chip */
2498 { 11025 }, /* frequency (Hz). M6295 has 1MHz on its clock input */
2499 { REGION_SOUND1 }, /* memory region */
2500 { 47 }
2501 };
2502
2503
2504 static struct MachineDriver machine_driver_tekipaki =
2505 {
2506 /* basic machine hardware */
2507 {
2508 {
2509 CPU_M68000,
2510 10000000, /* 10MHz Oscillator */
2511 tekipaki_readmem,tekipaki_writemem,0,0,
2512 toaplan2_interrupt,1
2513 },
2514 #if HD64x180
2515 {
2516 CPU_Z80, /* HD647180 CPU actually */
2517 10000000, /* 10MHz Oscillator */
2518 hd647180_readmem,hd647180_writemem,0,0,
2519 ignore_interrupt,0
2520 }
2521 #endif
2522 },
2523 60, DEFAULT_REAL_60HZ_VBLANK_DURATION, /* frames per second, vblank duration */
2524 1,
2525 init_toaplan2,
2526
2527 /* video hardware */
2528 32*16, 32*16, { 0, 319, 0, 239 },
2529 gfxdecodeinfo,
2530 (64*16)+(64*16), (64*16)+(64*16),
2531 0,
2532
2533 VIDEO_TYPE_RASTER | VIDEO_MODIFIES_PALETTE | VIDEO_UPDATE_BEFORE_VBLANK, /* Sprites are buffered too */
2534 toaplan2_0_eof_callback,
2535 toaplan2_0_vh_start,
2536 toaplan2_0_vh_stop,
2537 toaplan2_0_vh_screenrefresh,
2538
2539 /* sound hardware */
2540 0,0,0,0,
2541 {
2542 {
2543 SOUND_YM3812,
2544 &ym3812_interface
2545 },
2546 }
2547 };
2548
2549 static struct MachineDriver machine_driver_ghox =
2550 {
2551 /* basic machine hardware */
2552 {
2553 {
2554 CPU_M68000,
2555 10000000, /* 10MHz Oscillator */
2556 ghox_readmem,ghox_writemem,0,0,
2557 toaplan2_interrupt,1
2558 },
2559 #if HD64x180
2560 {
2561 CPU_Z80, /* HD647180 CPU actually */
2562 10000000, /* 10MHz Oscillator */
2563 hd647180_readmem,hd647180_writemem,0,0,
2564 ignore_interrupt,0
2565 }
2566 #endif
2567 },
2568 60, DEFAULT_REAL_60HZ_VBLANK_DURATION, /* frames per second, vblank duration */
2569 1,
2570 init_toaplan2,
2571
2572 /* video hardware */
2573 32*16, 32*16, { 0, 319, 0, 239 },
2574 gfxdecodeinfo,
2575 (64*16)+(64*16), (64*16)+(64*16),
2576 0,
2577
2578 VIDEO_TYPE_RASTER | VIDEO_MODIFIES_PALETTE | VIDEO_UPDATE_BEFORE_VBLANK, /* Sprites are buffered too */
2579 toaplan2_0_eof_callback,
2580 toaplan2_0_vh_start,
2581 toaplan2_0_vh_stop,
2582 toaplan2_0_vh_screenrefresh,
2583
2584 /* sound hardware */
2585 SOUND_SUPPORTS_STEREO,0,0,0,
2586 {
2587 {
2588 SOUND_YM2151,
2589 &ym2151_interface
2590 }
2591 }
2592 };
2593
2594 static struct MachineDriver machine_driver_dogyuun =
2595 {
2596 /* basic machine hardware */
2597 {
2598 {
2599 CPU_M68000,
2600 16000000, /* 16MHz Oscillator */
2601 dogyuun_readmem,dogyuun_writemem,0,0,
2602 toaplan2_interrupt,1
2603 },
2604 #if Zx80
2605 {
2606 CPU_Z80, /* Z?80 type Toaplan marked CPU ??? */
2607 16000000, /* 16MHz Oscillator */
2608 Zx80_readmem,Zx80_writemem,0,0,
2609 ignore_interrupt,0
2610 }
2611 #endif
2612 },
2613 60, DEFAULT_REAL_60HZ_VBLANK_DURATION, /* frames per second, vblank duration */
2614 1,
2615 init_toaplan3,
2616
2617 /* video hardware */
2618 32*16, 32*16, { 0, 319, 0, 239 },
2619 gfxdecodeinfo_2,
2620 (64*16)+(64*16), (64*16)+(64*16),
2621 0,
2622
2623 VIDEO_TYPE_RASTER | VIDEO_MODIFIES_PALETTE | VIDEO_UPDATE_BEFORE_VBLANK, /* Sprites are buffered too */
2624 toaplan2_1_eof_callback,
2625 toaplan2_1_vh_start,
2626 toaplan2_1_vh_stop,
2627 toaplan2_1_vh_screenrefresh,
2628
2629 /* sound hardware */
2630 SOUND_SUPPORTS_STEREO,0,0,0,
2631 {
2632 {
2633 SOUND_YM2151,
2634 &ym2151_interface
2635 },
2636 {
2637 SOUND_OKIM6295,
2638 &okim6295_interface
2639 }
2640 }
2641 };
2642
2643 static struct MachineDriver machine_driver_kbash =
2644 {
2645 /* basic machine hardware */
2646 {
2647 {
2648 CPU_M68000,
2649 16000000, /* 16MHz Oscillator */
2650 kbash_readmem,kbash_writemem,0,0,
2651 toaplan2_interrupt,1
2652 },
2653 #if Zx80
2654 {
2655 CPU_Z80, /* Z?80 type Toaplan marked CPU ??? */
2656 16000000, /* 16MHz Oscillator */
2657 Zx80_readmem,Zx80_writemem,0,0,
2658 ignore_interrupt,0
2659 }
2660 #endif
2661 },
2662 60, DEFAULT_REAL_60HZ_VBLANK_DURATION, /* frames per second, vblank duration */
2663 1,
2664 init_toaplan2,
2665
2666 /* video hardware */
2667 32*16, 32*16, { 0, 319, 0, 239 },
2668 gfxdecodeinfo,
2669 (64*16)+(64*16), (64*16)+(64*16),
2670 0,
2671
2672 VIDEO_TYPE_RASTER | VIDEO_MODIFIES_PALETTE | VIDEO_UPDATE_BEFORE_VBLANK, /* Sprites are buffered too */
2673 toaplan2_0_eof_callback,
2674 toaplan2_0_vh_start,
2675 toaplan2_0_vh_stop,
2676 toaplan2_0_vh_screenrefresh,
2677
2678 /* sound hardware */
2679 SOUND_SUPPORTS_STEREO,0,0,0,
2680 {
2681 {
2682 SOUND_YM2151,
2683 &ym2151_interface
2684 },
2685 {
2686 SOUND_OKIM6295,
2687 &okim6295_interface
2688 }
2689 }
2690 };
2691
2692 /* Fixed by Yochizo 2000/08/16 */
2693 static struct MachineDriver machine_driver_tatsujn2 =
2694 {
2695 /* basic machine hardware */
2696 {
2697 {
2698 CPU_M68000,
2699 16000000, /* 16MHz Oscillator */
2700 tatsujn2_readmem,tatsujn2_writemem,0,0,
2701 tatsujn2_interrupt,1
2702 },
2703 #if Zx80
2704 {
2705 CPU_Z80, /* Z?80 type Toaplan marked CPU ??? */
2706 16000000, /* 16MHz Oscillator */
2707 Zx80_readmem,Zx80_writemem,0,0,
2708 ignore_interrupt,0
2709 }
2710 #endif
2711 },
2712 60, DEFAULT_REAL_60HZ_VBLANK_DURATION, /* frames per second, vblank duration */
2713 1,
2714 init_tatsujn2,
2715
2716 /* video hardware */
2717 32*16, 32*16, { 0, 319, 0, 239 },
2718 tatsujn2_gfxdecodeinfo,
2719 (64*16)+(64*16), (64*16)+(64*16),
2720 0,
2721
2722 VIDEO_TYPE_RASTER | VIDEO_MODIFIES_PALETTE | VIDEO_UPDATE_BEFORE_VBLANK, /* Sprites are buffered too */
2723 toaplan2_0_eof_callback,
2724 raizing_0_vh_start,
2725 toaplan2_0_vh_stop,
2726 raizing_0_vh_screenrefresh,
2727
2728 /* sound hardware */
2729 SOUND_SUPPORTS_STEREO,0,0,0,
2730 {
2731 {
2732 SOUND_YM2151,
2733 &ym2151_interface
2734 },
2735 {
2736 SOUND_OKIM6295,
2737 &okim6295_interface
2738 }
2739 }
2740 };
2741
2742 static struct MachineDriver machine_driver_pipibibs =
2743 {
2744 /* basic machine hardware */
2745 {
2746 {
2747 CPU_M68000,
2748 10000000, /* 10MHz Oscillator */
2749 pipibibs_readmem,pipibibs_writemem,0,0,
2750 toaplan2_interrupt,1
2751 },
2752 {
2753 CPU_Z80,
2754 27000000/8, /* ??? 3.37MHz , 27MHz Oscillator */
2755 sound_readmem,sound_writemem,0,0,
2756 ignore_interrupt,0
2757 }
2758 },
2759 60, DEFAULT_REAL_60HZ_VBLANK_DURATION, /* frames per second, vblank duration */
2760 10,
2761 init_pipibibs,
2762
2763 /* video hardware */
2764 32*16, 32*16, { 0, 319, 0, 239 },
2765 gfxdecodeinfo,
2766 (128*16), (128*16),
2767 0,
2768
2769 VIDEO_TYPE_RASTER | VIDEO_MODIFIES_PALETTE | VIDEO_UPDATE_BEFORE_VBLANK, /* Sprites are buffered too */
2770 toaplan2_0_eof_callback,
2771 toaplan2_0_vh_start,
2772 toaplan2_0_vh_stop,
2773 toaplan2_0_vh_screenrefresh,
2774
2775 /* sound hardware */
2776 0,0,0,0,
2777 {
2778 {
2779 SOUND_YM3812,
2780 &ym3812_interface
2781 },
2782 }
2783 };
2784
2785 static struct MachineDriver machine_driver_whoopee =
2786 {
2787 /* basic machine hardware */
2788 {
2789 {
2790 CPU_M68000,
2791 10000000, /* 10MHz Oscillator */
2792 tekipaki_readmem,tekipaki_writemem,0,0,
2793 toaplan2_interrupt,1
2794 },
2795 {
2796 CPU_Z80, /* This should be a HD647180 */
2797 27000000/8, /* Change this to 10MHz when HD647180 gets dumped. 10MHz Oscillator */
2798 sound_readmem,sound_writemem,0,0,
2799 ignore_interrupt,0
2800 }
2801 },
2802 60, DEFAULT_REAL_60HZ_VBLANK_DURATION, /* frames per second, vblank duration */
2803 10,
2804 init_pipibibs,
2805
2806 /* video hardware */
2807 32*16, 32*16, { 0, 319, 0, 239 },
2808 gfxdecodeinfo,
2809 (128*16), (128*16),
2810 0,
2811
2812 VIDEO_TYPE_RASTER | VIDEO_MODIFIES_PALETTE | VIDEO_UPDATE_BEFORE_VBLANK, /* Sprites are buffered too */
2813 toaplan2_0_eof_callback,
2814 toaplan2_0_vh_start,
2815 toaplan2_0_vh_stop,
2816 toaplan2_0_vh_screenrefresh,
2817
2818 /* sound hardware */
2819 0,0,0,0,
2820 {
2821 {
2822 SOUND_YM3812,
2823 &ym3812_interface
2824 },
2825 }
2826 };
2827
2828 static struct MachineDriver machine_driver_pipibibi =
2829 {
2830 /* basic machine hardware */
2831 {
2832 {
2833 CPU_M68000,
2834 10000000, /* 10MHz Oscillator */
2835 pipibibi_readmem,pipibibi_writemem,0,0,
2836 toaplan2_interrupt,1
2837 },
2838 {
2839 CPU_Z80,
2840 27000000/8, /* ??? 3.37MHz */
2841 sound_readmem,sound_writemem,0,0,
2842 ignore_interrupt,0
2843 }
2844 },
2845 60, DEFAULT_REAL_60HZ_VBLANK_DURATION, /* frames per second, vblank duration */
2846 10,
2847 init_pipibibs,
2848
2849 /* video hardware */
2850 32*16, 32*16, { 0, 319, 0, 239 },
2851 gfxdecodeinfo,
2852 (128*16), (128*16),
2853 0,
2854
2855 VIDEO_TYPE_RASTER | VIDEO_MODIFIES_PALETTE | VIDEO_UPDATE_BEFORE_VBLANK, /* Sprites are buffered too */
2856 toaplan2_0_eof_callback,
2857 toaplan2_0_vh_start,
2858 toaplan2_0_vh_stop,
2859 toaplan2_0_vh_screenrefresh,
2860
2861 /* sound hardware */
2862 0,0,0,0,
2863 {
2864 {
2865 SOUND_YM3812,
2866 &ym3812_interface
2867 },
2868 }
2869 };
2870
2871 static struct MachineDriver machine_driver_fixeight =
2872 {
2873 /* basic machine hardware */
2874 {
2875 {
2876 CPU_M68000,
2877 16000000, /* 16MHz Oscillator */
2878 fixeight_readmem,fixeight_writemem,0,0,
2879 toaplan2_interrupt,1
2880 },
2881 #if Zx80
2882 {
2883 CPU_Z80, /* Z?80 type Toaplan marked CPU ??? */
2884 16000000, /* 16MHz Oscillator */
2885 Zx80_readmem,Zx80_writemem,0,0,
2886 ignore_interrupt,0
2887 }
2888 #endif
2889 },
2890 60, DEFAULT_REAL_60HZ_VBLANK_DURATION, /* frames per second, vblank duration */
2891 1,
2892 init_toaplan3,
2893
2894 /* video hardware */
2895 32*16, 32*16, { 0, 319, 0, 239 },
2896 gfxdecodeinfo,
2897 (64*16)+(64*16), (64*16)+(64*16),
2898 0,
2899
2900 VIDEO_TYPE_RASTER | VIDEO_MODIFIES_PALETTE | VIDEO_UPDATE_BEFORE_VBLANK, /* Sprites are buffered too */
2901 toaplan2_0_eof_callback,
2902 toaplan2_0_vh_start,
2903 toaplan2_0_vh_stop,
2904 toaplan2_0_vh_screenrefresh,
2905
2906 /* sound hardware */
2907 SOUND_SUPPORTS_STEREO,0,0,0,
2908 {
2909 {
2910 SOUND_YM2151,
2911 &ym2151_interface
2912 }
2913 }
2914 };
2915
2916 static struct MachineDriver machine_driver_vfive =
2917 {
2918 /* basic machine hardware */
2919 {
2920 {
2921 CPU_M68000,
2922 10000000, /* 10MHz Oscillator */
2923 vfive_readmem,vfive_writemem,0,0,
2924 toaplan2_interrupt,1
2925 },
2926 #if Zx80
2927 {
2928 CPU_Z80, /* Z?80 type Toaplan marked CPU ??? */
2929 10000000, /* 10MHz Oscillator */
2930 Zx80_readmem,Zx80_writemem,0,0,
2931 ignore_interrupt,0
2932 }
2933 #endif
2934 },
2935 60, DEFAULT_REAL_60HZ_VBLANK_DURATION, /* frames per second, vblank duration */
2936 1,
2937 init_toaplan3,
2938
2939 /* video hardware */
2940 32*16, 32*16, { 0, 319, 0, 239 },
2941 gfxdecodeinfo,
2942 (64*16)+(64*16), (64*16)+(64*16),
2943 0,
2944
2945 VIDEO_TYPE_RASTER | VIDEO_MODIFIES_PALETTE | VIDEO_UPDATE_BEFORE_VBLANK, /* Sprites are buffered too */
2946 toaplan2_0_eof_callback,
2947 toaplan2_0_vh_start,
2948 toaplan2_0_vh_stop,
2949 toaplan2_0_vh_screenrefresh,
2950
2951 /* sound hardware */
2952 SOUND_SUPPORTS_STEREO,0,0,0,
2953 {
2954 {
2955 SOUND_YM2151,
2956 &ym2151_interface
2957 }
2958 }
2959 };
2960
2961 static struct MachineDriver machine_driver_batsugun =
2962 {
2963 /* basic machine hardware */
2964 {
2965 {
2966 CPU_M68000,
2967 32000000/2, /* 16MHz , 32MHz Oscillator */
2968 batsugun_readmem,batsugun_writemem,0,0,
2969 toaplan2_interrupt,1
2970 },
2971 #if Zx80
2972 {
2973 CPU_Z80, /* Z?80 type Toaplan marked CPU ??? */
2974 32000000/2, /* 16MHz , 32MHz Oscillator */
2975 Zx80_readmem,Zx80_writemem,0,0,
2976 ignore_interrupt,0
2977 }
2978 #endif
2979 },
2980 60, DEFAULT_REAL_60HZ_VBLANK_DURATION, /* frames per second, vblank duration */
2981 1,
2982 init_toaplan3,
2983
2984 /* video hardware */
2985 32*16, 32*16, { 0, 319, 0, 239 },
2986 gfxdecodeinfo_2,
2987 (64*16)+(64*16), (64*16)+(64*16),
2988 0,
2989
2990 VIDEO_TYPE_RASTER | VIDEO_MODIFIES_PALETTE | VIDEO_UPDATE_BEFORE_VBLANK, /* Sprites are buffered too */
2991 toaplan2_1_eof_callback,
2992 toaplan2_1_vh_start,
2993 toaplan2_1_vh_stop,
2994 batsugun_1_vh_screenrefresh,
2995
2996 /* sound hardware */
2997 SOUND_SUPPORTS_STEREO,0,0,0,
2998 {
2999 {
3000 SOUND_YM2151,
3001 &ym2151_interface
3002 },
3003 {
3004 SOUND_OKIM6295,
3005 &okim6295_interface
3006 }
3007 }
3008 };
3009
3010 static struct MachineDriver machine_driver_snowbro2 =
3011 {
3012 /* basic machine hardware */
3013 {
3014 {
3015 CPU_M68000,
3016 16000000,
3017 snowbro2_readmem,snowbro2_writemem,0,0,
3018 toaplan2_interrupt,1
3019 },
3020 },
3021 60, DEFAULT_REAL_60HZ_VBLANK_DURATION, /* frames per second, vblank duration */
3022 1,
3023 init_toaplan2,
3024
3025 /* video hardware */
3026 32*16, 32*16, { 0, 319, 0, 239 },
3027 gfxdecodeinfo,
3028 (64*16)+(64*16), (64*16)+(64*16),
3029 0,
3030
3031 VIDEO_TYPE_RASTER | VIDEO_MODIFIES_PALETTE | VIDEO_UPDATE_BEFORE_VBLANK, /* Sprites are buffered too */
3032 toaplan2_0_eof_callback,
3033 toaplan2_0_vh_start,
3034 toaplan2_0_vh_stop,
3035 toaplan2_0_vh_screenrefresh,
3036
3037 /* sound hardware */
3038 SOUND_SUPPORTS_STEREO,0,0,0,
3039 {
3040 {
3041 SOUND_YM2151,
3042 &ym2151_interface
3043 },
3044 {
3045 SOUND_OKIM6295,
3046 &okim6295_interface
3047 }
3048 }
3049 };
3050
3051 static struct MachineDriver machine_driver_mahoudai =
3052 {
3053 /* basic machine hardware */
3054 {
3055 {
3056 CPU_M68000,
3057 16000000,
3058 mahoudai_readmem,mahoudai_writemem,0,0,
3059 toaplan2_interrupt,1
3060 },
3061 {
3062 CPU_Z80,
3063 4000000, /* ??? */
3064 raizing_sound_readmem,raizing_sound_writemem,0,0,
3065 ignore_interrupt,0
3066 }
3067 },
3068 60, DEFAULT_REAL_60HZ_VBLANK_DURATION, /* frames per second, vblank duration */
3069 10,
3070 0,
3071
3072 /* video hardware */
3073 32*16, 32*16, { 0, 319, 0, 239 },
3074 raizing_gfxdecodeinfo,
3075 (128*16), (128*16),
3076 0,
3077
3078 VIDEO_TYPE_RASTER | VIDEO_MODIFIES_PALETTE | VIDEO_UPDATE_BEFORE_VBLANK, /* Sprites are buffered too */
3079 toaplan2_0_eof_callback,
3080 raizing_0_vh_start,
3081 toaplan2_0_vh_stop,
3082 raizing_0_vh_screenrefresh,
3083
3084 /* sound hardware */
3085 SOUND_SUPPORTS_STEREO,0,0,0,
3086 {
3087 {
3088 SOUND_YM2151,
3089 &ym2151_interface
3090 },
3091 {
3092 SOUND_OKIM6295,
3093 &okim6295_raizing_interface
3094 }
3095 }
3096 };
3097
3098 static struct MachineDriver machine_driver_shippumd =
3099 {
3100 /* basic machine hardware */
3101 {
3102 {
3103 CPU_M68000,
3104 16000000,
3105 shippumd_readmem,shippumd_writemem,0,0,
3106 toaplan2_interrupt,1
3107 },
3108 {
3109 CPU_Z80,
3110 4000000, /* ??? */
3111 raizing_sound_readmem,raizing_sound_writemem,0,0,
3112 ignore_interrupt,0
3113 }
3114 },
3115 60, DEFAULT_REAL_60HZ_VBLANK_DURATION, /* frames per second, vblank duration */
3116 10,
3117 0,
3118
3119 /* video hardware */
3120 32*16, 32*16, { 0, 319, 0, 239 },
3121 raizing_gfxdecodeinfo,
3122 (128*16), (128*16),
3123 0,
3124
3125 VIDEO_TYPE_RASTER | VIDEO_MODIFIES_PALETTE | VIDEO_UPDATE_BEFORE_VBLANK, /* Sprites are buffered too */
3126 toaplan2_0_eof_callback,
3127 raizing_0_vh_start,
3128 toaplan2_0_vh_stop,
3129 raizing_0_vh_screenrefresh,
3130
3131 /* sound hardware */
3132 SOUND_SUPPORTS_STEREO,0,0,0,
3133 {
3134 {
3135 SOUND_YM2151,
3136 &ym2151_interface
3137 },
3138 {
3139 SOUND_OKIM6295,
3140 &okim6295_raizing_interface
3141 }
3142 }
3143 };
3144
3145
3146 /***************************************************************************
3147
3148 Game driver(s)
3149
3150 ***************************************************************************/
3151
3152 /* -------------------------- Toaplan games ------------------------- */
3153 ROM_START( tekipaki )
3154 ROM_REGION( 0x020000, REGION_CPU1 ) /* Main 68K code */
3155 ROM_LOAD_EVEN( "tp020-1.bin", 0x000000, 0x010000, 0xd8420bd5 )
3156 ROM_LOAD_ODD ( "tp020-2.bin", 0x000000, 0x010000, 0x7222de8e )
3157
3158 #if HD64x180
3159 ROM_REGION( 0x10000, REGION_CPU2 ) /* Sound 647180 code */
3160 /* sound CPU is a HD647180 (Z180) with internal ROM - not yet supported */
3161 ROM_LOAD( "hd647180.020", 0x00000, 0x08000, 0x00000000 )
3162 #endif
3163
3164 ROM_REGION( 0x100000, REGION_GFX1 | REGIONFLAG_DISPOSE )
3165 ROM_LOAD( "tp020-4.bin", 0x000000, 0x080000, 0x3ebbe41e )
3166 ROM_LOAD( "tp020-3.bin", 0x080000, 0x080000, 0x2d5e2201 )
3167 ROM_END
3168
3169 ROM_START( ghox )
3170 ROM_REGION( 0x040000, REGION_CPU1 ) /* Main 68K code */
3171 ROM_LOAD_EVEN( "tp021-01.u10", 0x000000, 0x020000, 0x9e56ac67 )
3172 ROM_LOAD_ODD ( "tp021-02.u11", 0x000000, 0x020000, 0x15cac60f )
3173
3174 #if HD64x180
3175 ROM_REGION( 0x10000, REGION_CPU2 ) /* Sound 647180 code */
3176 /* sound CPU is a HD647180 (Z180) with internal ROM - not yet supported */
3177 ROM_LOAD( "hd647180.021", 0x00000, 0x08000, 0x00000000 )
3178 #endif
3179
3180 ROM_REGION( 0x100000, REGION_GFX1 | REGIONFLAG_DISPOSE )
3181 ROM_LOAD( "tp021-03.u36", 0x000000, 0x080000, 0xa15d8e9d )
3182 ROM_LOAD( "tp021-04.u37", 0x080000, 0x080000, 0x26ed1c9a )
3183 ROM_END
3184
3185 ROM_START( dogyuun )
3186 ROM_REGION( 0x080000, REGION_CPU1 ) /* Main 68K code */
3187 ROM_LOAD_WIDE( "tp022_1.r16", 0x000000, 0x080000, 0x72f18907 )
3188
3189 #if Zx80
3190 ROM_REGION( 0x10000, REGION_CPU2 ) /* Secondary CPU code */
3191 /* Secondary CPU is a Toaplan marked chip ??? */
3192 // ROM_LOAD( "tp022.mcu", 0x00000, 0x08000, 0x00000000 )
3193 #endif
3194
3195 ROM_REGION( 0x200000, REGION_GFX1 | REGIONFLAG_DISPOSE )
3196 ROM_LOAD_GFX_SWAP( "tp022_3.r16", 0x000000, 0x100000, 0x191b595f )
3197 ROM_LOAD_GFX_SWAP( "tp022_4.r16", 0x100000, 0x100000, 0xd58d29ca )
3198
3199 ROM_REGION( 0x400000, REGION_GFX2 | REGIONFLAG_DISPOSE )
3200 ROM_LOAD_GFX_SWAP( "tp022_5.r16", 0x000000, 0x200000, 0xd4c1db45 )
3201 ROM_LOAD_GFX_SWAP( "tp022_6.r16", 0x200000, 0x200000, 0xd48dc74f )
3202
3203 ROM_REGION( 0x40000, REGION_SOUND1 ) /* ADPCM Samples */
3204 ROM_LOAD( "tp022_2.rom", 0x00000, 0x40000, 0x043271b3 )
3205 ROM_END
3206
3207 ROM_START( kbash )
3208 ROM_REGION( 0x080000, REGION_CPU1 ) /* Main 68K code */
3209 ROM_LOAD_WIDE_SWAP( "kbash01.bin", 0x000000, 0x080000, 0x2965f81d )
3210
3211 /* Secondary CPU is a Toaplan marked chip, (TS-004-Dash TOA PLAN) */
3212 /* Its a Z?80 of some sort - 94 pin chip. */
3213 #if Zx80
3214 ROM_REGION( 0x10000, REGION_CPU2 ) /* Sound Z?80 code */
3215 #else
3216 ROM_REGION( 0x8000, REGION_USER1 )
3217 #endif
3218 ROM_LOAD( "kbash02.bin", 0x00200, 0x07e00, 0x4cd882a1 )
3219 ROM_CONTINUE( 0x00000, 0x00200 )
3220
3221 ROM_REGION( 0x800000, REGION_GFX1 | REGIONFLAG_DISPOSE )
3222 ROM_LOAD( "kbash03.bin", 0x000000, 0x200000, 0x32ad508b )
3223 ROM_LOAD( "kbash05.bin", 0x200000, 0x200000, 0xb84c90eb )
3224 ROM_LOAD( "kbash04.bin", 0x400000, 0x200000, 0xe493c077 )
3225 ROM_LOAD( "kbash06.bin", 0x600000, 0x200000, 0x9084b50a )
3226
3227 ROM_REGION( 0x40000, REGION_SOUND1 ) /* ADPCM Samples */
3228 ROM_LOAD( "kbash07.bin", 0x00000, 0x40000, 0x3732318f )
3229 ROM_END
3230
3231 ROM_START( tatsujn2 )
3232 ROM_REGION( 0x080000, REGION_CPU1 ) /* Main 68K code */
3233 ROM_LOAD_WIDE( "tsj2rom1.bin", 0x000000, 0x080000, 0xf5cfe6ee )
3234
3235 #if Zx80
3236 ROM_REGION( 0x10000, REGION_CPU2 ) /* Secondary CPU code */
3237 /* Secondary CPU is a Toaplan marked chip ??? */
3238 // ROM_LOAD( "tp024.mcu", 0x00000, 0x08000, 0x00000000 )
3239 #endif
3240
3241 ROM_REGION( 0x200000, REGION_GFX1 | REGIONFLAG_DISPOSE )
3242 ROM_LOAD( "tsj2rom4.bin", 0x000000, 0x100000, 0x805c449e )
3243 ROM_LOAD( "tsj2rom3.bin", 0x100000, 0x100000, 0x47587164 )
3244
3245 ROM_REGION( 0x80000, REGION_SOUND1 ) /* ADPCM Samples */
3246 ROM_LOAD( "tsj2rom2.bin", 0x00000, 0x80000, 0xf2f6cae4 )
3247 ROM_END
3248
3249 ROM_START( pipibibs )
3250 ROM_REGION( 0x040000, REGION_CPU1 ) /* Main 68K code */
3251 ROM_LOAD_EVEN( "tp025-1.bin", 0x000000, 0x020000, 0xb2ea8659 )
3252 ROM_LOAD_ODD ( "tp025-2.bin", 0x000000, 0x020000, 0xdc53b939 )
3253
3254 ROM_REGION( 0x10000, REGION_CPU2 ) /* Sound Z80 code */
3255 ROM_LOAD( "tp025-5.bin", 0x0000, 0x8000, 0xbf8ffde5 )
3256
3257 ROM_REGION( 0x200000, REGION_GFX1 | REGIONFLAG_DISPOSE )
3258 ROM_LOAD( "tp025-4.bin", 0x000000, 0x100000, 0xab97f744 )
3259 ROM_LOAD( "tp025-3.bin", 0x100000, 0x100000, 0x7b16101e )
3260 ROM_END
3261
3262 ROM_START( whoopee )
3263 ROM_REGION( 0x040000, REGION_CPU1 ) /* Main 68K code */
3264 ROM_LOAD_EVEN( "whoopee.1", 0x000000, 0x020000, 0x28882e7e )
3265 ROM_LOAD_ODD ( "whoopee.2", 0x000000, 0x020000, 0x6796f133 )
3266
3267 ROM_REGION( 0x10000, REGION_CPU2 ) /* Sound Z80 code */
3268 /* sound CPU is a HD647180 (Z180) with internal ROM - not yet supported */
3269 /* use the Z80 version from the bootleg Pipi & Bibis set for now */
3270 ROM_LOAD( "hd647180.025", 0x00000, 0x08000, BADCRC( 0x101c0358 ) )
3271
3272 ROM_REGION( 0x200000, REGION_GFX1 | REGIONFLAG_DISPOSE )
3273 ROM_LOAD( "tp025-4.bin", 0x000000, 0x100000, 0xab97f744 )
3274 ROM_LOAD( "tp025-3.bin", 0x100000, 0x100000, 0x7b16101e )
3275 ROM_END
3276
3277 ROM_START( pipibibi )
3278 ROM_REGION( 0x040000, REGION_CPU1 ) /* Main 68K code */
3279 ROM_LOAD_EVEN( "ppbb06.bin", 0x000000, 0x020000, 0x14c92515 )
3280 ROM_LOAD_ODD ( "ppbb05.bin", 0x000000, 0x020000, 0x3d51133c )
3281
3282 ROM_REGION( 0x10000, REGION_CPU2 ) /* Sound Z80 code */
3283 ROM_LOAD( "ppbb08.bin", 0x0000, 0x8000, 0x101c0358 )
3284
3285 ROM_REGION( 0x200000, REGION_GFX1 | REGIONFLAG_DISPOSE )
3286 /* GFX data differs slightly from Toaplan boards ??? */
3287 ROM_LOAD_GFX_EVEN( "ppbb01.bin", 0x000000, 0x080000, 0x0fcae44b )
3288 ROM_LOAD_GFX_ODD ( "ppbb02.bin", 0x000000, 0x080000, 0x8bfcdf87 )
3289 ROM_LOAD_GFX_EVEN( "ppbb03.bin", 0x100000, 0x080000, 0xabdd2b8b )
3290 ROM_LOAD_GFX_ODD ( "ppbb04.bin", 0x100000, 0x080000, 0x70faa734 )
3291
3292 ROM_REGION( 0x8000, REGION_USER1 ) /* ??? Some sort of table */
3293 ROM_LOAD( "ppbb07.bin", 0x0000, 0x8000, 0x456dd16e )
3294 ROM_END
3295
3296 ROM_START( fixeight )
3297 ROM_REGION( 0x080000, REGION_CPU1 ) /* Main 68K code */
3298 ROM_LOAD_WIDE_SWAP( "tp-026-1", 0x000000, 0x080000, 0xf7b1746a )
3299
3300 #if Zx80
3301 ROM_REGION( 0x10000, REGION_CPU2 ) /* Secondary CPU code */
3302 /* Secondary CPU is a Toaplan marked chip, (TS-001-Turbo TOA PLAN) */
3303 /* Its a Z?80 of some sort - 94 pin chip. */
3304 // ROM_LOAD( "tp-026.mcu", 0x0000, 0x8000, 0x00000000 )
3305 #endif
3306
3307 ROM_REGION( 0x400000, REGION_GFX1 | REGIONFLAG_DISPOSE )
3308 ROM_LOAD( "tp-026-3", 0x000000, 0x200000, 0xe5578d98 )
3309 ROM_LOAD( "tp-026-4", 0x200000, 0x200000, 0xb760cb53 )
3310
3311 ROM_REGION( 0x40000, REGION_SOUND1 ) /* ADPCM Samples */
3312 ROM_LOAD( "tp-026-2", 0x00000, 0x40000, 0x85063f1f )
3313
3314 ROM_REGION( 0x80, REGION_USER1 )
3315 /* Serial EEPROM (93C45) connected to Secondary CPU */
3316 ROM_LOAD( "93c45.u21", 0x00, 0x80, 0x40d75df0 )
3317 ROM_END
3318
3319 ROM_START( grindstm )
3320 ROM_REGION( 0x080000, REGION_CPU1 ) /* Main 68K code */
3321 ROM_LOAD_WIDE( "01.bin", 0x000000, 0x080000, 0x99af8749 )
3322
3323 #if Zx80
3324 ROM_REGION( 0x10000, REGION_CPU2 ) /* Sound CPU code */
3325 /* Secondary CPU is a Toaplan marked chip, (TS-007-Spy TOA PLAN) */
3326 /* Its a Z?80 of some sort - 94 pin chip. */
3327 // ROM_LOAD( "tp027.mcu", 0x8000, 0x8000, 0x00000000 )
3328 #endif
3329
3330 ROM_REGION( 0x200000, REGION_GFX1 | REGIONFLAG_DISPOSE )
3331 ROM_LOAD( "tp027_02.bin", 0x000000, 0x100000, 0x877b45e8 )
3332 ROM_LOAD( "tp027_03.bin", 0x100000, 0x100000, 0xb1fc6362 )
3333 ROM_END
3334
3335 ROM_START( vfive )
3336 ROM_REGION( 0x080000, REGION_CPU1 ) /* Main 68K code */
3337 ROM_LOAD_WIDE( "tp027_01.bin", 0x000000, 0x080000, 0x98dd1919 )
3338
3339 #if Zx80
3340 ROM_REGION( 0x10000, REGION_CPU2 ) /* Sound CPU code */
3341 /* Secondary CPU is a Toaplan marked chip, (TS-007-Spy TOA PLAN) */
3342 /* Its a Z?80 of some sort - 94 pin chip. */
3343 // ROM_LOAD( "tp027.mcu", 0x8000, 0x8000, 0x00000000 )
3344 #endif
3345
3346 ROM_REGION( 0x200000, REGION_GFX1 | REGIONFLAG_DISPOSE )
3347 ROM_LOAD( "tp027_02.bin", 0x000000, 0x100000, 0x877b45e8 )
3348 ROM_LOAD( "tp027_03.bin", 0x100000, 0x100000, 0xb1fc6362 )
3349 ROM_END
3350
3351 ROM_START( batsugun )
3352 ROM_REGION( 0x080000, REGION_CPU1 ) /* Main 68K code */
3353 ROM_LOAD_WIDE( "tp030_1.bin", 0x000000, 0x080000, 0xe0cd772b )
3354
3355 #if Zx80
3356 ROM_REGION( 0x10000, REGION_CPU2 ) /* Sound CPU code */
3357 /* Secondary CPU is a Toaplan marked chip, (TS-007-Spy TOA PLAN) */
3358 /* Its a Z?80 of some sort - 94 pin chip. */
3359 // ROM_LOAD( "tp030.mcu", 0x8000, 0x8000, 0x00000000 )
3360 #endif
3361
3362 ROM_REGION( 0x200000, REGION_GFX1 | REGIONFLAG_DISPOSE )
3363 ROM_LOAD( "tp030_5.bin", 0x000000, 0x100000, 0xbcf5ba05 )
3364 ROM_LOAD( "tp030_6.bin", 0x100000, 0x100000, 0x0666fecd )
3365
3366 ROM_REGION( 0x400000, REGION_GFX2 | REGIONFLAG_DISPOSE )
3367 ROM_LOAD( "tp030_3l.bin", 0x000000, 0x100000, 0x3024b793 )
3368 ROM_LOAD( "tp030_3h.bin", 0x100000, 0x100000, 0xed75730b )
3369 ROM_LOAD( "tp030_4l.bin", 0x200000, 0x100000, 0xfedb9861 )
3370 ROM_LOAD( "tp030_4h.bin", 0x300000, 0x100000, 0xd482948b )
3371
3372 ROM_REGION( 0x40000, REGION_SOUND1 ) /* ADPCM Samples */
3373 ROM_LOAD( "tp030_2.bin", 0x00000, 0x40000, 0x276146f5 )
3374 ROM_END
3375
3376 ROM_START( batugnsp )
3377 ROM_REGION( 0x080000, REGION_CPU1 ) /* Main 68K code */
3378 ROM_LOAD_WIDE( "tp030-sp.u69", 0x000000, 0x080000, 0xaeca7811 )
3379
3380 #if Zx80
3381 ROM_REGION( 0x10000, REGION_CPU2 ) /* Sound CPU code */
3382 /* Secondary CPU is a Toaplan marked chip, (TS-007-Spy TOA PLAN) */
3383 /* Its a Z?80 of some sort - 94 pin chip. */
3384 // ROM_LOAD( "tp030.mcu", 0x8000, 0x8000, 0x00000000 )
3385 #endif
3386
3387 ROM_REGION( 0x200000, REGION_GFX1 | REGIONFLAG_DISPOSE )
3388 ROM_LOAD( "tp030_5.bin", 0x000000, 0x100000, 0xbcf5ba05 )
3389 ROM_LOAD( "tp030_6.bin", 0x100000, 0x100000, 0x0666fecd )
3390
3391 ROM_REGION( 0x400000, REGION_GFX2 | REGIONFLAG_DISPOSE )
3392 ROM_LOAD( "tp030_3l.bin", 0x000000, 0x100000, 0x3024b793 )
3393 ROM_LOAD( "tp030_3h.bin", 0x100000, 0x100000, 0xed75730b )
3394 ROM_LOAD( "tp030_4l.bin", 0x200000, 0x100000, 0xfedb9861 )
3395 ROM_LOAD( "tp030_4h.bin", 0x300000, 0x100000, 0xd482948b )
3396
3397 ROM_REGION( 0x40000, REGION_SOUND1 ) /* ADPCM Samples */
3398 ROM_LOAD( "tp030_2.bin", 0x00000, 0x40000, 0x276146f5 )
3399 ROM_END
3400
3401 ROM_START( snowbro2 )
3402 ROM_REGION( 0x080000, REGION_CPU1 ) /* Main 68K code */
3403 ROM_LOAD_WIDE_SWAP( "pro-4", 0x000000, 0x080000, 0x4c7ee341 )
3404
3405 ROM_REGION( 0x300000, REGION_GFX1 | REGIONFLAG_DISPOSE )
3406 ROM_LOAD( "rom2-l", 0x000000, 0x100000, 0xe9d366a9 )
3407 ROM_LOAD( "rom2-h", 0x100000, 0x080000, 0x9aab7a62 )
3408 ROM_LOAD( "rom3-l", 0x180000, 0x100000, 0xeb06e332 )
3409 ROM_LOAD( "rom3-h", 0x280000, 0x080000, 0xdf4a952a )
3410
3411 ROM_REGION( 0x80000, REGION_SOUND1 ) /* ADPCM Samples */
3412 ROM_LOAD( "rom4", 0x00000, 0x80000, 0x638f341e )
3413 ROM_END
3414
3415 /* -------------------------- Raizing games ------------------------- */
3416 ROM_START( mahoudai )
3417 ROM_REGION( 0x080000, REGION_CPU1 ) /* Main 68K code */
3418 ROM_LOAD_WIDE_SWAP( "ra_ma_01.01", 0x000000, 0x080000, 0x970ccc5c )
3419
3420 ROM_REGION( 0x10000, REGION_CPU2 ) /* Sound Z80 code */
3421 ROM_LOAD( "ra_ma_01.02", 0x00000, 0x10000, 0xeabfa46d )
3422
3423 ROM_REGION( 0x200000, REGION_GFX1 | REGIONFLAG_DISPOSE )
3424 ROM_LOAD( "ra_ma_01.03", 0x000000, 0x100000, 0x54e2bd95 )
3425 ROM_LOAD( "ra_ma_01.04", 0x100000, 0x100000, 0x21cd378f )
3426
3427 ROM_REGION( 0x008000, REGION_GFX2 | REGIONFLAG_DISPOSE )
3428 ROM_LOAD( "ra_ma_01.05", 0x000000, 0x008000, 0xc00d1e80 )
3429
3430 ROM_REGION( 0x40000, REGION_SOUND1 ) /* ADPCM Samples */
3431 ROM_LOAD( "ra_ma_01.06", 0x00000, 0x40000, 0x6edb2ab8 )
3432 ROM_END
3433
3434 ROM_START( shippumd )
3435 ROM_REGION( 0x100000, REGION_CPU1 ) /* Main 68K code */
3436 ROM_LOAD_EVEN( "ma02rom1.bin", 0x000000, 0x080000, 0xa678b149 )
3437 ROM_LOAD_ODD ( "ma02rom0.bin", 0x000000, 0x080000, 0xf226a212 )
3438
3439 ROM_REGION( 0x10000, REGION_CPU2 ) /* Sound Z80 code */
3440 ROM_LOAD( "ma02rom2.bin", 0x00000, 0x10000, 0xdde8a57e )
3441
3442 ROM_REGION( 0x400000, REGION_GFX1 | REGIONFLAG_DISPOSE )
3443 ROM_LOAD( "ma02rom3.bin", 0x000000, 0x200000, 0x0e797142 )
3444 ROM_LOAD( "ma02rom4.bin", 0x200000, 0x200000, 0x72a6fa53 )
3445
3446 ROM_REGION( 0x008000, REGION_GFX2 | REGIONFLAG_DISPOSE )
3447 ROM_LOAD( "ma02rom5.bin", 0x000000, 0x008000, 0x116ae559 )
3448
3449 ROM_REGION( 0x80000, REGION_SOUND1 ) /* ADPCM Samples */
3450 ROM_LOAD( "ma02rom6.bin", 0x00000, 0x80000, 0x199e7cae )
3451 ROM_END
3452
3453
3454 /* The following is in order of Toaplan Board/game numbers */
3455 /* See list at top of file */
3456 /* Whoopee machine to be changed to Teki Paki when (if) HD647180 is dumped */
3457
3458 /* ( YEAR NAME PARENT MACHINE INPUT INIT MONITOR COMPANY FULLNAME FLAGS ) */
3459 GAMEX( 1991, tekipaki, 0, tekipaki, tekipaki, toaplan2, ROT0, "Toaplan", "Teki Paki", GAME_NO_SOUND )
3460 GAMEX( 1991, ghox, 0, ghox, ghox, toaplan2, ROT270, "Toaplan", "Ghox", GAME_NO_SOUND )
3461 GAMEX( 1991, dogyuun, 0, dogyuun, dogyuun, toaplan3, ROT270, "Toaplan", "Dogyuun", GAME_NO_SOUND )
3462 GAMEX( 1993, kbash, 0, kbash, kbash, toaplan2, ROT0_16BIT, "Toaplan", "Knuckle Bash", GAME_NO_SOUND )
3463 GAME ( 1992, tatsujn2, 0, tatsujn2, tatsujn2, tatsujn2, ROT270, "Toaplan", "Truxton II / Tatsujin II / Tatsujin Oh (Japan)" )
3464 GAME ( 1991, pipibibs, 0, pipibibs, pipibibs, pipibibs, ROT0, "Toaplan", "Pipi & Bibis / Whoopee (Japan)" )
3465 GAME ( 1991, whoopee, pipibibs, whoopee, whoopee, pipibibs, ROT0, "Toaplan", "Whoopee (Japan) / Pipi & Bibis (World)" )
3466 GAME ( 1991, pipibibi, pipibibs, pipibibi, pipibibi, pipibibi, ROT0, "[Toaplan] Ryouta Kikaku", "Pipi & Bibis / Whoopee (Japan) [bootleg ?]" )
3467 GAMEX( 1992, fixeight, 0, fixeight, vfive, toaplan3, ROT270, "Toaplan", "FixEight", GAME_NOT_WORKING )
3468 GAMEX( 1992, grindstm, vfive, vfive, grindstm, toaplan3, ROT270, "Toaplan", "Grind Stormer", GAME_NO_SOUND )
3469 GAMEX( 1993, vfive, 0, vfive, vfive, toaplan3, ROT270, "Toaplan", "V-Five (Japan)", GAME_NO_SOUND )
3470 GAMEX( 1993, batsugun, 0, batsugun, batsugun, toaplan3, ROT270_16BIT, "Toaplan", "Batsugun", GAME_NO_SOUND )
3471 GAMEX( 1993, batugnsp, batsugun, batsugun, batsugun, toaplan3, ROT270_16BIT, "Toaplan", "Batsugun Special Ver.", GAME_NO_SOUND )
3472 GAME ( 1994, snowbro2, 0, snowbro2, snowbro2, snowbro2, ROT0_16BIT, "[Toaplan] Hanafram", "Snow Bros. 2 - With New Elves" )
3473 GAME ( 1993, mahoudai, 0, mahoudai, mahoudai, 0, ROT270, "Raizing (Able license)", "Mahou Daisakusen (Japan)" )
3474 GAME ( 1994, shippumd, 0, shippumd, shippumd, 0, ROT270, "Raizing", "Shippu Mahou Daisakusen (Japan)" )
3475