xref: /netbsd/sys/arch/next68k/include/intr.h (revision 29f2d802)
1 /*	$NetBSD: intr.h,v 1.23 2023/07/11 11:13:32 riastradh Exp $	*/
2 
3 /*
4  * Copyright (C) 1997 Scott Reynolds
5  * Copyright (C) 1998 Darrin Jewell
6  * All rights reserved.
7  *
8  * Redistribution and use in source and binary forms, with or without
9  * modification, are permitted provided that the following conditions
10  * are met:
11  * 1. Redistributions of source code must retain the above copyright
12  *    notice, this list of conditions and the following disclaimer.
13  * 2. Redistributions in binary form must reproduce the above copyright
14  *    notice, this list of conditions and the following disclaimer in the
15  *    documentation and/or other materials provided with the distribution.
16  * 3. The name of the author may not be used to endorse or promote products
17  *    derived from this software without specific prior written permission.
18  *
19  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
20  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
21  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
22  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
23  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
24  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
25  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
26  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
27  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
28  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
29  */
30 
31 #ifndef _NEXT68K_INTR_H_
32 #define _NEXT68K_INTR_H_
33 
34 #include <machine/psl.h>
35 
36 /* Probably want to dealwith IPL's here @@@ */
37 
38 #if defined(_KERNEL) || defined(_KMEMUSER)
39 typedef struct {
40 	uint16_t _psl;
41 } ipl_cookie_t;
42 #endif
43 
44 #ifdef _KERNEL
45 
46 /* spl0 requires checking for software interrupts */
47 
48 /* watch out for side effects */
49 #define splx(s)         ((s) & PSL_IPL ? _spl(s) : spl0())
50 
51 #define splsoftbio()	splraise1()
52 #define splsoftnet()    splraise1()
53 #define splsoftclock()	splraise1()
54 #define splsoftserial()	splraise1()
55 #define splvm()         splraise6()
56 #define splhigh()       spl7()
57 #define splsched()      spl7()
58 
59 #define spldma()        splraise6()
60 
61 /****************************************************************/
62 
63 #define	IPL_NONE	0
64 #define	IPL_SOFTCLOCK	1
65 #define	IPL_SOFTBIO	2
66 #define	IPL_SOFTNET	3
67 #define	IPL_SOFTSERIAL	4
68 #define	IPL_VM		5
69 #define	IPL_SCHED	6
70 #define	IPL_HIGH	7
71 #define	NIPL		8
72 
73 extern const uint16_t ipl2psl_table[NIPL];
74 
75 typedef int ipl_t;
76 
77 static __inline ipl_cookie_t
makeiplcookie(ipl_t ipl)78 makeiplcookie(ipl_t ipl)
79 {
80 
81 	return (ipl_cookie_t){._psl = ipl2psl_table[ipl]};
82 }
83 
84 static __inline int
splraiseipl(ipl_cookie_t icookie)85 splraiseipl(ipl_cookie_t icookie)
86 {
87 
88 	return _splraise(icookie._psl);
89 }
90 
91 /****************************************************************/
92 
93 /* locore.s */
94 int	spl0(void);
95 
96 extern volatile u_long *intrstat;
97 extern volatile u_long *intrmask;
98 #define INTR_SETMASK(x)		(*intrmask = (x))
99 #define INTR_ENABLE(x)		(*intrmask |= NEXT_I_BIT(x))
100 #define INTR_DISABLE(x)		(*intrmask &= (~NEXT_I_BIT(x)))
101 #define INTR_OCCURRED(x)	(*intrstat & NEXT_I_BIT(x))
102 
103 #endif /* _KERNEL */
104 
105 #endif /* _NEXT68K_INTR_H_ */
106