| /dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/tools/llvm-mca/AArch64/Cortex/ |
| H A D | A55-neon-instructions.s | 679 sqxtun b19, h14 label
680 sqxtun h21, s15 label
681 sqxtun s20, d12 label
682 sqxtun v0.2s, v0.2d label
683 sqxtun v0.4h, v0.4s label
684 sqxtun v0.8b, v0.8h label
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| /dports/www/firefox-esr/firefox-91.8.0/js/src/jit/arm64/vixl/ |
| H A D | Assembler-vixl.cpp | 3384 void Assembler::sqxtun(const VRegister& vd, in sqxtun() function in vixl::Assembler
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| H A D | Logic-vixl.cpp | 1877 LogicVRegister Simulator::sqxtun(VectorFormat vform, in sqxtun() function in vixl::Simulator
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| /dports/www/qt5-webengine/qtwebengine-everywhere-src-5.15.2/src/3rdparty/chromium/v8/src/codegen/arm64/ |
| H A D | assembler-arm64.cc | 3364 void Assembler::sqxtun(const VRegister& vd, const VRegister& vn) { in sqxtun() function in v8::internal::Assembler
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| /dports/lang/spidermonkey78/firefox-78.9.0/js/src/jit/arm64/vixl/ |
| H A D | Assembler-vixl.cpp | 3375 void Assembler::sqxtun(const VRegister& vd, in sqxtun() function in vixl::Assembler
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| H A D | Logic-vixl.cpp | 1833 LogicVRegister Simulator::sqxtun(VectorFormat vform, in sqxtun() function in vixl::Simulator
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| /dports/www/firefox/firefox-99.0/js/src/jit/arm64/vixl/ |
| H A D | Assembler-vixl.cpp | 3384 void Assembler::sqxtun(const VRegister& vd, in sqxtun() function in vixl::Assembler
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| H A D | Logic-vixl.cpp | 1877 LogicVRegister Simulator::sqxtun(VectorFormat vform, in sqxtun() function in vixl::Simulator
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| /dports/lang/v8/v8-9.6.180.12/src/codegen/arm64/ |
| H A D | assembler-arm64.cc | 3447 void Assembler::sqxtun(const VRegister& vd, const VRegister& vn) { in sqxtun() function in v8::internal::Assembler
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| /dports/www/firefox-legacy/firefox-52.8.0esr/js/src/jit/arm64/vixl/ |
| H A D | Assembler-vixl.cpp | 3365 void Assembler::sqxtun(const VRegister& vd, in sqxtun() function in vixl::Assembler
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| H A D | Logic-vixl.cpp | 2127 LogicVRegister Simulator::sqxtun(VectorFormat vform, in sqxtun() function in vixl::Simulator
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| /dports/www/chromium-legacy/chromium-88.0.4324.182/v8/src/codegen/arm64/ |
| H A D | assembler-arm64.cc | 3431 void Assembler::sqxtun(const VRegister& vd, const VRegister& vn) { in sqxtun() function in v8::internal::Assembler
|
| /dports/lang/spidermonkey60/firefox-60.9.0/js/src/jit/arm64/vixl/ |
| H A D | Assembler-vixl.cpp | 3365 void Assembler::sqxtun(const VRegister& vd, in sqxtun() function in vixl::Assembler
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| H A D | Logic-vixl.cpp | 2127 LogicVRegister Simulator::sqxtun(VectorFormat vform, in sqxtun() function in vixl::Simulator
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| /dports/mail/thunderbird/thunderbird-91.8.0/js/src/jit/arm64/vixl/ |
| H A D | Assembler-vixl.cpp | 3384 void Assembler::sqxtun(const VRegister& vd, in sqxtun() function in vixl::Assembler
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| H A D | Logic-vixl.cpp | 1877 LogicVRegister Simulator::sqxtun(VectorFormat vform, in sqxtun() function in vixl::Simulator
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| /dports/www/node10/node-v10.24.1/deps/v8/src/arm64/ |
| H A D | assembler-arm64.cc | 3833 void Assembler::sqxtun(const VRegister& vd, const VRegister& vn) { in sqxtun() function in v8::internal::Assembler
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| H A D | simulator-logic-arm64.cc | 1820 LogicVRegister Simulator::sqxtun(VectorFormat vform, LogicVRegister dst, in sqxtun() function in v8::internal::Simulator
|
| /dports/databases/mongodb36/mongodb-src-r3.6.23/src/third_party/mozjs-45/extract/js/src/jit/arm64/vixl/ |
| H A D | Assembler-vixl.cpp | 3365 void Assembler::sqxtun(const VRegister& vd, in sqxtun() function in vixl::Assembler
|
| H A D | Logic-vixl.cpp | 2125 LogicVRegister Simulator::sqxtun(VectorFormat vform, in sqxtun() function in vixl::Simulator
|
| /dports/lang/v8/v8-9.6.180.12/src/execution/arm64/ |
| H A D | simulator-logic-arm64.cc | 1819 LogicVRegister Simulator::sqxtun(VectorFormat vform, LogicVRegister dst, in sqxtun() function in v8::internal::Simulator
|
| /dports/www/qt5-webengine/qtwebengine-everywhere-src-5.15.2/src/3rdparty/chromium/v8/src/execution/arm64/ |
| H A D | simulator-logic-arm64.cc | 1819 LogicVRegister Simulator::sqxtun(VectorFormat vform, LogicVRegister dst, in sqxtun() function in v8::internal::Simulator
|
| /dports/www/chromium-legacy/chromium-88.0.4324.182/v8/src/execution/arm64/ |
| H A D | simulator-logic-arm64.cc | 1819 LogicVRegister Simulator::sqxtun(VectorFormat vform, LogicVRegister dst, in sqxtun() function in v8::internal::Simulator
|
| /dports/misc/mxnet/incubator-mxnet-1.9.0/3rdparty/mkldnn/src/cpu/aarch64/xbyak_aarch64/src/ |
| H A D | xbyak_aarch64_mnemonic.h | 1362 void CodeGenerator::sqxtun(const BReg &vd, const HReg &vn) { AdvSimdSc2RegMisc(1, 18, vd, vn); } in sqxtun() function
1363 void CodeGenerator::sqxtun(const HReg &vd, const SReg &vn) { AdvSimdSc2RegMisc(1, 18, vd, vn); } in sqxtun() function
1364 void CodeGenerator::sqxtun(const SReg &vd, const DReg &vn) { AdvSimdSc2RegMisc(1, 18, vd, vn); } in sqxtun() function
1958 void CodeGenerator::sqxtun(const VReg8B &vd, const VReg8H &vn) { AdvSimd2RegMisc(1, 18, vd, vn); } function
1959 void CodeGenerator::sqxtun(const VReg4H &vd, const VReg4S &vn) { AdvSimd2RegMisc(1, 18, vd, vn); } function
1960 void CodeGenerator::sqxtun(const VReg2S &vd, const VReg2D &vn) { AdvSimd2RegMisc(1, 18, vd, vn); } function
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| /dports/math/onednn/oneDNN-2.5.1/src/cpu/aarch64/xbyak_aarch64/src/ |
| H A D | xbyak_aarch64_mnemonic.h | 1362 void CodeGenerator::sqxtun(const BReg &vd, const HReg &vn) { AdvSimdSc2RegMisc(1, 18, vd, vn); } in sqxtun() function
1363 void CodeGenerator::sqxtun(const HReg &vd, const SReg &vn) { AdvSimdSc2RegMisc(1, 18, vd, vn); } in sqxtun() function
1364 void CodeGenerator::sqxtun(const SReg &vd, const DReg &vn) { AdvSimdSc2RegMisc(1, 18, vd, vn); } in sqxtun() function
1958 void CodeGenerator::sqxtun(const VReg8B &vd, const VReg8H &vn) { AdvSimd2RegMisc(1, 18, vd, vn); } function
1959 void CodeGenerator::sqxtun(const VReg4H &vd, const VReg4S &vn) { AdvSimd2RegMisc(1, 18, vd, vn); } function
1960 void CodeGenerator::sqxtun(const VReg2S &vd, const VReg2D &vn) { AdvSimd2RegMisc(1, 18, vd, vn); } function
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