1 /* CHANNEL.C (c) Copyright Roger Bowler, 1999-2009 */
2 /* ESA/390 Channel Emulator */
3
4 /*-------------------------------------------------------------------*/
5 /* This module contains the channel subsystem functions for the */
6 /* Hercules S/370 and ESA/390 emulator. */
7 /*-------------------------------------------------------------------*/
8
9 /*-------------------------------------------------------------------*/
10 /* Additional credits: */
11 /* Measurement block support by Jan Jaeger */
12 /* Fix program check on NOP due to addressing - Jan Jaeger */
13 /* Fix program check on TIC as first ccw on RSCH - Jan Jaeger */
14 /* Fix PCI intermediate status flags - Jan Jaeger */
15 /* z/Architecture support - (c) Copyright Jan Jaeger, 1999-2009 */
16 /* 64-bit IDAW support - Roger Bowler v209 @IWZ*/
17 /* Incorrect-length-indication-suppression - Jan Jaeger */
18 /* Read backward support contributed by Hackules 13jun2002 */
19 /* Read backward fixes contributed by Jay Jaeger 16sep2003 */
20 /* MIDAW support - Roger Bowler 03aug2005 @MW*/
21 /*-------------------------------------------------------------------*/
22
23 #include "hstdinc.h"
24
25 #include "hercules.h"
26
27 #include "devtype.h"
28
29 #include "opcode.h"
30
31 #if defined(OPTION_FISHIO)
32 #include "w32chan.h"
33 #endif // defined(OPTION_FISHIO)
34
35 void call_execute_ccw_chain(int arch_mode, void* pDevBlk);
36
37 #ifdef OPTION_IODELAY_KLUDGE
38 #define IODELAY(_dev) \
39 do { \
40 if (sysblk.iodelay > 0 && (_dev)->devchar[10] == 0x20) \
41 usleep(sysblk.iodelay); \
42 } while (0)
43 #else
44 #define IODELAY(_dev)
45 #endif
46
47 #undef CHADDRCHK
48 #if defined(FEATURE_ADDRESS_LIMIT_CHECKING)
49 #define CHADDRCHK(_addr,_dev) \
50 ( ((_addr) > (_dev)->mainlim) \
51 || ((dev->orb.flag5 & ORB5_A) \
52 && ((((_dev)->pmcw.flag5 & PMCW5_LM_LOW) \
53 && ((_addr) < sysblk.addrlimval)) \
54 || (((_dev)->pmcw.flag5 & PMCW5_LM_HIGH) \
55 && ((_addr) >= sysblk.addrlimval)) ) ))
56 #else /*!defined(FEATURE_ADDRESS_LIMIT_CHECKING)*/
57 #define CHADDRCHK(_addr,_dev) \
58 ((_addr) > (_dev)->mainlim)
59 #endif /*!defined(FEATURE_ADDRESS_LIMIT_CHECKING)*/
60
61 #if !defined(_CHANNEL_C)
62 #define _CHANNEL_C
63
64 /*-------------------------------------------------------------------*/
65 /* FORMAT I/O BUFFER DATA */
66 /*-------------------------------------------------------------------*/
format_iobuf_data(RADR addr,BYTE * area,DEVBLK * dev)67 static void format_iobuf_data (RADR addr, BYTE *area, DEVBLK *dev) /*@IWZ*/
68 {
69 BYTE *a; /* -> Byte in main storage */
70 int i, j; /* Array subscripts */
71 BYTE c; /* Character work area */
72
73 area[0] = '\0';
74 if (addr <= dev->mainlim - 16)
75 {
76 a = dev->mainstor + addr;
77 j = sprintf ((char *)area,
78 "=>%2.2X%2.2X%2.2X%2.2X %2.2X%2.2X%2.2X%2.2X"
79 " %2.2X%2.2X%2.2X%2.2X %2.2X%2.2X%2.2X%2.2X ",
80 a[0], a[1], a[2], a[3], a[4], a[5], a[6], a[7],
81 a[8], a[9], a[10], a[11], a[12], a[13], a[14], a[15]);
82
83 for (i = 0; i < 16; i++)
84 {
85 c = guest_to_host(*a++);
86 if (!isprint(c)) c = '.';
87 area[j++] = c;
88 }
89 area[j] = '\0';
90 }
91
92 } /* end function format_iobuf_data */
93
94 /*-------------------------------------------------------------------*/
95 /* DISPLAY CHANNEL COMMAND WORD AND DATA */
96 /*-------------------------------------------------------------------*/
display_ccw(DEVBLK * dev,BYTE ccw[],U32 addr)97 static void display_ccw (DEVBLK *dev, BYTE ccw[], U32 addr)
98 {
99 BYTE area[64]; /* Data display area */
100
101 format_iobuf_data (addr, area, dev);
102 logmsg (_("HHCCP048I %4.4X:CCW=%2.2X%2.2X%2.2X%2.2X "
103 "%2.2X%2.2X%2.2X%2.2X%s\n"),
104 dev->devnum,
105 ccw[0], ccw[1], ccw[2], ccw[3],
106 ccw[4], ccw[5], ccw[6], ccw[7], area);
107
108 } /* end function display_ccw */
109
110 /*-------------------------------------------------------------------*/
111 /* DISPLAY CHANNEL STATUS WORD */
112 /*-------------------------------------------------------------------*/
display_csw(DEVBLK * dev,BYTE csw[])113 static void display_csw (DEVBLK *dev, BYTE csw[])
114 {
115 logmsg (_("HHCCP049I %4.4X:Stat=%2.2X%2.2X Count=%2.2X%2.2X "
116 "CCW=%2.2X%2.2X%2.2X\n"),
117 dev->devnum,
118 csw[4], csw[5], csw[6], csw[7],
119 csw[1], csw[2], csw[3]);
120
121 } /* end function display_csw */
122
123 /*-------------------------------------------------------------------*/
124 /* DISPLAY SUBCHANNEL STATUS WORD */
125 /*-------------------------------------------------------------------*/
display_scsw(DEVBLK * dev,SCSW scsw)126 static void display_scsw (DEVBLK *dev, SCSW scsw)
127 {
128 logmsg (_("HHCCP050I %4.4X:SCSW=%2.2X%2.2X%2.2X%2.2X "
129 "Stat=%2.2X%2.2X Count=%2.2X%2.2X "
130 "CCW=%2.2X%2.2X%2.2X%2.2X\n"),
131 dev->devnum,
132 scsw.flag0, scsw.flag1, scsw.flag2, scsw.flag3,
133 scsw.unitstat, scsw.chanstat,
134 scsw.count[0], scsw.count[1],
135 scsw.ccwaddr[0], scsw.ccwaddr[1],
136 scsw.ccwaddr[2], scsw.ccwaddr[3]);
137
138 } /* end function display_scsw */
139
140 /*-------------------------------------------------------------------*/
141 /* STORE CHANNEL ID */
142 /*-------------------------------------------------------------------*/
stchan_id(REGS * regs,U16 chan)143 int stchan_id (REGS *regs, U16 chan)
144 {
145 U32 chanid; /* Channel identifier word */
146 int devcount = 0; /* #of devices on channel */
147 DEVBLK *dev; /* -> Device control block */
148 PSA_3XX *psa; /* -> Prefixed storage area */
149
150 /* Find a device on specified channel */
151 for (dev = sysblk.firstdev; dev != NULL; dev = dev->nextdev)
152 {
153 /* Skip the device if not on specified channel */
154 if ((dev->devnum & 0xFF00) != chan
155 || (dev->pmcw.flag5 & PMCW5_V) == 0
156 #if defined(FEATURE_CHANNEL_SWITCHING)
157 || regs->chanset != dev->chanset
158 #endif /*defined(FEATURE_CHANNEL_SWITCHING)*/
159 )
160 continue;
161
162 /* Found device on the channel */
163 devcount++;
164 break;
165 } /* end for(dev) */
166
167 /* Exit with condition code 3 if no devices on channel */
168 if (devcount == 0)
169 return 3;
170
171 /* Construct the channel id word */
172 /* According to GA22-7000-4, Page 192, 2nd paragraph,
173 * channel 0 is a Byte Multiplexor.. Return STIDC data
174 * accordingly
175 * ISW 20080313
176 */
177 if(!chan)
178 {
179 chanid = CHANNEL_MPX;
180 }
181 else
182 {
183 chanid = CHANNEL_BMX;
184 }
185
186 /* Store the channel id word at PSA+X'A8' */
187 psa = (PSA_3XX*)(regs->mainstor + regs->PX);
188 STORE_FW(psa->chanid, chanid);
189
190 /* Exit with condition code 0 indicating channel id stored */
191 return 0;
192
193 } /* end function stchan_id */
194
195 /*-------------------------------------------------------------------*/
196 /* TEST CHANNEL */
197 /*-------------------------------------------------------------------*/
testch(REGS * regs,U16 chan)198 int testch (REGS *regs, U16 chan)
199 {
200 DEVBLK *dev; /* -> Device control block */
201 int devcount = 0; /* Number of devices found */
202 int cc = 0; /* Returned condition code */
203
204 /* Scan devices on the channel */
205 for (dev = sysblk.firstdev; dev != NULL; dev = dev->nextdev)
206 {
207 /* Skip the device if not on specified channel */
208 if ((dev->devnum & 0xFF00) != chan
209 || (dev->pmcw.flag5 & PMCW5_V) == 0
210 #if defined(FEATURE_CHANNEL_SWITCHING)
211 || regs->chanset != dev->chanset
212 #endif /*defined(FEATURE_CHANNEL_SWITCHING)*/
213 )
214 continue;
215
216 /* Increment device count on this channel */
217 devcount++;
218
219 /* Test for pending interrupt */
220 if (IOPENDING(dev))
221 {
222 cc = 1;
223 break;
224 }
225 }
226
227 /* Set condition code 3 if no devices found on the channel */
228 if (devcount == 0)
229 cc = 3;
230
231 return cc;
232
233 } /* end function testch */
234
235 /*-------------------------------------------------------------------*/
236 /* TEST I/O */
237 /*-------------------------------------------------------------------*/
testio(REGS * regs,DEVBLK * dev,BYTE ibyte)238 int testio (REGS *regs, DEVBLK *dev, BYTE ibyte)
239 {
240 int cc; /* Condition code */
241 PSA_3XX *psa; /* -> Prefixed storage area */
242 IOINT *ioint=NULL;
243
244 UNREFERENCED(ibyte);
245
246 if (dev->ccwtrace || dev->ccwstep)
247 logmsg (_("HHCCP051I %4.4X: Test I/O\n"), dev->devnum);
248
249 obtain_lock (&dev->lock);
250
251 /* Test device status and set condition code */
252 if ((dev->busy && dev->ioactive == DEV_SYS_LOCAL)
253 || dev->startpending)
254 {
255 /* Set condition code 2 if device is busy */
256 cc = 2;
257 }
258 else
259 {
260 if (IOPENDING(dev))
261 {
262 /* Set condition code 1 if interrupt pending */
263 cc = 1;
264
265 /* Store the channel status word at PSA+X'40' */
266 psa = (PSA_3XX*)(regs->mainstor + regs->PX);
267 if (dev->pcipending)
268 {
269 memcpy (psa->csw, dev->pcicsw, 8);
270 ioint=&dev->pciioint;
271 }
272 else
273 {
274 if(dev->pending)
275 {
276 memcpy (psa->csw, dev->csw, 8);
277 ioint=&dev->ioint;
278 }
279 else
280 {
281 memcpy (psa->csw, dev->attncsw, 8);
282 ioint=&dev->attnioint;
283 }
284 }
285
286 /* Signal console thread to redrive select */
287 if (dev->console)
288 {
289 SIGNAL_CONSOLE_THREAD();
290 }
291
292 if (dev->ccwtrace || dev->ccwstep)
293 display_csw (dev, psa->csw);
294 }
295 else
296 {
297 /* Set condition code 1 if device is LCS CTC */
298 if ( dev->ctctype == CTC_LCS )
299 {
300 cc = 1;
301 dev->csw[4] = 0;
302 dev->csw[5] = 0;
303 psa = (PSA_3XX*)(regs->mainstor + regs->PX);
304 memcpy (psa->csw, dev->csw, 8);
305 if (dev->ccwtrace)
306 {
307 logmsg(_("HHCCP052I TIO modification executed CC=1\n"));
308 display_csw (dev, dev->csw);
309 }
310 }
311 else
312 /* Set condition code 0 if device is available */
313 cc = 0;
314 }
315 }
316
317 /* Dequeue the interrupt */
318 if(ioint)
319 DEQUEUE_IO_INTERRUPT(ioint);
320
321 release_lock (&dev->lock);
322
323 /* Update interrupt status */
324 if(ioint)
325 {
326 OBTAIN_INTLOCK(regs);
327 UPDATE_IC_IOPENDING();
328 RELEASE_INTLOCK(regs);
329 }
330
331 /* Return the condition code */
332 return cc;
333
334 } /* end function testio */
335
336 /*-------------------------------------------------------------------*/
337 /* HALT I/O */
338 /*-------------------------------------------------------------------*/
haltio(REGS * regs,DEVBLK * dev,BYTE ibyte)339 int haltio (REGS *regs, DEVBLK *dev, BYTE ibyte)
340 {
341 int cc; /* Condition code */
342 PSA_3XX *psa; /* -> Prefixed storage area */
343 int pending = 0; /* New interrupt pending */
344
345 UNREFERENCED(ibyte);
346
347 if (dev->ccwtrace || dev->ccwstep)
348 logmsg (_("HHCCP053I %4.4X: Halt I/O\n"), dev->devnum);
349
350 obtain_lock (&dev->lock);
351
352 /* Test device status and set condition code */
353 if (dev->busy)
354 {
355 /* Invoke the provided halt_device routine @ISW */
356 /* if it has been provided by the handler @ISW */
357 /* code at init @ISW */
358 if(dev->halt_device!=NULL) /* @ISW */
359 { /* @ISW */
360 dev->halt_device(dev); /* @ISW */
361 psa = (PSA_3XX*)( regs->mainstor + regs->PX );
362 psa->csw[4] = 0; /* Store partial CSW */
363 psa->csw[5] = 0;
364 cc = 1; /* Set CC for CSW stored */
365 } /* @ISW */
366 else
367 {
368 /* Set condition code 2 if device is busy */
369 cc = 2;
370
371 /* Tell channel and device to halt */
372 dev->scsw.flag2 |= SCSW2_FC_HALT;
373
374 /* Clear pending interrupts */
375 dev->pending = dev->pcipending = dev->attnpending = 0;
376 }
377 }
378 else if (!IOPENDING(dev) && dev->ctctype != CTC_LCS)
379 {
380 /* Set condition code 1 */
381 cc = 1;
382
383 /* Store the channel status word at PSA+X'40' */
384 psa = (PSA_3XX*)(regs->mainstor + regs->PX);
385 memcpy (psa->csw, dev->csw, 8);
386
387 /* Set pending interrupt */
388 dev->pending = pending = 1;
389
390 if (dev->ccwtrace || dev->ccwstep)
391 display_csw (dev, dev->csw);
392 }
393 else
394 {
395 /* Set cc 1 if interrupt is not pending and LCS CTC */
396 if ( dev->ctctype == CTC_LCS )
397 {
398 cc = 1;
399 dev->csw[4] = 0;
400 dev->csw[5] = 0;
401 psa = (PSA_3XX*)(regs->mainstor + regs->PX);
402 memcpy (psa->csw, dev->csw, 8);
403 if (dev->ccwtrace)
404 {
405 logmsg(_("HHCCP054I HIO modification executed CC=1\n"));
406 display_csw (dev, dev->csw);
407 }
408 }
409 else
410 /* Set condition code 0 if interrupt is pending */
411 cc = 0;
412 }
413
414 /* For 3270 device, clear any pending input */
415 if (dev->devtype == 0x3270)
416 {
417 dev->readpending = 0;
418 dev->rlen3270 = 0;
419 }
420
421 /* Signal console thread to redrive select */
422 if (dev->console)
423 {
424 SIGNAL_CONSOLE_THREAD();
425 }
426
427 /* Queue the interrupt */
428 if (pending)
429 QUEUE_IO_INTERRUPT (&dev->ioint);
430
431 release_lock (&dev->lock);
432
433 /* Update interrupt status */
434 if (pending)
435 {
436 OBTAIN_INTLOCK(regs);
437 UPDATE_IC_IOPENDING();
438 RELEASE_INTLOCK(regs);
439 }
440
441 /* Return the condition code */
442 return cc;
443
444 } /* end function haltio */
445
446 /*-------------------------------------------------------------------*/
447 /* CANCEL SUBCHANNEL */
448 /*-------------------------------------------------------------------*/
449 /* Input */
450 /* regs -> CPU register context */
451 /* dev -> Device control block */
452 /* Return value */
453 /* The return value is the condition code for the XSCH */
454 /* 0=start function cancelled (not yet implemented) */
455 /* 1=status pending (no action taken) */
456 /* 2=function not applicable */
457 /*-------------------------------------------------------------------*/
cancel_subchan(REGS * regs,DEVBLK * dev)458 int cancel_subchan (REGS *regs, DEVBLK *dev)
459 {
460 int cc; /* Condition code */
461
462 UNREFERENCED(regs);
463
464 obtain_lock (&dev->lock);
465
466 #if defined(_FEATURE_IO_ASSIST)
467 if(SIE_MODE(regs)
468 && (regs->siebk->zone != dev->pmcw.zone
469 || !(dev->pmcw.flag27 & PMCW27_I)))
470 {
471 release_lock (&dev->lock);
472 longjmp(regs->progjmp,SIE_INTERCEPT_INST);
473 }
474 #endif
475
476 /* Check pending status */
477 if ((dev->pciscsw.flag3 & SCSW3_SC_PEND)
478 || (dev->scsw.flag3 & SCSW3_SC_PEND)
479 || (dev->attnscsw.flag3 & SCSW3_SC_PEND))
480 cc = 1;
481 else
482 {
483 cc = 2;
484 #if !defined(OPTION_FISHIO)
485 obtain_lock(&sysblk.ioqlock);
486 if(sysblk.ioq != NULL)
487 {
488 DEVBLK *tmp;
489
490 /* special case for head of queue */
491 if(sysblk.ioq == dev)
492 {
493 /* Remove device from the i/o queue */
494 sysblk.ioq = dev->nextioq;
495 cc = 0;
496 }
497 else
498 {
499 /* Search for device on i/o queue */
500 for(tmp = sysblk.ioq; tmp->nextioq != NULL && tmp->nextioq != dev; tmp = tmp->nextioq);
501 /* Remove from queue if found */
502 if(tmp->nextioq == dev)
503 {
504 tmp->nextioq = tmp->nextioq->nextioq;
505 cc = 0;
506 }
507 }
508
509 /* Reset the device */
510 if(!cc)
511 {
512 /* Terminate suspended channel program */
513 if (dev->scsw.flag3 & SCSW3_AC_SUSP)
514 {
515 dev->suspended = 0;
516 signal_condition (&dev->resumecond);
517 }
518
519 /* Reset the scsw */
520 dev->scsw.flag2 &= ~(SCSW2_AC_RESUM | SCSW2_FC_START | SCSW2_AC_START);
521 dev->scsw.flag3 &= ~(SCSW3_AC_SUSP);
522
523 /* Reset the device busy indicator */
524 dev->busy = dev->startpending = 0;
525
526 }
527 }
528 release_lock(&sysblk.ioqlock);
529 #endif /*!defined(OPTION_FISHIO)*/
530 }
531
532 release_lock (&dev->lock);
533
534 /* Return the condition code */
535 return cc;
536
537 } /* end function cancel_subchan */
538
539 /*-------------------------------------------------------------------*/
540 /* TEST SUBCHANNEL */
541 /*-------------------------------------------------------------------*/
542 /* Input */
543 /* regs -> CPU register context */
544 /* dev -> Device control block */
545 /* Output */
546 /* irb -> Interruption response block */
547 /* Return value */
548 /* The return value is the condition code for the TSCH */
549 /* instruction: 0=status was pending and is now cleared, */
550 /* 1=no status was pending. The IRB is updated in both cases. */
551 /*-------------------------------------------------------------------*/
test_subchan(REGS * regs,DEVBLK * dev,IRB * irb)552 int test_subchan (REGS *regs, DEVBLK *dev, IRB *irb)
553 {
554 int cc; /* Condition code */
555
556 #if defined(_FEATURE_IO_ASSIST)
557 UNREFERENCED(regs);
558 #endif
559
560 obtain_lock (&dev->lock);
561
562 #if defined(_FEATURE_IO_ASSIST)
563 if(SIE_MODE(regs)
564 && (regs->siebk->zone != dev->pmcw.zone
565 || !(dev->pmcw.flag27 & PMCW27_I)))
566 {
567 release_lock (&dev->lock);
568 longjmp(regs->progjmp,SIE_INTERCEPT_INST);
569 }
570 #endif
571
572 /* Return PCI SCSW if PCI status is pending */
573 if (dev->pciscsw.flag3 & SCSW3_SC_PEND)
574 {
575 #if defined(_FEATURE_IO_ASSIST)
576 /* For I/O assisted devices we must intercept if type B
577 status is present on the subchannel */
578 if(SIE_MODE(regs)
579 && ( (regs->siebk->tschds & dev->pciscsw.unitstat)
580 || (regs->siebk->tschsc & dev->pciscsw.chanstat) ) )
581 {
582 dev->pmcw.flag27 &= ~PMCW27_I;
583 release_lock (&dev->lock);
584 longjmp(regs->progjmp,SIE_INTERCEPT_IOINST);
585 }
586 #endif
587
588 /* Display the subchannel status word */
589 if (dev->ccwtrace || dev->ccwstep)
590 display_scsw (dev, dev->pciscsw);
591
592 /* Copy the PCI SCSW to the IRB */
593 irb->scsw = dev->pciscsw;
594
595 /* Clear the ESW and ECW in the IRB */
596 memset (&irb->esw, 0, sizeof(ESW));
597 irb->esw.lpum = 0x80;
598 memset (irb->ecw, 0, sizeof(irb->ecw));
599
600 /* Clear the pending PCI status */
601 dev->pciscsw.flag2 &= ~(SCSW2_FC | SCSW2_AC);
602 dev->pciscsw.flag3 &= ~(SCSW3_SC);
603 dev->pcipending = 0;
604
605 /* Dequeue the interrupt */
606 DEQUEUE_IO_INTERRUPT(&dev->pciioint);
607
608 release_lock (&dev->lock);
609
610 /* Update interrupt status */
611 OBTAIN_INTLOCK(regs);
612 UPDATE_IC_IOPENDING();
613 RELEASE_INTLOCK(regs);
614
615 /* Return condition code 0 to indicate status was pending */
616 return 0;
617
618 } /* end if(pcipending) */
619
620 /* Copy the subchannel status word to the IRB */
621 irb->scsw = dev->scsw;
622
623 /* Copy the extended status word to the IRB */
624 irb->esw = dev->esw;
625
626 /* Copy the extended control word to the IRB */
627 memcpy (irb->ecw, dev->ecw, sizeof(irb->ecw));
628
629 /* Test device status and set condition code */
630 if (dev->scsw.flag3 & SCSW3_SC_PEND)
631 {
632 #if defined(_FEATURE_IO_ASSIST)
633 /* For I/O assisted devices we must intercept if type B
634 status is present on the subchannel */
635 if(SIE_MODE(regs)
636 && ( (regs->siebk->tschds & dev->scsw.unitstat)
637 || (regs->siebk->tschsc & dev->scsw.chanstat) ) )
638 {
639 dev->pmcw.flag27 &= ~PMCW27_I;
640 release_lock (&dev->lock);
641 longjmp(regs->progjmp,SIE_INTERCEPT_IOINST);
642 }
643 #endif
644
645 /* Set condition code 0 for status pending */
646 cc = 0;
647
648 /* Display the subchannel status word */
649 if (dev->ccwtrace || dev->ccwstep)
650 display_scsw (dev, dev->scsw);
651
652 /* [14.3.13] If status is anything other than intermediate with
653 pending then clear the function control, activity control,
654 status control, and path not-operational bits in the SCSW */
655 if ((dev->scsw.flag3 & SCSW3_SC)
656 != (SCSW3_SC_INTER | SCSW3_SC_PEND))
657 {
658 dev->scsw.flag2 &= ~(SCSW2_FC | SCSW2_AC);
659 dev->scsw.flag3 &= ~(SCSW3_AC_SUSP);
660 dev->scsw.flag1 &= ~(SCSW1_N);
661 }
662 else
663 {
664 /* [14.3.13] Clear the function control bits if function
665 code is halt and the channel program is suspended */
666 if ((dev->scsw.flag2 & SCSW2_FC_HALT)
667 && (dev->scsw.flag3 & SCSW3_AC_SUSP))
668 dev->scsw.flag2 &= ~(SCSW2_FC);
669
670 /* [14.3.13] Clear the activity control bits if function
671 code is start+halt and channel program is suspended */
672 if ((dev->scsw.flag2 & (SCSW2_FC_START | SCSW2_FC_HALT))
673 == (SCSW2_FC_START | SCSW2_FC_HALT)
674 && (dev->scsw.flag3 & SCSW3_AC_SUSP))
675 {
676 dev->scsw.flag2 &= ~(SCSW2_AC);
677 dev->scsw.flag3 &= ~(SCSW3_AC_SUSP);
678 dev->scsw.flag1 &= ~(SCSW1_N);
679 }
680
681 /* [14.3.13] Clear the resume pending bit if function code
682 is start without halt and channel program suspended */
683 if ((dev->scsw.flag2 & (SCSW2_FC_START | SCSW2_FC_HALT))
684 == SCSW2_FC_START
685 && (dev->scsw.flag3 & SCSW3_AC_SUSP))
686 {
687 dev->scsw.flag2 &= ~(SCSW2_AC_RESUM);
688 dev->scsw.flag1 &= ~(SCSW1_N);
689 }
690
691 } /* end if(INTER+PEND) */
692
693 /* Clear the status bits in the SCSW */
694 dev->scsw.flag3 &= ~(SCSW3_SC);
695 }
696 else
697 {
698 /* Test device status and set condition code */
699 if (dev->attnscsw.flag3 & SCSW3_SC_PEND)
700 {
701 #if defined(_FEATURE_IO_ASSIST)
702 /* For I/O assisted devices we must intercept if type B
703 status is present on the subchannel */
704 if(SIE_MODE(regs)
705 && ( (regs->siebk->tschds & dev->attnscsw.unitstat)
706 || (regs->siebk->tschsc & dev->attnscsw.chanstat) ) )
707 {
708 dev->pmcw.flag27 &= ~PMCW27_I;
709 release_lock (&dev->lock);
710 longjmp(regs->progjmp,SIE_INTERCEPT_IOINST);
711 }
712 #endif
713 /* Set condition code 0 for status pending */
714 cc = 0;
715
716 /* Display the subchannel status word */
717 if (dev->ccwtrace || dev->ccwstep)
718 display_scsw (dev, dev->attnscsw);
719
720 /* Copy the ATTN SCSW to the IRB */
721 irb->scsw = dev->attnscsw;
722
723 /* Clear the ESW and ECW in the IRB */
724 memset (&irb->esw, 0, sizeof(ESW));
725 irb->esw.lpum = 0x80;
726 memset (irb->ecw, 0, sizeof(irb->ecw));
727 /* Clear the pending ATTN status */
728 dev->attnscsw.flag2 &= ~(SCSW2_FC | SCSW2_AC);
729 dev->attnscsw.flag3 &= ~(SCSW3_SC);
730 dev->attnpending = 0;
731
732 /* Dequeue the interrupt */
733 DEQUEUE_IO_INTERRUPT(&dev->attnioint);
734
735 release_lock (&dev->lock);
736
737 /* Update interrupt status */
738 OBTAIN_INTLOCK(regs);
739 UPDATE_IC_IOPENDING();
740 RELEASE_INTLOCK(regs);
741
742 /* Signal console thread to redrive select */
743 if (dev->console)
744 {
745 SIGNAL_CONSOLE_THREAD();
746 }
747
748 /* Return condition code 0 to indicate status was pending */
749 return 0;
750 }
751 else
752 {
753 /* Set condition code 1 if status not pending */
754 cc = 1;
755 }
756 }
757
758 /* Dequeue the interrupt */
759 DEQUEUE_IO_INTERRUPT(&dev->ioint);
760
761 release_lock (&dev->lock);
762
763 /* Update interrupt status */
764 OBTAIN_INTLOCK(regs);
765 UPDATE_IC_IOPENDING();
766 RELEASE_INTLOCK(regs);
767
768 /* Signal console thread to redrive select */
769 if (dev->console)
770 {
771 SIGNAL_CONSOLE_THREAD();
772 }
773
774 /* Return the condition code */
775 return cc;
776
777 } /* end function test_subchan */
778
779 /*-------------------------------------------------------------------*/
780 /* CLEAR SUBCHANNEL */
781 /*-------------------------------------------------------------------*/
782 /* Input */
783 /* regs -> CPU register context */
784 /* dev -> Device control block */
785 /*-------------------------------------------------------------------*/
clear_subchan(REGS * regs,DEVBLK * dev)786 void clear_subchan (REGS *regs, DEVBLK *dev)
787 {
788 int pending = 0;
789
790 UNREFERENCED(regs);
791
792 if (dev->ccwtrace || dev->ccwstep)
793 logmsg (_("HHCCP055I %4.4X: Clear subchannel\n"), dev->devnum);
794
795 obtain_lock (&dev->lock);
796
797 #if defined(_FEATURE_IO_ASSIST)
798 if(SIE_MODE(regs)
799 && (regs->siebk->zone != dev->pmcw.zone
800 || !(dev->pmcw.flag27 & PMCW27_I)))
801 {
802 release_lock (&dev->lock);
803 longjmp(regs->progjmp,SIE_INTERCEPT_INST);
804 }
805 #endif
806
807 /* If the device is busy then signal the device to clear */
808 if ((dev->busy && dev->ioactive == DEV_SYS_LOCAL)
809 || dev->startpending)
810 {
811 /* Set clear pending condition */
812 dev->scsw.flag2 |= SCSW2_FC_CLEAR | SCSW2_AC_CLEAR;
813
814 /* Signal the subchannel to resume if it is suspended */
815 if (dev->scsw.flag3 & SCSW3_AC_SUSP)
816 {
817 dev->scsw.flag2 |= SCSW2_AC_RESUM;
818 signal_condition (&dev->resumecond);
819 }
820 #if !defined(NO_SIGABEND_HANDLER)
821 else
822 {
823 if( dev->ctctype )
824 signal_thread(dev->tid, SIGUSR2);
825 }
826 #endif /*!defined(NO_SIGABEND_HANDLER)*/
827 }
828 else
829 {
830 /* [15.3.2] Perform clear function subchannel modification */
831 dev->pmcw.pom = 0xFF;
832 dev->pmcw.lpum = 0x00;
833 dev->pmcw.pnom = 0x00;
834
835 /* [15.3.3] Perform clear function signaling and completion */
836 dev->scsw.flag0 = 0;
837 dev->scsw.flag1 = 0;
838 dev->scsw.flag2 &= ~(SCSW2_FC | SCSW2_AC);
839 dev->scsw.flag2 |= SCSW2_FC_CLEAR;
840 dev->scsw.flag3 &= (~(SCSW3_AC | SCSW3_SC))&0xff;
841 dev->scsw.flag3 |= SCSW3_SC_PEND;
842 store_fw (dev->scsw.ccwaddr, 0);
843 dev->scsw.chanstat = 0;
844 dev->scsw.unitstat = 0;
845 store_hw (dev->scsw.count, 0);
846 dev->pcipending = 0;
847 dev->pending = 1;
848 pending = 1;
849
850 /* For 3270 device, clear any pending input */
851 if (dev->devtype == 0x3270)
852 {
853 dev->readpending = 0;
854 dev->rlen3270 = 0;
855 }
856
857 /* Signal console thread to redrive select */
858 if (dev->console)
859 {
860 SIGNAL_CONSOLE_THREAD();
861 }
862 }
863
864 /* Queue any pending i/o interrupt */
865 if (pending)
866 QUEUE_IO_INTERRUPT (&dev->ioint);
867
868 release_lock (&dev->lock);
869
870 /* Update interrupt status */
871 if (pending)
872 {
873 OBTAIN_INTLOCK(regs);
874 UPDATE_IC_IOPENDING();
875 RELEASE_INTLOCK(regs);
876 }
877
878 } /* end function clear_subchan */
879
880 /*-------------------------------------------------------------------*/
881 /* HALT SUBCHANNEL */
882 /*-------------------------------------------------------------------*/
883 /* Input */
884 /* regs -> CPU register context */
885 /* dev -> Device control block */
886 /* Return value */
887 /* The return value is the condition code for the HSCH */
888 /* instruction: 0=Halt initiated, 1=Non-intermediate status */
889 /* pending, 2=Busy */
890 /*-------------------------------------------------------------------*/
halt_subchan(REGS * regs,DEVBLK * dev)891 int halt_subchan (REGS *regs, DEVBLK *dev)
892 {
893 int pending = 0;
894
895 UNREFERENCED(regs);
896
897 if (dev->ccwtrace || dev->ccwstep)
898 logmsg (_("HHCCP056I %4.4X: Halt subchannel\n"), dev->devnum);
899
900 obtain_lock (&dev->lock);
901
902 #if defined(_FEATURE_IO_ASSIST)
903 if(SIE_MODE(regs)
904 && (regs->siebk->zone != dev->pmcw.zone
905 || !(dev->pmcw.flag27 & PMCW27_I)))
906 {
907 release_lock (&dev->lock);
908 longjmp(regs->progjmp,SIE_INTERCEPT_INST);
909 }
910 #endif
911
912 /* Set condition code 1 if subchannel is status pending alone or
913 is status pending with alert, primary, or secondary status */
914 if ((dev->scsw.flag3 & SCSW3_SC) == SCSW3_SC_PEND
915 || ((dev->scsw.flag3 & SCSW3_SC_PEND)
916 && (dev->scsw.flag3 &
917 (SCSW3_SC_ALERT | SCSW3_SC_PRI | SCSW3_SC_SEC))))
918 {
919 if (dev->ccwtrace || dev->ccwstep)
920 logmsg (_("HHCCP057I %4.4X: Halt subchannel: cc=1\n"), dev->devnum);
921 release_lock (&dev->lock);
922 return 1;
923 }
924
925 /* Set condition code 2 if the halt function or the clear
926 function is already in progress at the subchannel */
927 if (dev->scsw.flag2 & (SCSW2_AC_HALT | SCSW2_AC_CLEAR))
928 {
929 if (dev->ccwtrace || dev->ccwstep)
930 logmsg (_("HHCCP058I %4.4X: Halt subchannel: cc=2\n"), dev->devnum);
931 release_lock (&dev->lock);
932 return 2;
933 }
934
935 /* If the device is busy then signal subchannel to halt */
936 if ((dev->busy && dev->ioactive == DEV_SYS_LOCAL)
937 || dev->startpending || dev->suspended)
938 {
939 /* Set halt pending condition and reset pending condition */
940 dev->scsw.flag2 |= (SCSW2_FC_HALT | SCSW2_AC_HALT);
941 dev->scsw.flag3 &= ~SCSW3_SC_PEND;
942
943 /* Clear any pending interrupt */
944 dev->pending = dev->pcipending = dev->attnpending = 0;
945
946 /* Signal the subchannel to resume if it is suspended */
947 if (dev->scsw.flag3 & SCSW3_AC_SUSP)
948 {
949 dev->scsw.flag2 |= SCSW2_AC_RESUM;
950 signal_condition (&dev->resumecond);
951 }
952
953 #if !defined(OPTION_FISHIO)
954 /* Remove the device from the ioq if startpending */
955 obtain_lock(&sysblk.ioqlock);
956 if(dev->startpending)
957 {
958 if(sysblk.ioq == dev)
959 sysblk.ioq = dev->nextioq;
960 else if ( sysblk.ioq != NULL ) /* add check for empty IOQ */
961 {
962 DEVBLK *tmp;
963 for(tmp = sysblk.ioq; tmp->nextioq != NULL && tmp->nextioq != dev; tmp = tmp->nextioq);
964 if(tmp->nextioq == dev)
965 tmp->nextioq = tmp->nextioq->nextioq;
966 }
967 }
968 dev->startpending = 0;
969 release_lock(&sysblk.ioqlock);
970 #endif /*!defined(OPTION_FISHIO)*/
971
972 /* Invoke the provided halt_device routine @ISW */
973 /* if it has been provided by the handler @ISW */
974 /* code at init @ISW */
975 if(dev->halt_device!=NULL) /* @ISW */
976 { /* @ISW */
977 dev->halt_device(dev); /* @ISW */
978 } /* @ISW */
979 #if !defined(NO_SIGABEND_HANDLER)
980 else
981 {
982 if( dev->ctctype && dev->tid)
983 signal_thread(dev->tid, SIGUSR2);
984 }
985 #endif /*!defined(NO_SIGABEND_HANDLER)*/
986 }
987 else
988 {
989 /* [15.4.2] Perform halt function signaling and completion */
990 dev->scsw.flag2 |= SCSW2_FC_HALT;
991 dev->scsw.flag3 |= SCSW3_SC_PEND;
992 dev->pcipending = 0;
993 dev->pending = 1;
994 pending = 1;
995
996 /* For 3270 device, clear any pending input */
997 if (dev->devtype == 0x3270)
998 {
999 dev->readpending = 0;
1000 dev->rlen3270 = 0;
1001 }
1002
1003 /* Signal console thread to redrive select */
1004 if (dev->console)
1005 {
1006 SIGNAL_CONSOLE_THREAD();
1007 }
1008 }
1009
1010 /* Queue any pending i/o interrupt */
1011 if (pending)
1012 QUEUE_IO_INTERRUPT (&dev->ioint);
1013
1014 release_lock (&dev->lock);
1015
1016 /* Update interrupt status */
1017 if (pending)
1018 {
1019 OBTAIN_INTLOCK(regs);
1020 UPDATE_IC_IOPENDING();
1021 RELEASE_INTLOCK(regs);
1022 }
1023
1024 if (dev->ccwtrace || dev->ccwstep)
1025 logmsg (_("HHCCP059I %4.4X: Halt subchannel: cc=0\n"), dev->devnum);
1026
1027 /* Return condition code zero */
1028 return 0;
1029
1030 } /* end function halt_subchan */
1031
1032 /*-------------------------------------------------------------------*/
1033 /* RESUME SUBCHANNEL */
1034 /*-------------------------------------------------------------------*/
1035 /* Input */
1036 /* regs -> CPU register context */
1037 /* dev -> Device control block */
1038 /* Return value */
1039 /* The return value is the condition code for the RSCH */
1040 /* instruction: 0=subchannel has been made resume pending, */
1041 /* 1=status was pending, 2=resume not allowed */
1042 /*-------------------------------------------------------------------*/
resume_subchan(REGS * regs,DEVBLK * dev)1043 int resume_subchan (REGS *regs, DEVBLK *dev)
1044 {
1045 UNREFERENCED(regs);
1046
1047 obtain_lock (&dev->lock);
1048
1049 #if defined(_FEATURE_IO_ASSIST)
1050 if(SIE_MODE(regs)
1051 && (regs->siebk->zone != dev->pmcw.zone
1052 || !(dev->pmcw.flag27 & PMCW27_I)))
1053 {
1054 release_lock (&dev->lock);
1055 longjmp(regs->progjmp,SIE_INTERCEPT_INST);
1056 }
1057 #endif
1058
1059 /* Set condition code 1 if subchannel has status pending */
1060 if (dev->scsw.flag3 & SCSW3_SC_PEND)
1061 {
1062 if (dev->ccwtrace || dev->ccwstep)
1063 logmsg (_("HHCCP060I %4.4X: Resume subchannel: cc=1\n"),
1064 dev->devnum);
1065 release_lock (&dev->lock);
1066 return 1;
1067 }
1068
1069 /* Set condition code 2 if subchannel has any function other
1070 than the start function alone, is already resume pending,
1071 or the ORB for the SSCH did not specify suspend control */
1072 if ((dev->scsw.flag2 & SCSW2_FC) != SCSW2_FC_START
1073 || (dev->scsw.flag2 & SCSW2_AC_RESUM)
1074 || (dev->scsw.flag0 & SCSW0_S) == 0)
1075 {
1076 if (dev->ccwtrace || dev->ccwstep)
1077 logmsg (_("HHCCP061I %4.4X: Resume subchannel: cc=2\n"),
1078 dev->devnum);
1079 release_lock (&dev->lock);
1080 return 2;
1081 }
1082
1083 /* Clear the path not-operational mask if in suspend state */
1084 if (dev->scsw.flag3 & SCSW3_AC_SUSP)
1085 dev->pmcw.pnom = 0x00;
1086
1087 /* Signal console thread to redrive select */
1088 if (dev->console)
1089 {
1090 SIGNAL_CONSOLE_THREAD();
1091 }
1092
1093 /* Set the resume pending flag and signal the subchannel */
1094 dev->scsw.flag2 |= SCSW2_AC_RESUM;
1095 signal_condition (&dev->resumecond);
1096
1097 release_lock (&dev->lock);
1098
1099 if (dev->ccwtrace || dev->ccwstep)
1100 logmsg (_("HHCCP062I %4.4X: Resume subchannel: cc=0\n"), dev->devnum);
1101
1102 /* Return condition code zero */
1103 return 0;
1104
1105 } /* end function resume_subchan */
1106
1107 /*-------------------------------------------------------------------*/
1108 /* Reset a device to initialized status */
1109 /* */
1110 /* Called by: */
1111 /* channelset_reset */
1112 /* chp_reset */
1113 /* io_reset */
1114 /* */
1115 /* Caller holds `intlock' */
1116 /*-------------------------------------------------------------------*/
device_reset(DEVBLK * dev)1117 void device_reset (DEVBLK *dev)
1118 {
1119 obtain_lock (&dev->lock);
1120
1121 obtain_lock(&sysblk.iointqlk);
1122 DEQUEUE_IO_INTERRUPT_QLOCKED(&dev->ioint);
1123 DEQUEUE_IO_INTERRUPT_QLOCKED(&dev->pciioint);
1124 DEQUEUE_IO_INTERRUPT_QLOCKED(&dev->attnioint);
1125 release_lock(&sysblk.iointqlk);
1126
1127 dev->busy = dev->reserved = dev->pending = dev->pcipending =
1128 dev->attnpending = dev->startpending = 0;
1129 dev->ioactive = DEV_SYS_NONE;
1130 if (dev->suspended)
1131 {
1132 dev->suspended = 0;
1133 signal_condition (&dev->resumecond);
1134 }
1135 if (dev->iowaiters) signal_condition (&dev->iocond);
1136 store_fw (dev->pmcw.intparm, 0);
1137 dev->pmcw.flag4 &= ~PMCW4_ISC;
1138 dev->pmcw.flag5 &= ~(PMCW5_E | PMCW5_LM | PMCW5_MM | PMCW5_D);
1139 dev->pmcw.pnom = 0;
1140 dev->pmcw.lpum = 0;
1141 store_hw (dev->pmcw.mbi, 0);
1142 dev->pmcw.flag27 &= ~PMCW27_S;
1143 #if defined(_FEATURE_IO_ASSIST)
1144 dev->pmcw.zone = 0;
1145 dev->pmcw.flag25 &= ~PMCW25_VISC;
1146 dev->pmcw.flag27 &= ~PMCW27_I;
1147 #endif
1148 memset (&dev->scsw, 0, sizeof(SCSW));
1149 memset (&dev->pciscsw, 0, sizeof(SCSW));
1150 memset (&dev->attnscsw, 0, sizeof(SCSW));
1151
1152 dev->readpending = 0;
1153 dev->crwpending = 0;
1154 dev->ckdxtdef = 0;
1155 dev->ckdsetfm = 0;
1156 dev->ckdlcount = 0;
1157 dev->ckdssi = 0;
1158 memset (dev->sense, 0, sizeof(dev->sense));
1159 dev->sns_pending = 0;
1160 memset (dev->pgid, 0, sizeof(dev->pgid));
1161 /* By Adrian - Reset drive password */
1162 memset (dev->drvpwd, 0, sizeof(dev->drvpwd));
1163
1164 #if defined(_FEATURE_IO_ASSIST)
1165 dev->mainstor = sysblk.mainstor;
1166 dev->storkeys = sysblk.storkeys;
1167 dev->mainlim = sysblk.mainsize - 1;
1168 #endif
1169 dev->ioint.dev = dev;
1170 dev->ioint.pending = 1;
1171 dev->pciioint.dev = dev;
1172 dev->pciioint.pcipending = 1;
1173 dev->attnioint.dev = dev;
1174 dev->attnioint.attnpending = 1;
1175
1176 #if defined(FEATURE_VM_BLOCKIO)
1177 if (dev->vmd250env)
1178 {
1179 free(dev->vmd250env);
1180 dev->vmd250env = 0 ;
1181 }
1182 #endif /* defined(FEATURE_VM_BLOCKIO) */
1183
1184 release_lock (&dev->lock);
1185 } /* end device_reset() */
1186
1187 /*-------------------------------------------------------------------*/
1188 /* Reset all devices on a particular channelset */
1189 /* */
1190 /* Called by: */
1191 /* SIGP_IMPL (control.c) */
1192 /* SIGP_IPR (control.c) */
1193 /*-------------------------------------------------------------------*/
channelset_reset(REGS * regs)1194 void channelset_reset(REGS *regs)
1195 {
1196 DEVBLK *dev; /* -> Device control block */
1197 int console = 0; /* 1 = console device reset */
1198
1199 /* Reset each device in the configuration */
1200 for (dev = sysblk.firstdev; dev != NULL; dev = dev->nextdev)
1201 {
1202 if( regs->chanset == dev->chanset)
1203 {
1204 if (dev->console) console = 1;
1205 device_reset(dev);
1206 }
1207 }
1208
1209 /* Signal console thread to redrive select */
1210 if (console)
1211 SIGNAL_CONSOLE_THREAD();
1212
1213 } /* end function channelset_reset */
1214
1215 /*-------------------------------------------------------------------*/
1216 /* Reset all devices on a particular chpid */
1217 /* */
1218 /* Called by: */
1219 /* RHCP (Reset Channel Path) (io.c) */
1220 /*-------------------------------------------------------------------*/
chp_reset(REGS * regs,BYTE chpid)1221 int chp_reset(REGS *regs, BYTE chpid)
1222 {
1223 DEVBLK *dev; /* -> Device control block */
1224 int i;
1225 int operational = 3;
1226 int console = 0;
1227
1228 OBTAIN_INTLOCK(regs);
1229
1230 /* Reset each device in the configuration */
1231 for (dev = sysblk.firstdev; dev != NULL; dev = dev->nextdev)
1232 {
1233 for(i = 0; i < 8; i++)
1234 {
1235 if((chpid == dev->pmcw.chpid[i])
1236 && (dev->pmcw.pim & dev->pmcw.pam & dev->pmcw.pom & (0x80 >> i)) )
1237 {
1238 operational = 0;
1239 if (dev->console) console = 1;
1240 device_reset(dev);
1241 }
1242 }
1243 }
1244
1245 /* Signal console thread to redrive select */
1246 if (console)
1247 SIGNAL_CONSOLE_THREAD();
1248
1249 RELEASE_INTLOCK(regs);
1250
1251 return operational;
1252
1253 } /* end function chp_reset */
1254
1255
1256 /*-------------------------------------------------------------------*/
1257 /* I/O RESET */
1258 /* Resets status of all devices ready for IPL. Note that device */
1259 /* positioning is not affected by I/O reset; thus the system can */
1260 /* be IPLed from current position in a tape or card reader file. */
1261 /* */
1262 /* Caller holds `intlock' */
1263 /*-------------------------------------------------------------------*/
1264 void
io_reset(void)1265 io_reset (void)
1266 {
1267 DEVBLK *dev; /* -> Device control block */
1268 int console = 0; /* 1 = console device reset */
1269 int i;
1270
1271 /* reset sclp interface */
1272 sclp_reset();
1273
1274 /* Connect each channel set to its home cpu */
1275 for (i = 0; i < MAX_CPU; i++)
1276 if (IS_CPU_ONLINE(i))
1277 sysblk.regs[i]->chanset = i < FEATURE_LCSS_MAX ? i : 0xFFFF;
1278
1279 /* Reset each device in the configuration */
1280 for (dev = sysblk.firstdev; dev != NULL; dev = dev->nextdev)
1281 {
1282 if (dev->console) console = 1;
1283 device_reset(dev);
1284 }
1285
1286 /* No crws pending anymore */
1287 OFF_IC_CHANRPT;
1288
1289 /* Signal console thread to redrive select */
1290 if (console)
1291 SIGNAL_CONSOLE_THREAD();
1292
1293 } /* end function io_reset */
1294
1295
1296 #if !defined(OPTION_FISHIO)
1297 /*-------------------------------------------------------------------*/
1298 /* Set a thread's priority to its proper value */
1299 /*-------------------------------------------------------------------*/
adjust_thread_priority(int * newprio)1300 void adjust_thread_priority(int *newprio)
1301 {
1302 /* Set root mode in order to set priority */
1303 SETMODE(ROOT);
1304
1305 /* Set device thread priority; ignore any errors */
1306 setpriority(PRIO_PROCESS, 0, *newprio);
1307
1308 /* Back to user mode */
1309 SETMODE(USER);
1310 }
1311
1312 /*-------------------------------------------------------------------*/
1313 /* Execute a queued I/O */
1314 /*-------------------------------------------------------------------*/
device_thread(void * arg)1315 void *device_thread (void *arg)
1316 {
1317 char thread_name[32];
1318 DEVBLK *dev;
1319 int current_priority; /* Current thread priority */
1320
1321 UNREFERENCED(arg);
1322
1323 adjust_thread_priority(&sysblk.devprio);
1324 current_priority = getpriority(PRIO_PROCESS, 0);
1325
1326 obtain_lock(&sysblk.ioqlock);
1327
1328 sysblk.devtnbr++;
1329 if (sysblk.devtnbr > sysblk.devthwm)
1330 sysblk.devthwm = sysblk.devtnbr;
1331
1332 while (1)
1333 {
1334 while ((dev=sysblk.ioq) != NULL)
1335 {
1336 snprintf ( thread_name, sizeof(thread_name),
1337 "device %4.4X thread", dev->devnum );
1338 thread_name[sizeof(thread_name)-1]=0;
1339 SET_THREAD_NAME(thread_name);
1340
1341 sysblk.ioq = dev->nextioq;
1342 dev->tid = thread_id();
1343
1344 /* Set priority to requested device priority */
1345 if (dev->devprio != current_priority)
1346 adjust_thread_priority(&dev->devprio);
1347 current_priority = dev->devprio;
1348
1349 release_lock (&sysblk.ioqlock);
1350
1351 call_execute_ccw_chain(sysblk.arch_mode, dev);
1352
1353 obtain_lock(&sysblk.ioqlock);
1354 dev->tid = 0;
1355 }
1356
1357 SET_THREAD_NAME("idle device thread");
1358
1359 if (sysblk.devtmax < 0
1360 || (sysblk.devtmax == 0 && sysblk.devtwait > 3)
1361 || (sysblk.devtmax > 0 && sysblk.devtnbr > sysblk.devtmax)
1362 || (sysblk.shutdown))
1363 break;
1364
1365 /* Wait for work to arrive */
1366 sysblk.devtwait++;
1367 wait_condition (&sysblk.ioqcond, &sysblk.ioqlock);
1368 }
1369
1370 sysblk.devtnbr--;
1371 release_lock (&sysblk.ioqlock);
1372 return NULL;
1373
1374 } /* end function device_thread */
1375
1376 #endif // !defined(OPTION_FISHIO)
1377
1378 #endif /*!defined(_CHANNEL_C)*/
1379
1380 /*-------------------------------------------------------------------*/
1381 /* RAISE A PCI INTERRUPT */
1382 /* This function is called during execution of a channel program */
1383 /* whenever a CCW is fetched which has the CCW_FLAGS_PCI flag set */
1384 /*-------------------------------------------------------------------*/
1385 /* Input */
1386 /* dev -> Device control block */
1387 /* ccwkey = Key in which channel program is executing */
1388 /* ccwfmt = CCW format (0 or 1) */
1389 /* ccwaddr = Address of next CCW */
1390 /* Output */
1391 /* The PCI CSW or SCSW is saved in the device block, and the */
1392 /* pcipending flag is set, and an I/O interrupt is scheduled. */
1393 /*-------------------------------------------------------------------*/
ARCH_DEP(raise_pci)1394 static void ARCH_DEP(raise_pci) (
1395 DEVBLK *dev, /* -> Device block */
1396 BYTE ccwkey, /* Bits 0-3=key, 4-7=zeroes */
1397 BYTE ccwfmt, /* CCW format (0 or 1) */
1398 U32 ccwaddr) /* Main storage addr of CCW */
1399 {
1400 #if !defined(FEATURE_CHANNEL_SUBSYSTEM)
1401 UNREFERENCED(ccwfmt);
1402 #endif
1403
1404 IODELAY(dev);
1405
1406 obtain_lock (&dev->lock);
1407
1408 #ifdef FEATURE_S370_CHANNEL
1409 /* Save the PCI CSW replacing any previous pending PCI */
1410 dev->pcicsw[0] = ccwkey;
1411 dev->pcicsw[1] = (ccwaddr & 0xFF0000) >> 16;
1412 dev->pcicsw[2] = (ccwaddr & 0xFF00) >> 8;
1413 dev->pcicsw[3] = ccwaddr & 0xFF;
1414 dev->pcicsw[4] = 0;
1415 dev->pcicsw[5] = CSW_PCI;
1416 dev->pcicsw[6] = 0;
1417 dev->pcicsw[7] = 0;
1418 #endif /*FEATURE_S370_CHANNEL*/
1419
1420 #ifdef FEATURE_CHANNEL_SUBSYSTEM
1421 dev->pciscsw.flag0 = ccwkey & SCSW0_KEY;
1422 dev->pciscsw.flag1 = (ccwfmt == 1 ? SCSW1_F : 0);
1423 dev->pciscsw.flag2 = SCSW2_FC_START;
1424 dev->pciscsw.flag3 = SCSW3_AC_SCHAC | SCSW3_AC_DEVAC
1425 | SCSW3_SC_INTER | SCSW3_SC_PEND;
1426 STORE_FW(dev->pciscsw.ccwaddr,ccwaddr);
1427 dev->pciscsw.unitstat = 0;
1428 dev->pciscsw.chanstat = CSW_PCI;
1429 store_hw (dev->pciscsw.count, 0);
1430 #endif /*FEATURE_CHANNEL_SUBSYSTEM*/
1431
1432 /* Queue the PCI pending interrupt */
1433 QUEUE_IO_INTERRUPT(&dev->pciioint);
1434 release_lock (&dev->lock);
1435
1436 /* Update interrupt status */
1437 OBTAIN_INTLOCK(devregs(dev));
1438 UPDATE_IC_IOPENDING();
1439 RELEASE_INTLOCK(devregs(dev));
1440
1441 } /* end function raise_pci */
1442
1443
1444 /*-------------------------------------------------------------------*/
1445 /* FETCH A CHANNEL COMMAND WORD FROM MAIN STORAGE */
1446 /*-------------------------------------------------------------------*/
ARCH_DEP(fetch_ccw)1447 static void ARCH_DEP(fetch_ccw) (
1448 DEVBLK *dev, /* -> Device block */
1449 BYTE ccwkey, /* Bits 0-3=key, 4-7=zeroes */
1450 BYTE ccwfmt, /* CCW format (0 or 1) @IWZ*/
1451 U32 ccwaddr, /* Main storage addr of CCW */
1452 BYTE *code, /* Returned operation code */
1453 U32 *addr, /* Returned data address */
1454 BYTE *flags, /* Returned flags */
1455 U16 *count, /* Returned data count */
1456 BYTE *chanstat) /* Returned channel status */
1457 {
1458 BYTE storkey; /* Storage key */
1459 BYTE *ccw; /* CCW pointer */
1460
1461 UNREFERENCED_370(dev);
1462 *code=0;
1463 *count=0;
1464 *flags=0;
1465 *addr=0;
1466
1467 /* Channel program check if CCW is not on a doubleword
1468 boundary or is outside limit of main storage */
1469 if ( (ccwaddr & 0x00000007) || CHADDRCHK(ccwaddr, dev) )
1470 {
1471 *chanstat = CSW_PROGC;
1472 return;
1473 }
1474
1475 /* Channel protection check if CCW is fetch protected */
1476 storkey = STORAGE_KEY(ccwaddr, dev);
1477 if (ccwkey != 0 && (storkey & STORKEY_FETCH)
1478 && (storkey & STORKEY_KEY) != ccwkey)
1479 {
1480 *chanstat = CSW_PROTC;
1481 return;
1482 }
1483
1484 /* Set the main storage reference bit for the CCW location */
1485 STORAGE_KEY(ccwaddr, dev) |= STORKEY_REF;
1486
1487 /* Point to the CCW in main storage */
1488 ccw = dev->mainstor + ccwaddr;
1489
1490 /* Extract CCW opcode, flags, byte count, and data address */
1491 if (ccwfmt == 0)
1492 {
1493 *code = ccw[0];
1494 *addr = ((U32)(ccw[1]) << 16) | ((U32)(ccw[2]) << 8)
1495 | ccw[3];
1496 *flags = ccw[4];
1497 *count = ((U16)(ccw[6]) << 8) | ccw[7];
1498 }
1499 else
1500 {
1501 *code = ccw[0];
1502 *flags = ccw[1];
1503 *count = ((U16)(ccw[2]) << 8) | ccw[3];
1504 *addr = ((U32)(ccw[4]) << 24) | ((U32)(ccw[5]) << 16)
1505 | ((U32)(ccw[6]) << 8) | ccw[7];
1506 }
1507
1508 } /* end function fetch_ccw */
1509
1510 /*-------------------------------------------------------------------*/
1511 /* FETCH AN INDIRECT DATA ADDRESS WORD FROM MAIN STORAGE */
1512 /*-------------------------------------------------------------------*/
ARCH_DEP(fetch_idaw)1513 static void ARCH_DEP(fetch_idaw) (
1514 DEVBLK *dev, /* -> Device block */
1515 BYTE code, /* CCW operation code */
1516 BYTE ccwkey, /* Bits 0-3=key, 4-7=zeroes */
1517 BYTE idawfmt, /* IDAW format (1 or 2) @IWZ*/
1518 U16 idapmask, /* IDA page size - 1 @IWZ*/
1519 int idaseq, /* 0=1st IDAW */
1520 U32 idawaddr, /* Main storage addr of IDAW */
1521 RADR *addr, /* Returned IDAW content @IWZ*/
1522 U16 *len, /* Returned IDA data length */
1523 BYTE *chanstat) /* Returned channel status */
1524 {
1525 RADR idaw; /* Contents of IDAW @IWZ*/
1526 U32 idaw1; /* Format-1 IDAW @IWZ*/
1527 U64 idaw2; /* Format-2 IDAW @IWZ*/
1528 RADR idapage; /* Addr of next IDA page @IWZ*/
1529 U16 idalen; /* #of bytes until next page */
1530 BYTE storkey; /* Storage key */
1531
1532 UNREFERENCED_370(dev);
1533 *addr = 0;
1534 *len = 0;
1535
1536 /* Channel program check if IDAW is not on correct @IWZ
1537 boundary or is outside limit of main storage */
1538 if ((idawaddr & ((idawfmt == 2) ? 0x07 : 0x03)) /*@IWZ*/
1539 || CHADDRCHK(idawaddr, dev) )
1540 {
1541 *chanstat = CSW_PROGC;
1542 return;
1543 }
1544
1545 /* Channel protection check if IDAW is fetch protected */
1546 storkey = STORAGE_KEY(idawaddr, dev);
1547 if (ccwkey != 0 && (storkey & STORKEY_FETCH)
1548 && (storkey & STORKEY_KEY) != ccwkey)
1549 {
1550 *chanstat = CSW_PROTC;
1551 return;
1552 }
1553
1554 /* Set the main storage reference bit for the IDAW location */
1555 STORAGE_KEY(idawaddr, dev) |= STORKEY_REF;
1556
1557 /* Fetch IDAW from main storage */
1558 if (idawfmt == 2) /*@IWZ*/
1559 { /*@IWZ*/
1560 /* Fetch format-2 IDAW */ /*@IWZ*/
1561 FETCH_DW(idaw2, dev->mainstor + idawaddr); /*@IWZ*/
1562
1563 #ifndef FEATURE_ESAME /*@IWZ*/
1564 /* Channel program check in ESA/390 mode
1565 if the format-2 IDAW exceeds 2GB-1 */ /*@IWZ*/
1566 if (idaw2 > 0x7FFFFFFF) /*@IWZ*/
1567 { /*@IWZ*/
1568 *chanstat = CSW_PROGC; /*@IWZ*/
1569 return; /*@IWZ*/
1570 } /*@IWZ*/
1571 #endif /*!FEATURE_ESAME*/ /*@IWZ*/
1572
1573 /* Save contents of format-2 IDAW */ /*@IWZ*/
1574 idaw = idaw2; /*@IWZ*/
1575 } /*@IWZ*/
1576 else /*@IWZ*/
1577 { /*@IWZ*/
1578 /* Fetch format-1 IDAW */ /*@IWZ*/
1579 FETCH_FW(idaw1, dev->mainstor + idawaddr); /*@IWZ*/
1580
1581 /* Channel program check if bit 0 of
1582 the format-1 IDAW is not zero */ /*@IWZ*/
1583 if (idaw1 & 0x80000000) /*@IWZ*/
1584 { /*@IWZ*/
1585 *chanstat = CSW_PROGC; /*@IWZ*/
1586 return; /*@IWZ*/
1587 } /*@IWZ*/
1588
1589 /* Save contents of format-1 IDAW */ /*@IWZ*/
1590 idaw = idaw1; /*@IWZ*/
1591 } /*@IWZ*/
1592
1593 /* Channel program check if IDAW data
1594 location is outside main storage */
1595 if ( CHADDRCHK(idaw, dev) )
1596 {
1597 *chanstat = CSW_PROGC;
1598 return;
1599 }
1600
1601 /* Channel program check if IDAW data location is not
1602 on a page boundary, except for the first IDAW */ /*@IWZ*/
1603 if (IS_CCW_RDBACK (code))
1604 {
1605 if (idaseq > 0 && ((idaw+1) & idapmask) != 0)
1606 {
1607 *chanstat = CSW_PROGC;
1608 return;
1609 }
1610
1611 /* Calculate address of next page boundary */
1612 idapage = (idaw & ~idapmask);
1613 idalen = (idaw - idapage) + 1;
1614
1615 /* Return the address and length for this IDAW */
1616 *addr = idaw;
1617 *len = idalen;
1618 }
1619 else
1620 {
1621 if (idaseq > 0 && (idaw & idapmask) != 0) /*@IWZ*/
1622 {
1623 *chanstat = CSW_PROGC;
1624 return;
1625 }
1626
1627 /* Calculate address of next page boundary */ /*@IWZ*/
1628 idapage = (idaw + idapmask + 1) & ~idapmask; /*@IWZ*/
1629 idalen = idapage - idaw;
1630
1631 /* Return the address and length for this IDAW */
1632 *addr = idaw;
1633 *len = idalen;
1634 }
1635
1636 } /* end function fetch_idaw */
1637
1638 #if defined(FEATURE_MIDAW) /*@MW*/
1639 /*-------------------------------------------------------------------*/
1640 /* FETCH A MODIFIED INDIRECT DATA ADDRESS WORD FROM MAIN STORAGE @MW*/
1641 /*-------------------------------------------------------------------*/
ARCH_DEP(fetch_midaw)1642 static void ARCH_DEP(fetch_midaw) ( /*@MW*/
1643 DEVBLK *dev, /* -> Device block */
1644 BYTE code, /* CCW operation code */
1645 BYTE ccwkey, /* Bits 0-3=key, 4-7=zeroes */
1646 int midawseq, /* 0=1st MIDAW */
1647 U32 midawadr, /* Main storage addr of MIDAW*/
1648 RADR *addr, /* Returned MIDAW content */
1649 U16 *len, /* Returned MIDAW data length*/
1650 BYTE *flags, /* Returned MIDAW flags */
1651 BYTE *chanstat) /* Returned channel status */
1652 {
1653 U64 mword1, mword2; /* MIDAW high and low words */
1654 RADR mdaddr; /* Data address from MIDAW */
1655 U16 mcount; /* Count field from MIDAW */
1656 BYTE mflags; /* Flags byte from MIDAW */
1657 BYTE storkey; /* Storage key */
1658 U16 maxlen; /* Maximum allowable length */
1659
1660 UNREFERENCED_370(dev);
1661
1662 /* Channel program check if MIDAW is not on quadword
1663 boundary or is outside limit of main storage */
1664 if ((midawadr & 0x0F)
1665 || CHADDRCHK(midawadr, dev) )
1666 {
1667 *chanstat = CSW_PROGC;
1668 return;
1669 }
1670
1671 /* Channel program check if MIDAW list crosses a page boundary */
1672 if (midawseq > 0 && (midawadr & PAGEFRAME_BYTEMASK) == 0)
1673 {
1674 *chanstat = CSW_PROGC;
1675 return;
1676 }
1677
1678 /* Channel protection check if MIDAW is fetch protected */
1679 storkey = STORAGE_KEY(midawadr, dev);
1680 if (ccwkey != 0 && (storkey & STORKEY_FETCH)
1681 && (storkey & STORKEY_KEY) != ccwkey)
1682 {
1683 *chanstat = CSW_PROTC;
1684 return;
1685 }
1686
1687 /* Set the main storage reference bit for the MIDAW location */
1688 STORAGE_KEY(midawadr, dev) |= STORKEY_REF;
1689
1690 /* Fetch MIDAW from main storage (MIDAW is quadword
1691 aligned and so cannot cross a page boundary) */
1692 FETCH_DW(mword1, dev->mainstor + midawadr);
1693 FETCH_DW(mword2, dev->mainstor + midawadr + 8);
1694
1695 /* Channel program check in reserved bits are non-zero */
1696 if (mword1 & 0xFFFFFFFFFF000000ULL)
1697 {
1698 *chanstat = CSW_PROGC;
1699 return;
1700 }
1701
1702 /* Extract fields from MIDAW */
1703 mflags = mword1 >> 16;
1704 mcount = mword1 & 0xFFFF;
1705 mdaddr = (RADR)mword2;
1706
1707 /* Channel program check if data transfer interrupt flag is set */
1708 if (mflags & MIDAW_DTI)
1709 {
1710 *chanstat = CSW_PROGC;
1711 return;
1712 }
1713
1714 /* Channel program check if MIDAW count is zero */
1715 if (mcount == 0)
1716 {
1717 *chanstat = CSW_PROGC;
1718 return;
1719 }
1720
1721 /* Channel program check if MIDAW data
1722 location is outside main storage */
1723 if ( CHADDRCHK(mdaddr, dev) )
1724 {
1725 *chanstat = CSW_PROGC;
1726 return;
1727 }
1728
1729 /* Channel program check if skipping not in effect
1730 and the MIDAW data area crosses a page boundary */
1731 maxlen = (IS_CCW_RDBACK(code)) ?
1732 mdaddr - (mdaddr & PAGEFRAME_PAGEMASK) + 1 :
1733 (mdaddr | PAGEFRAME_BYTEMASK) - mdaddr + 1 ;
1734
1735 if ((mflags & MIDAW_SKIP) == 0 && mcount > maxlen)
1736 {
1737 *chanstat = CSW_PROGC;
1738 return;
1739 }
1740
1741 /* Return the data address, length, flags for this MIDAW */
1742 *addr = mdaddr;
1743 *len = mcount;
1744 *flags = mflags;
1745
1746 } /* end function fetch_midaw */ /*@MW*/
1747 #endif /*defined(FEATURE_MIDAW)*/ /*@MW*/
1748
1749 /*-------------------------------------------------------------------*/
1750 /* COPY DATA BETWEEN CHANNEL I/O BUFFER AND MAIN STORAGE */
1751 /*-------------------------------------------------------------------*/
ARCH_DEP(copy_iobuf)1752 static void ARCH_DEP(copy_iobuf) (
1753 DEVBLK *dev, /* -> Device block */
1754 BYTE code, /* CCW operation code */
1755 BYTE flags, /* CCW flags */
1756 U32 addr, /* Data address */
1757 U16 count, /* Data count */
1758 BYTE ccwkey, /* Protection key */
1759 BYTE idawfmt, /* IDAW format (1 or 2) @IWZ*/
1760 U16 idapmask, /* IDA page size - 1 @IWZ*/
1761 BYTE *iobuf, /* -> Channel I/O buffer */
1762 BYTE *chanstat) /* Returned channel status */
1763 {
1764 U32 idawaddr; /* Main storage addr of IDAW */
1765 U16 idacount; /* IDA bytes remaining */
1766 int idaseq; /* IDA sequence number */
1767 RADR idadata; /* IDA data address @IWZ*/
1768 U16 idalen; /* IDA data length */
1769 BYTE storkey; /* Storage key */
1770 RADR page,startpage,endpage; /* Storage key pages */
1771 BYTE readcmd; /* 1=READ, SENSE, or RDBACK */
1772 BYTE area[64]; /* Data display area */
1773 #if defined(FEATURE_MIDAW) /*@MW*/
1774 int midawseq; /* MIDAW counter (0=1st) @MW*/
1775 U32 midawptr; /* Real addr of MIDAW @MW*/
1776 U16 midawrem; /* CCW bytes remaining @MW*/
1777 U16 midawlen=0; /* MIDAW data length @MW*/
1778 RADR midawdat=0; /* MIDAW data area addr @MW*/
1779 BYTE midawflg; /* MIDAW flags @MW*/
1780 #endif /*defined(FEATURE_MIDAW)*/ /*@MW*/
1781
1782 /* Exit if no bytes are to be copied */
1783 if (count == 0)
1784 return;
1785
1786 /* Set flag to indicate direction of data movement */
1787 readcmd = IS_CCW_READ(code)
1788 || IS_CCW_SENSE(code)
1789 || IS_CCW_RDBACK(code);
1790
1791 #if defined(FEATURE_MIDAW) /*@MW*/
1792 /* Move data when modified indirect data addressing is used */
1793 if (flags & CCW_FLAGS_MIDAW)
1794 {
1795 midawptr = addr;
1796 midawrem = count;
1797 midawflg = 0;
1798
1799 for (midawseq = 0;
1800 midawrem > 0 && (midawflg & MIDAW_LAST) == 0;
1801 midawseq++)
1802 {
1803 /* Fetch MIDAW and set data address, length, flags */
1804 ARCH_DEP(fetch_midaw) (dev, code, ccwkey,
1805 midawseq, midawptr,
1806 &midawdat, &midawlen, &midawflg, chanstat);
1807
1808 /* Exit if fetch_midaw detected channel program check */
1809 if (*chanstat != 0) return;
1810
1811 /* Channel program check if MIDAW length
1812 exceeds the remaining CCW count */
1813 if (midawlen > midawrem)
1814 {
1815 *chanstat = CSW_PROGC;
1816 return;
1817 }
1818
1819 /* Perform data movement unless SKIP flag is set in MIDAW */
1820 if ((midawflg & MIDAW_SKIP) ==0)
1821 {
1822 /* Note: MIDAW data area cannot cross a page boundary
1823 The fetch_midaw function enforces this restriction */
1824
1825 /* Channel protection check if MIDAW data location is
1826 fetch protected, or if location is store protected
1827 and command is READ, READ BACKWARD, or SENSE */
1828 storkey = STORAGE_KEY(midawdat, dev);
1829 if (ccwkey != 0 && (storkey & STORKEY_KEY) != ccwkey
1830 && ((storkey & STORKEY_FETCH) || readcmd))
1831 {
1832 *chanstat = CSW_PROTC;
1833 return;
1834 }
1835
1836 /* Set the main storage reference and change bits */
1837 STORAGE_KEY(midawdat, dev) |= (readcmd ?
1838 (STORKEY_REF|STORKEY_CHANGE) : STORKEY_REF);
1839
1840 /* Copy data between main storage and channel buffer */
1841 if (IS_CCW_RDBACK(code))
1842 {
1843 midawdat = (midawdat - midawlen) + 1;
1844 memcpy (dev->mainstor + midawdat,
1845 iobuf + dev->curblkrem + midawrem - midawlen,
1846 midawlen);
1847
1848 /* Decrement buffer pointer */
1849 iobuf -= midawlen;
1850 }
1851 else
1852 {
1853 if (readcmd)
1854 memcpy (dev->mainstor + midawdat, iobuf, midawlen);
1855 else
1856 memcpy (iobuf, dev->mainstor + midawdat, midawlen);
1857
1858 /* Increment buffer pointer */
1859 iobuf += midawlen;
1860 }
1861
1862 } /* end if(!MIDAW_FLAG_SKIP) */
1863
1864 /* Display the MIDAW if CCW tracing is on */
1865 if (dev->ccwtrace || dev->ccwstep)
1866 {
1867 format_iobuf_data (midawdat, area, dev);
1868 logmsg ( _("HHCCP078I "
1869 "%4.4X:MIDAW=%2.2X %4.4"I16_FMT"X %16.16"I64_FMT"X\n"
1870 "%4.4X:------------- %s\n"),
1871 dev->devnum, midawflg, midawlen, (U64)midawdat,
1872 dev->devnum, area);
1873 }
1874
1875 /* Decrement remaining count */
1876 midawrem -= midawlen;
1877
1878 /* Increment to next MIDAW address */
1879 midawptr += 16;
1880
1881 } /* end for(midawseq) */
1882
1883 /* Channel program check if sum of MIDAW lengths
1884 did not exhaust the CCW count */
1885 if (midawrem > 0)
1886 {
1887 *chanstat = CSW_PROGC;
1888 return;
1889 }
1890
1891 } /* end if(CCW_FLAGS_MIDAW) */ /*@MW*/
1892 else /*@MW*/
1893 #endif /*defined(FEATURE_MIDAW)*/ /*@MW*/
1894 /* Move data when indirect data addressing is used */
1895 if (flags & CCW_FLAGS_IDA)
1896 {
1897 idawaddr = addr;
1898 idacount = count;
1899
1900 for (idaseq = 0; idacount > 0; idaseq++)
1901 {
1902 /* Fetch the IDAW and set IDA pointer and length */
1903 ARCH_DEP(fetch_idaw) (dev, code, ccwkey, idawfmt, /*@IWZ*/
1904 idapmask, idaseq, idawaddr, /*@IWZ*/
1905 &idadata, &idalen, chanstat);
1906
1907 /* Exit if fetch_idaw detected channel program check */
1908 if (*chanstat != 0) return;
1909
1910 /* Channel protection check if IDAW data location is
1911 fetch protected, or if location is store protected
1912 and command is READ, READ BACKWARD, or SENSE */
1913 storkey = STORAGE_KEY(idadata, dev);
1914 if (ccwkey != 0 && (storkey & STORKEY_KEY) != ccwkey
1915 && ((storkey & STORKEY_FETCH) || readcmd))
1916 {
1917 *chanstat = CSW_PROTC;
1918 return;
1919 }
1920
1921 /* Reduce length if less than one page remaining */
1922 if (idalen > idacount) idalen = idacount;
1923
1924 /* Set the main storage reference and change bits */
1925 STORAGE_KEY(idadata, dev) |=
1926 (readcmd ? (STORKEY_REF|STORKEY_CHANGE) : STORKEY_REF);
1927
1928 /* Copy data between main storage and channel buffer */
1929 if (IS_CCW_RDBACK(code))
1930 {
1931 idadata = (idadata - idalen) + 1;
1932 memcpy (dev->mainstor + idadata,
1933 iobuf + dev->curblkrem + idacount - idalen, idalen);
1934 }
1935 else
1936 {
1937 if (readcmd)
1938 memcpy (dev->mainstor + idadata, iobuf, idalen);
1939 else
1940 memcpy (iobuf, dev->mainstor + idadata, idalen);
1941
1942 /*
1943 JRJ: I believe that the following line of code
1944 code is suspect, because data chaining adds the
1945 used length later, as needed. Also, I note that
1946 this kind of thing is not done in non-IDA mode.
1947 Finally, since iobuf is not used for anything after
1948 this (in IDA mode), it probably doesn't hurt anything.
1949 */
1950 /* rbowler:
1951 I disagree with the above comment. Here we are in a
1952 loop processing a list of IDAWs and it is necessary
1953 to update the iobuf pointer so that it is correctly
1954 positioned ready for the data to be read or written
1955 by the subsequent IDAW */
1956
1957 /* Increment buffer pointer */
1958 iobuf += idalen;
1959 }
1960
1961 /* Display the IDAW if CCW tracing is on */
1962 if (dev->ccwtrace || dev->ccwstep)
1963 {
1964 format_iobuf_data (idadata, area, dev);
1965 if (idawfmt == 1) /*@IWZ*/
1966 { /*@IWZ*/
1967 logmsg ( _("HHCCP063I " /*@IWZ*/
1968 "%4.4X:IDAW=%8.8"I32_FMT"X Len=%3.3"I16_FMT"X%s\n"),
1969 dev->devnum, (U32)idadata, idalen, /*@IWZ*/
1970 area); /*@IWZ*/
1971 } else { /*@IWZ*/
1972 logmsg ( _("HHCCP064I " /*@IWZ*/
1973 "%4.4X:IDAW=%16.16"I64_FMT"X Len=%4.4"I16_FMT"X\n"
1974 "%4.4X:---------------------%s\n"), /*@IWZ*/
1975 dev->devnum, (U64)idadata, idalen,
1976 dev->devnum, area); /*@IWZ*/
1977 }
1978 }
1979
1980 /* Decrement remaining count, increment buffer pointer */
1981 idacount -= idalen;
1982
1983 /* Increment to next IDAW address */
1984 idawaddr += (idawfmt == 1) ? 4 : 8;
1985
1986 } /* end for(idaseq) */
1987
1988 } else { /* Non-IDA data addressing */
1989
1990 /* Point to start of data for read backward command */
1991 if (IS_CCW_RDBACK (code))
1992 {
1993 addr = addr - count + 1;
1994 }
1995
1996 /* Channel program check if data is outside main storage */
1997 if ( CHADDRCHK(addr, dev) || CHADDRCHK(addr + (count - 1), dev) )
1998 {
1999 *chanstat = CSW_PROGC;
2000 return;
2001 }
2002
2003 /* Channel protection check if any data is fetch protected,
2004 or if location is store protected and command is READ,
2005 READ BACKWARD, or SENSE */
2006 startpage = addr;
2007 endpage = addr + (count - 1);
2008 for (page = startpage & STORAGE_KEY_PAGEMASK;
2009 page <= (endpage | STORAGE_KEY_BYTEMASK);
2010 page += STORAGE_KEY_PAGESIZE)
2011 {
2012 storkey = STORAGE_KEY(page, dev);
2013 if (ccwkey != 0 && (storkey & STORKEY_KEY) != ccwkey
2014 && ((storkey & STORKEY_FETCH) || readcmd))
2015 {
2016 *chanstat = CSW_PROTC;
2017 return;
2018 }
2019 } /* end for(page) */
2020
2021 /* Set the main storage reference and change bits */
2022 for (page = startpage & STORAGE_KEY_PAGEMASK;
2023 page <= (endpage | STORAGE_KEY_BYTEMASK);
2024 page += STORAGE_KEY_PAGESIZE)
2025 {
2026 STORAGE_KEY(page, dev) |=
2027 (readcmd ? (STORKEY_REF|STORKEY_CHANGE) : STORKEY_REF);
2028 } /* end for(page) */
2029
2030 /* Copy data between main storage and channel buffer */
2031 if (readcmd)
2032 {
2033 if (IS_CCW_RDBACK(code))
2034 {
2035 /* read backward - use END of buffer */
2036 memcpy(dev->mainstor + addr,iobuf + dev->curblkrem, count);
2037 }
2038 else /* read forward */
2039 {
2040 memcpy (dev->mainstor + addr, iobuf, count);
2041 }
2042 }
2043 else
2044 {
2045 memcpy (iobuf, dev->mainstor + addr, count);
2046 }
2047
2048 } /* end if(!IDA) */
2049
2050 } /* end function copy_iobuf */
2051
2052
2053 /*-------------------------------------------------------------------*/
2054 /* DEVICE ATTENTION */
2055 /* Raises an unsolicited interrupt condition for a specified device. */
2056 /* Return value is 0 if successful, 1 if device is busy or pending */
2057 /* or 3 if subchannel is not valid or not enabled */
2058 /*-------------------------------------------------------------------*/
ARCH_DEP(device_attention)2059 DLL_EXPORT int ARCH_DEP(device_attention) (DEVBLK *dev, BYTE unitstat)
2060 {
2061 obtain_lock (&dev->lock);
2062
2063 if (dev->hnd->attention) (dev->hnd->attention) (dev);
2064
2065 #ifdef FEATURE_CHANNEL_SUBSYSTEM
2066 /* If subchannel not valid and enabled, do not present interrupt */
2067 if ((dev->pmcw.flag5 & PMCW5_V) == 0
2068 || (dev->pmcw.flag5 & PMCW5_E) == 0)
2069 {
2070 release_lock (&dev->lock);
2071 return 3;
2072 }
2073 #endif /*FEATURE_CHANNEL_SUBSYSTEM*/
2074
2075 /* If device is already busy or interrupt pending */
2076 if (dev->busy || IOPENDING(dev) || (dev->scsw.flag3 & SCSW3_SC_PEND))
2077 {
2078 /* Resume the suspended device with attention set */
2079 if(dev->scsw.flag3 & SCSW3_AC_SUSP)
2080 {
2081 dev->scsw.flag3 |= SCSW3_SC_ALERT | SCSW3_SC_PEND;
2082 dev->scsw.unitstat |= unitstat;
2083 dev->scsw.flag2 |= SCSW2_AC_RESUM;
2084 signal_condition(&dev->resumecond);
2085
2086 release_lock (&dev->lock);
2087
2088 if (dev->ccwtrace || dev->ccwstep)
2089 logmsg (_("HHCCP065I DEV%4.4X: attention signalled\n"),
2090 dev->devnum);
2091
2092 return 0;
2093 }
2094
2095 release_lock (&dev->lock);
2096
2097 return 1;
2098 }
2099
2100 if (dev->ccwtrace || dev->ccwstep)
2101 logmsg (_("HHCCP066I DEV%4.4X: attention\n"), dev->devnum);
2102
2103 #ifdef FEATURE_S370_CHANNEL
2104 /* Set CSW for attention interrupt */
2105 dev->attncsw[0] = 0;
2106 dev->attncsw[1] = 0;
2107 dev->attncsw[2] = 0;
2108 dev->attncsw[3] = 0;
2109 dev->attncsw[4] = unitstat;
2110 dev->attncsw[5] = 0;
2111 dev->attncsw[6] = 0;
2112 dev->attncsw[7] = 0;
2113 #endif /*FEATURE_S370_CHANNEL*/
2114
2115 #ifdef FEATURE_CHANNEL_SUBSYSTEM
2116 /* Set SCSW for attention interrupt */
2117 dev->attnscsw.flag0 = 0;
2118 dev->attnscsw.flag1 = 0;
2119 dev->attnscsw.flag2 = 0;
2120 dev->attnscsw.flag3 = SCSW3_SC_ALERT | SCSW3_SC_PEND;
2121 store_fw (dev->attnscsw.ccwaddr, 0);
2122 dev->attnscsw.unitstat = unitstat;
2123 dev->attnscsw.chanstat = 0;
2124 store_hw (dev->attnscsw.count, 0);
2125 #endif /*FEATURE_CHANNEL_SUBSYSTEM*/
2126
2127 /* Queue the attention interrupt */
2128 QUEUE_IO_INTERRUPT (&dev->attnioint);
2129
2130 release_lock (&dev->lock);
2131
2132 /* Update interrupt status */
2133 OBTAIN_INTLOCK(devregs(dev));
2134 UPDATE_IC_IOPENDING();
2135 RELEASE_INTLOCK(devregs(dev));
2136
2137 return 0;
2138 } /* end function device_attention */
2139
2140
2141 /*-------------------------------------------------------------------*/
2142 /* START A CHANNEL PROGRAM */
2143 /* This function is called by the SIO and SSCH instructions */
2144 /*-------------------------------------------------------------------*/
2145 /* Input */
2146 /* dev -> Device control block */
2147 /* orb -> Operation request block @IWZ*/
2148 /* Output */
2149 /* The I/O parameters are stored in the device block, and a */
2150 /* thread is created to execute the CCW chain asynchronously. */
2151 /* The return value is the condition code for the SIO or */
2152 /* SSCH instruction. */
2153 /* Note */
2154 /* For S/370 SIO, only the protect key and CCW address are */
2155 /* valid, all other ORB parameters are set to zero. */
2156 /*-------------------------------------------------------------------*/
ARCH_DEP(startio)2157 int ARCH_DEP(startio) (REGS *regs, DEVBLK *dev, ORB *orb) /*@IWZ*/
2158 {
2159 int syncio; /* 1=Do synchronous I/O */
2160 #if !defined(OPTION_FISHIO)
2161 int rc; /* Return code */
2162 DEVBLK *previoq, *ioq; /* Device I/O queue pointers */
2163 #endif // !defined(OPTION_FISHIO)
2164
2165 obtain_lock (&dev->lock);
2166
2167 dev->regs = NULL;
2168 dev->syncio_active = dev->syncio_retry = 0;
2169
2170 #if defined(_FEATURE_IO_ASSIST)
2171 if(SIE_MODE(regs)
2172 && (regs->siebk->zone != dev->pmcw.zone
2173 || !(dev->pmcw.flag27 & PMCW27_I)))
2174 {
2175 release_lock (&dev->lock);
2176 longjmp(regs->progjmp,SIE_INTERCEPT_INST);
2177 }
2178 #endif
2179
2180 #ifdef FEATURE_CHANNEL_SUBSYSTEM
2181 /* Return condition code 1 if status pending */
2182 if ((dev->scsw.flag3 & SCSW3_SC_PEND)
2183 || (dev->pciscsw.flag3 & SCSW3_SC_PEND)
2184 || (dev->attnscsw.flag3 & SCSW3_SC_PEND))
2185 {
2186 release_lock (&dev->lock);
2187 return 1;
2188 }
2189 #endif /*FEATURE_CHANNEL_SUBSYSTEM*/
2190
2191 /* Return condition code 2 if device is busy */
2192 if ((dev->busy && dev->ioactive == DEV_SYS_LOCAL)
2193 || dev->startpending)
2194 {
2195 release_lock (&dev->lock);
2196 return 2;
2197 }
2198
2199 /* Set the device busy indicator */
2200 dev->busy = dev->startpending = 1;
2201
2202 /* Initialize the subchannel status word */
2203 memset (&dev->scsw, 0, sizeof(SCSW));
2204 memset (&dev->pciscsw, 0, sizeof(SCSW));
2205 memset (&dev->attnscsw, 0, sizeof(SCSW));
2206 dev->scsw.flag0 = (orb->flag4 & SCSW0_KEY); /*@IWZ*/
2207 if (orb->flag4 & ORB4_S) dev->scsw.flag0 |= SCSW0_S; /*@IWZ*/
2208 if (orb->flag5 & ORB5_F) dev->scsw.flag1 |= SCSW1_F; /*@IWZ*/
2209 if (orb->flag5 & ORB5_P) dev->scsw.flag1 |= SCSW1_P; /*@IWZ*/
2210 if (orb->flag5 & ORB5_I) dev->scsw.flag1 |= SCSW1_I; /*@IWZ*/
2211 if (orb->flag5 & ORB5_A) dev->scsw.flag1 |= SCSW1_A; /*@IWZ*/
2212 if (orb->flag5 & ORB5_U) dev->scsw.flag1 |= SCSW1_U; /*@IWZ*/
2213
2214 /* Make the subchannel start-pending */
2215 dev->scsw.flag2 = SCSW2_FC_START | SCSW2_AC_START;
2216
2217 /* Copy the I/O parameter to the path management control word */
2218 memcpy (dev->pmcw.intparm, orb->intparm, /*@IWZ*/
2219 sizeof(dev->pmcw.intparm)); /*@IWZ*/
2220
2221 /* Signal console thread to redrive select */
2222 if (dev->console)
2223 {
2224 SIGNAL_CONSOLE_THREAD();
2225 }
2226
2227 /* Store the start I/O parameters in the device block */
2228 memcpy (&dev->orb, orb, sizeof(ORB)); /*@IWZ*/
2229
2230 /* Schedule the I/O. The various methods are a direct
2231 * correlation to the interest in the subject:
2232 * [1] Synchronous I/O. Attempts to complete the channel program
2233 * in the cpu thread to avoid any threads overhead.
2234 * [2] FishIO. Use native win32 APIs to coordinate I/O
2235 * thread scheduling.
2236 * [3] Device threads. Queue the I/O and signal a device thread.
2237 * Eliminates the overhead of thead creation/termination.
2238 * [4] Original. Create a thread to execute this I/O
2239 */
2240
2241 /* Determine if we can do synchronous I/O */
2242 if (dev->syncio == 1)
2243 syncio = 1;
2244 else if (dev->syncio == 2 && fetch_fw(dev->orb.ccwaddr) < dev->mainlim)
2245 {
2246 dev->code = dev->mainstor[fetch_fw(dev->orb.ccwaddr)];
2247 syncio = IS_CCW_TIC(dev->code) || IS_CCW_SENSE(dev->code)
2248 || IS_CCW_IMMEDIATE(dev);
2249 }
2250 else
2251 syncio = 0;
2252
2253 if (syncio && dev->ioactive == DEV_SYS_NONE
2254 #ifdef OPTION_IODELAY_KLUDGE
2255 && sysblk.iodelay < 1
2256 #endif /*OPTION_IODELAY_KLUDGE*/
2257 )
2258 {
2259 /* Initiate synchronous I/O */
2260 dev->syncio_active = 1;
2261 dev->ioactive = DEV_SYS_LOCAL;
2262 dev->regs = regs;
2263 release_lock (&dev->lock);
2264
2265 /*
2266 * `syncio' is set with intlock held. This allows
2267 * SYNCHRONIZE_CPUS to consider this CPU waiting while
2268 * performing synchronous i/o.
2269 */
2270 if (regs->cpubit != sysblk.started_mask)
2271 {
2272 OBTAIN_INTLOCK(regs);
2273 regs->hostregs->syncio = 1;
2274 RELEASE_INTLOCK(regs);
2275 }
2276
2277 call_execute_ccw_chain(sysblk.arch_mode, dev);
2278
2279 /* Return if retry not required */
2280 if (regs->hostregs->syncio)
2281 {
2282 OBTAIN_INTLOCK(regs);
2283 regs->hostregs->syncio = 0;
2284 RELEASE_INTLOCK(regs);
2285 }
2286 dev->regs = NULL;
2287 dev->syncio_active = 0;
2288 if (!dev->syncio_retry)
2289 return 0;
2290 /*
2291 * syncio_retry gets turned off after the execute ccw
2292 * device handler routine is called for the first time
2293 */
2294 }
2295 else
2296 release_lock (&dev->lock);
2297
2298 #if defined(OPTION_FISHIO)
2299 return ScheduleIORequest( dev, dev->devnum, &dev->devprio );
2300 #else // !defined(OPTION_FISHIO)
2301 if (sysblk.devtmax >= 0)
2302 {
2303 /* Queue the I/O request */
2304 obtain_lock (&sysblk.ioqlock);
2305
2306 /* Insert the device into the I/O queue */
2307 for (previoq = NULL, ioq = sysblk.ioq; ioq; ioq = ioq->nextioq)
2308 {
2309 if (dev->priority < ioq->priority) break;
2310 previoq = ioq;
2311 }
2312 dev->nextioq = ioq;
2313 if (previoq) previoq->nextioq = dev;
2314 else sysblk.ioq = dev;
2315
2316 /* Signal a device thread if one is waiting, otherwise create
2317 a device thread if the maximum number hasn't been created */
2318 if (sysblk.devtwait)
2319 {
2320 sysblk.devtwait--;
2321 signal_condition(&sysblk.ioqcond);
2322 }
2323 else if (sysblk.devtmax == 0 || sysblk.devtnbr < sysblk.devtmax)
2324 {
2325 rc = create_thread (&dev->tid, DETACHED,
2326 device_thread, NULL, "idle device thread");
2327 if (rc != 0 && sysblk.devtnbr == 0)
2328 {
2329 logmsg (_("HHCCP067E %4.4X create_thread error: %s"),
2330 dev->devnum, strerror(errno));
2331 release_lock (&sysblk.ioqlock);
2332 release_lock (&dev->lock);
2333 return 2;
2334 }
2335 }
2336 else
2337 sysblk.devtunavail++;
2338
2339 release_lock (&sysblk.ioqlock);
2340 }
2341 else
2342 {
2343 char thread_name[32];
2344 snprintf(thread_name,sizeof(thread_name),
2345 "execute %4.4X ccw chain",dev->devnum);
2346 thread_name[sizeof(thread_name)-1]=0;
2347
2348 /* Execute the CCW chain on a separate thread */
2349 if ( create_thread (&dev->tid, DETACHED,
2350 ARCH_DEP(execute_ccw_chain), dev, thread_name) )
2351 {
2352 logmsg (_("HHCCP068E %4.4X create_thread error: %s"),
2353 dev->devnum, strerror(errno));
2354 release_lock (&dev->lock);
2355 return 2;
2356 }
2357 }
2358
2359 /* Return with condition code zero */
2360 return 0;
2361
2362 #endif // defined(OPTION_FISHIO)
2363 } /* end function startio */
2364
2365
2366 /*-------------------------------------------------------------------*/
2367 /* EXECUTE A CHANNEL PROGRAM */
2368 /*-------------------------------------------------------------------*/
ARCH_DEP(execute_ccw_chain)2369 void *ARCH_DEP(execute_ccw_chain) (DEVBLK *dev)
2370 {
2371 int sysid = DEV_SYS_LOCAL; /* System Identifier */
2372 U32 ccwaddr; /* Address of CCW @IWZ*/
2373 U32 ticaddr = 0; /* Previous CCW was a TIC */
2374 U16 idapmask; /* IDA page size - 1 @IWZ*/
2375 BYTE idawfmt; /* IDAW format (1 or 2) @IWZ*/
2376 BYTE ccwfmt; /* CCW format (0 or 1) @IWZ*/
2377 BYTE ccwkey; /* Bits 0-3=key, 4-7=zero@IWZ*/
2378 BYTE opcode; /* CCW operation code */
2379 BYTE flags; /* CCW flags */
2380 U32 addr; /* CCW data address */
2381 #ifdef FEATURE_CHANNEL_SUBSYSTEM
2382 U32 mbaddr; /* Measure block address */
2383 MBK *mbk; /* Measure block */
2384 U16 mbcount; /* Measure block count */
2385 #endif /*FEATURE_CHANNEL_SUBSYSTEM*/
2386 U16 count; /* CCW byte count */
2387 BYTE *ccw; /* CCW pointer */
2388 BYTE unitstat; /* Unit status */
2389 BYTE chanstat; /* Channel status */
2390 U16 residual; /* Residual byte count */
2391 BYTE more; /* 1=Count exhausted */
2392 BYTE chain = 1; /* 1=Chain to next CCW */
2393 BYTE tracethis = 0; /* 1=Trace this CCW only */
2394 BYTE area[64]; /* Message area */
2395 int bufpos = 0; /* Position in I/O buffer */
2396 BYTE iobuf[65536]; /* Channel I/O buffer */
2397 int cmdretry = 255; /* Limit command retry */
2398
2399 /* Wait for the device to become available */
2400 obtain_lock (&dev->lock);
2401 if (!dev->syncio_active && dev->shared)
2402 {
2403 while (dev->ioactive != DEV_SYS_NONE
2404 && dev->ioactive != sysid)
2405 {
2406 dev->iowaiters++;
2407 wait_condition(&dev->iocond, &dev->lock);
2408 dev->iowaiters--;
2409 }
2410 dev->ioactive = sysid;
2411 dev->busy = 1;
2412 if (sysid == DEV_SYS_LOCAL)
2413 dev->startpending = 0;
2414 }
2415 else
2416 {
2417 dev->ioactive = DEV_SYS_LOCAL;
2418 dev->startpending = 0;
2419 }
2420
2421 #ifdef FEATURE_CHANNEL_SUBSYSTEM
2422 /* For hercules `resume' resume suspended state */
2423 if (dev->resumesuspended)
2424 {
2425 dev->resumesuspended=0;
2426 goto resume_suspend;
2427 }
2428 #endif
2429
2430 release_lock (&dev->lock);
2431
2432 /* Call the i/o start exit */
2433 if (!dev->syncio_retry)
2434 if (dev->hnd->start) (dev->hnd->start) (dev);
2435
2436 /* Extract the I/O parameters from the ORB */ /*@IWZ*/
2437 FETCH_FW(ccwaddr, dev->orb.ccwaddr); /*@IWZ*/
2438 ccwfmt = (dev->orb.flag5 & ORB5_F) ? 1 : 0; /*@IWZ*/
2439 ccwkey = dev->orb.flag4 & ORB4_KEY; /*@IWZ*/
2440 idawfmt = (dev->orb.flag5 & ORB5_H) ? 2 : 1; /*@IWZ*/
2441
2442 /* Determine IDA page size */ /*@IWZ*/
2443 if (idawfmt == 2) /*@IWZ*/
2444 { /*@IWZ*/
2445 /* Page size is 2K or 4K depending on flag bit */ /*@IWZ*/
2446 idapmask = /*@IWZ*/
2447 (dev->orb.flag5 & ORB5_T) ? 0x7FF : 0xFFF; /*@IWZ*/
2448 } else { /*@IWZ*/
2449 /* Page size is always 2K for format-1 IDAW */ /*@IWZ*/
2450 idapmask = 0x7FF; /*@IWZ*/
2451 } /*@IWZ*/
2452
2453 /* Turn off the start pending bit in the SCSW */
2454 dev->scsw.flag2 &= ~SCSW2_AC_START;
2455
2456 /* Set the subchannel active and device active bits in the SCSW */
2457 dev->scsw.flag3 |= (SCSW3_AC_SCHAC | SCSW3_AC_DEVAC);
2458
2459 /* Check for retried synchronous I/O */
2460 if (dev->syncio_retry)
2461 {
2462 dev->syncios--; dev->asyncios++;
2463 ccwaddr = dev->syncio_addr;
2464 dev->code = dev->prevcode;
2465 dev->prevcode = 0;
2466 dev->chained &= ~CCW_FLAGS_CD;
2467 dev->prev_chained = 0;
2468 logdevtr (dev, "asynchronous I/O ccw addr %8.8x\n", ccwaddr);
2469 }
2470 else
2471 {
2472 dev->chained = dev->prev_chained =
2473 dev->code = dev->prevcode = dev->ccwseq = 0;
2474 }
2475
2476 /* Check for synchronous I/O */
2477 if (dev->syncio_active)
2478 {
2479 dev->syncios++;
2480 logdevtr (dev, "synchronous I/O ccw addr %8.8x\n", ccwaddr);
2481 }
2482
2483 #if defined(_FEATURE_IO_ASSIST)
2484 #define _IOA_MBO sysblk.zpb[dev->pmcw.zone].mbo
2485 #define _IOA_MBM sysblk.zpb[dev->pmcw.zone].mbm
2486 #define _IOA_MBK sysblk.zpb[dev->pmcw.zone].mbk
2487 #else /*defined(_FEATURE_IO_ASSIST)*/
2488 #define _IOA_MBO sysblk.mbo
2489 #define _IOA_MBM sysblk.mbm
2490 #define _IOA_MBK sysblk.mbk
2491 #endif /*defined(_FEATURE_IO_ASSIST)*/
2492
2493 #ifdef FEATURE_CHANNEL_SUBSYSTEM
2494 /* Update the measurement block if applicable */
2495 if (_IOA_MBM && (dev->pmcw.flag5 & PMCW5_MM_MBU))
2496 {
2497 mbaddr = _IOA_MBO;
2498 mbaddr += (dev->pmcw.mbi[0] << 8 | dev->pmcw.mbi[1]) << 5;
2499 if ( !CHADDRCHK(mbaddr, dev)
2500 && (((STORAGE_KEY(mbaddr, dev) & STORKEY_KEY) == _IOA_MBK)
2501 || (_IOA_MBK == 0)))
2502 {
2503 STORAGE_KEY(mbaddr, dev) |= (STORKEY_REF | STORKEY_CHANGE);
2504 mbk = (MBK*)&dev->mainstor[mbaddr];
2505 FETCH_HW(mbcount,mbk->srcount);
2506 mbcount++;
2507 STORE_HW(mbk->srcount,mbcount);
2508 } else {
2509 /* Generate subchannel logout indicating program
2510 check or protection check, and set the subchannel
2511 measurement-block-update-enable to zero */
2512 dev->pmcw.flag5 &= ~PMCW5_MM_MBU;
2513 dev->esw.scl0 |= !CHADDRCHK(mbaddr, dev) ?
2514 SCL0_ESF_MBPTK : SCL0_ESF_MBPGK;
2515 /*INCOMPLETE*/
2516 }
2517 }
2518
2519 /* Generate an initial status I/O interruption if requested */
2520 if ((dev->scsw.flag1 & SCSW1_I) && !dev->syncio_retry)
2521 {
2522 IODELAY(dev); /* do the delay NOW, before obtaining the INTLOCK */
2523
2524 obtain_lock (&dev->lock);
2525
2526 /* Update the CCW address in the SCSW */
2527 STORE_FW(dev->scsw.ccwaddr,ccwaddr);
2528
2529 /* Set the zero condition-code flag in the SCSW */
2530 dev->scsw.flag1 |= SCSW1_Z;
2531
2532 /* Set intermediate status in the SCSW */
2533 dev->scsw.flag3 = SCSW3_SC_INTER | SCSW3_SC_PEND;
2534
2535 /* Queue the interrupt */
2536 QUEUE_IO_INTERRUPT (&dev->ioint);
2537
2538 release_lock (&dev->lock);
2539
2540 /* Update interrupt status */
2541 OBTAIN_INTLOCK(devregs(dev));
2542 UPDATE_IC_IOPENDING();
2543 RELEASE_INTLOCK(devregs(dev));
2544
2545 if (dev->ccwtrace || dev->ccwstep || tracethis)
2546 logmsg (_("HHCCP069I Device %4.4X initial status interrupt\n"),
2547 dev->devnum);
2548 }
2549 #endif /*FEATURE_CHANNEL_SUBSYSTEM*/
2550
2551 /* Execute the CCW chain */
2552 /* On entry : No locks held */
2553 while ( chain )
2554 {
2555 /* Test for attention status from device */
2556 if (dev->scsw.flag3 & SCSW3_SC_ALERT)
2557 {
2558 IODELAY(dev);
2559
2560 /* Call the i/o end exit */
2561 if (dev->hnd->end) (dev->hnd->end) (dev);
2562
2563 obtain_lock (&dev->lock);
2564
2565 /* Turn off busy bit, turn on pending bit */
2566 dev->busy = 0;
2567 dev->pending = 1;
2568
2569 /* Wake up any waiters if the device isn't reserved */
2570 if (!dev->reserved)
2571 {
2572 dev->ioactive = DEV_SYS_NONE;
2573 if (dev->iowaiters)
2574 signal_condition (&dev->iocond);
2575 }
2576
2577 /* Queue the pending interrupt */
2578 QUEUE_IO_INTERRUPT (&dev->ioint);
2579
2580 release_lock (&dev->lock);
2581
2582 /* Update interrupt status */
2583 OBTAIN_INTLOCK(devregs(dev));
2584 UPDATE_IC_IOPENDING();
2585 RELEASE_INTLOCK(devregs(dev));
2586
2587 if (dev->ccwtrace || dev->ccwstep || tracethis)
2588 logmsg (_("HHCCP070I Device %4.4X attention completed\n"),
2589 dev->devnum);
2590
2591 return NULL;
2592 } /* end attention processing */
2593
2594 /* Test for clear subchannel request */
2595 if (dev->scsw.flag2 & SCSW2_AC_CLEAR)
2596 {
2597 IODELAY(dev);
2598
2599 /* Call the i/o end exit */
2600 if (dev->hnd->end) (dev->hnd->end) (dev);
2601
2602 obtain_lock (&dev->lock);
2603
2604 /* [15.3.2] Perform clear function subchannel modification */
2605 dev->pmcw.pom = 0xFF;
2606 dev->pmcw.lpum = 0x00;
2607 dev->pmcw.pnom = 0x00;
2608
2609 /* [15.3.3] Perform clear function signaling and completion */
2610 dev->scsw.flag0 = 0;
2611 dev->scsw.flag1 = 0;
2612 dev->scsw.flag2 &= ~((SCSW2_FC - SCSW2_FC_CLEAR) | SCSW2_AC);
2613 dev->scsw.flag3 &= (~(SCSW3_AC | SCSW3_SC))&0xff;
2614 dev->scsw.flag3 |= SCSW3_SC_PEND;
2615 store_fw (dev->scsw.ccwaddr, 0);
2616 dev->scsw.chanstat = 0;
2617 dev->scsw.unitstat = 0;
2618 store_hw (dev->scsw.count, 0);
2619
2620 /* Turn off busy & pcipending bits, turn on pending bit */
2621 dev->busy = dev->pcipending = 0;
2622 dev->pending = 1;
2623
2624 /* Wake up any waiters if the device isn't reserved */
2625 if (!dev->reserved)
2626 {
2627 dev->ioactive = DEV_SYS_NONE;
2628 if (dev->iowaiters)
2629 signal_condition (&dev->iocond);
2630 }
2631
2632 /* For 3270 device, clear any pending input */
2633 if (dev->devtype == 0x3270)
2634 {
2635 dev->readpending = 0;
2636 dev->rlen3270 = 0;
2637 }
2638
2639 /* Signal console thread to redrive select */
2640 if (dev->console)
2641 {
2642 SIGNAL_CONSOLE_THREAD();
2643 }
2644
2645 /* Queue the pending interrupt */
2646 obtain_lock(&sysblk.iointqlk);
2647 DEQUEUE_IO_INTERRUPT_QLOCKED(&dev->pciioint);
2648 QUEUE_IO_INTERRUPT_QLOCKED(&dev->ioint);
2649 release_lock(&sysblk.iointqlk);
2650
2651 release_lock (&dev->lock);
2652
2653 /* Update interrupt status */
2654 OBTAIN_INTLOCK(devregs(dev));
2655 UPDATE_IC_IOPENDING();
2656 RELEASE_INTLOCK(devregs(dev));
2657
2658 if (dev->ccwtrace || dev->ccwstep || tracethis)
2659 logmsg (_("HHCCP071I Device %4.4X clear completed\n"),
2660 dev->devnum);
2661
2662 return NULL;
2663 } /* end perform clear subchannel */
2664
2665 /* Test for halt subchannel request */
2666 if (dev->scsw.flag2 & SCSW2_AC_HALT)
2667 {
2668 IODELAY(dev);
2669
2670 /* Call the i/o end exit */
2671 if (dev->hnd->end) (dev->hnd->end) (dev);
2672
2673 obtain_lock (&dev->lock);
2674
2675 /* [15.4.2] Perform halt function signaling and completion */
2676 dev->scsw.flag2 &= ~SCSW2_AC_HALT;
2677 dev->scsw.flag3 |= SCSW3_SC_PEND;
2678 dev->scsw.unitstat |= CSW_CE | CSW_DE;
2679
2680 /* Turn off busy & pcipending bits, turn on pending bit */
2681 dev->busy = dev->pcipending = 0;
2682 dev->pending = 1;
2683
2684 /* Wake up any waiters if the device isn't reserved */
2685 if (!dev->reserved)
2686 {
2687 dev->ioactive = DEV_SYS_NONE;
2688 if (dev->iowaiters)
2689 signal_condition (&dev->iocond);
2690 }
2691
2692 /* For 3270 device, clear any pending input */
2693 if (dev->devtype == 0x3270)
2694 {
2695 dev->readpending = 0;
2696 dev->rlen3270 = 0;
2697 }
2698
2699 /* Signal console thread to redrive select */
2700 if (dev->console)
2701 {
2702 SIGNAL_CONSOLE_THREAD();
2703 }
2704
2705 /* Queue the pending interrupt */
2706 obtain_lock(&sysblk.iointqlk);
2707 DEQUEUE_IO_INTERRUPT_QLOCKED(&dev->pciioint);
2708 QUEUE_IO_INTERRUPT_QLOCKED(&dev->ioint);
2709 release_lock(&sysblk.iointqlk);
2710
2711 release_lock (&dev->lock);
2712
2713 /* Update interrupt status */
2714 OBTAIN_INTLOCK(devregs(dev));
2715 UPDATE_IC_IOPENDING();
2716 RELEASE_INTLOCK(devregs(dev));
2717
2718 if (dev->ccwtrace || dev->ccwstep || tracethis)
2719 logmsg (_("HHCCP072I Device %4.4X halt completed\n"),
2720 dev->devnum);
2721
2722 return NULL;
2723 } /* end perform halt subchannel */
2724
2725 /* Clear the channel status and unit status */
2726 chanstat = 0;
2727 unitstat = 0;
2728
2729 /* Fetch the next CCW */
2730 ARCH_DEP(fetch_ccw) (dev, ccwkey, ccwfmt, ccwaddr, &opcode, &addr,
2731 &flags, &count, &chanstat);
2732
2733 /* For an invalid CCW address in a TIC we must backup to TIC+8 */
2734 if(ticaddr && (chanstat & CSW_PROGC))
2735 ccwaddr = ticaddr-8;
2736
2737 /* Point to the CCW in main storage */
2738 ccw = dev->mainstor + ccwaddr;
2739
2740 /* Increment to next CCW address */
2741 if ((dev->chained & CCW_FLAGS_CD) == 0)
2742 dev->syncio_addr = ccwaddr;
2743 ccwaddr += 8;
2744
2745 /* Update the CCW address in the SCSW */
2746 STORE_FW(dev->scsw.ccwaddr,ccwaddr);
2747
2748 /* Exit if fetch_ccw detected channel program check */
2749 if (chanstat != 0) break;
2750
2751 /* Display the CCW */
2752 if (dev->ccwtrace || dev->ccwstep)
2753 display_ccw (dev, ccw, addr);
2754
2755 /*----------------------------------------------*/
2756 /* TRANSFER IN CHANNEL (TIC) command */
2757 /*----------------------------------------------*/
2758 if (IS_CCW_TIC(opcode))
2759 {
2760 /* Channel program check if TIC-to-TIC */
2761 if (ticaddr)
2762 {
2763 chanstat = CSW_PROGC;
2764 break;
2765 }
2766
2767 /* Channel program check if format-1 TIC reserved bits set*/
2768 if (ccwfmt == 1
2769 && (opcode != 0x08 || flags != 0 || count != 0))
2770 {
2771 chanstat = CSW_PROGC;
2772 break;
2773 }
2774
2775 /* Set new CCW address (leaving the values of chained and
2776 code untouched to allow data-chaining through TIC) */
2777 ticaddr = ccwaddr;
2778 ccwaddr = addr;
2779 chain = 1;
2780 continue;
2781 } /* end if TIC */
2782
2783 /*----------------------------------------------*/
2784 /* Commands other than TRANSFER IN CHANNEL */
2785 /*----------------------------------------------*/
2786 /* Reset the TIC-to-TIC flag */
2787 ticaddr = 0;
2788
2789 /* Update current CCW opcode, unless data chaining */
2790 if ((dev->chained & CCW_FLAGS_CD) == 0)
2791 {
2792 dev->prevcode = dev->code;
2793 dev->code = opcode;
2794 }
2795
2796 #if !defined(FEATURE_MIDAW) /*@MW*/
2797 /* Channel program check if MIDAW not installed */ /*@MW*/
2798 if (flags & CCW_FLAGS_MIDAW) /*@MW*/
2799 {
2800 chanstat = CSW_PROGC;
2801 break;
2802 }
2803 #endif /*!defined(FEATURE_MIDAW)*/ /*@MW*/
2804
2805 #if defined(FEATURE_MIDAW) /*@MW*/
2806 /* Channel program check if MIDAW not enabled in ORB */ /*@MW*/
2807 if ((flags & CCW_FLAGS_MIDAW) && /*@MW*/
2808 (dev->orb.flag7 & ORB7_D) == 0) /*@MW*/
2809 { /*@MW*/
2810 chanstat = CSW_PROGC; /*@MW*/
2811 break; /*@MW*/
2812 } /*@MW*/
2813
2814 /* Channel program check if MIDAW with SKIP or IDA */ /*@MW*/
2815 if ((flags & CCW_FLAGS_MIDAW) && /*@MW*/
2816 (flags & (CCW_FLAGS_SKIP | CCW_FLAGS_IDA))) /*@MW*/
2817 { /*@MW*/
2818 chanstat = CSW_PROGC; /*@MW*/
2819 break; /*@MW*/
2820 } /*@MW*/
2821 #endif /*defined(FEATURE_MIDAW)*/ /*@MW*/
2822
2823 #ifdef FEATURE_S370_CHANNEL
2824 /* For S/370, channel program check if suspend flag is set */
2825 if (flags & CCW_FLAGS_SUSP)
2826 {
2827 chanstat = CSW_PROGC;
2828 break;
2829 }
2830 #endif /*FEATURE_S370_CHANNEL*/
2831
2832 #ifdef FEATURE_CHANNEL_SUBSYSTEM
2833 /* Suspend channel program if suspend flag is set */
2834 if (flags & CCW_FLAGS_SUSP)
2835 {
2836 /* Channel program check if the ORB suspend control bit
2837 was zero, or if this is a data chained CCW */
2838 if ((dev->scsw.flag0 & SCSW0_S) == 0
2839 || (dev->chained & CCW_FLAGS_CD))
2840 {
2841 chanstat = CSW_PROGC;
2842 break;
2843 }
2844
2845 /* Retry if synchronous I/O */
2846 if (dev->syncio_active)
2847 {
2848 dev->syncio_retry = 1;
2849 return NULL;
2850 }
2851
2852 IODELAY(dev);
2853
2854 /* Call the i/o suspend exit */
2855 if (dev->hnd->suspend) (dev->hnd->suspend) (dev);
2856
2857 obtain_lock (&dev->lock);
2858
2859 /* Suspend the device if not already resume pending */
2860 if ((dev->scsw.flag2 & SCSW2_AC_RESUM) == 0)
2861 {
2862 /* Set the subchannel status word to suspended */
2863 dev->scsw.flag3 = SCSW3_AC_SUSP
2864 | SCSW3_SC_INTER
2865 | SCSW3_SC_PEND;
2866 dev->scsw.unitstat = 0;
2867 dev->scsw.chanstat = 0;
2868 STORE_HW(dev->scsw.count,count);
2869
2870 /* Generate I/O interrupt unless the ORB specified
2871 that suspend interrupts are to be suppressed */
2872 if ((dev->scsw.flag1 & SCSW1_U) == 0)
2873 {
2874 /* Queue the interrupt */
2875 QUEUE_IO_INTERRUPT(&dev->ioint);
2876
2877 /* Update interrupt status */
2878 release_lock (&dev->lock);
2879 OBTAIN_INTLOCK(devregs(dev));
2880 UPDATE_IC_IOPENDING();
2881 RELEASE_INTLOCK(devregs(dev));
2882 obtain_lock (&dev->lock);
2883 }
2884
2885 /* Wake up any waiters if the device isn't reserved */
2886 if (!dev->reserved)
2887 {
2888 dev->ioactive = DEV_SYS_NONE;
2889 if (dev->iowaiters)
2890 signal_condition (&dev->iocond);
2891 }
2892
2893 /* Signal console thread to redrive select */
2894 if (dev->console)
2895 {
2896 SIGNAL_CONSOLE_THREAD();
2897 }
2898
2899 /* Turn on the `suspended' bit. This enables remote
2900 systems to use the device while we're waiting */
2901 dev->suspended = 1;
2902
2903 if (dev->ccwtrace || dev->ccwstep || tracethis)
2904 logmsg (_("HHCCP073I Device %4.4X suspended\n"),
2905 dev->devnum);
2906
2907 // FIXME: Not a very elegant way to fix the suspend/resume problem
2908 dev->ccwaddr = ccwaddr;
2909 dev->idapmask = idapmask;
2910 dev->idawfmt = idawfmt;
2911 dev->ccwfmt = ccwfmt;
2912 dev->ccwkey = ccwkey;
2913
2914 resume_suspend:
2915
2916 ccwaddr = dev->ccwaddr;
2917 idapmask = dev->idapmask;
2918 idawfmt = dev->idawfmt;
2919 ccwfmt = dev->ccwfmt;
2920 ccwkey = dev->ccwkey;
2921
2922 /* Suspend the device until resume instruction */
2923 while (dev->suspended && (dev->scsw.flag2 & SCSW2_AC_RESUM) == 0)
2924 {
2925 wait_condition (&dev->resumecond, &dev->lock);
2926 }
2927
2928 /* If the device has been reset then simply return */
2929 if (!dev->suspended)
2930 {
2931 if (dev->ioactive == sysid)
2932 {
2933 dev->busy = 0;
2934
2935 /* Wake up any waiters if the device isn't reserved */
2936 if (!dev->reserved)
2937 {
2938 dev->ioactive = DEV_SYS_NONE;
2939 if (dev->iowaiters)
2940 signal_condition (&dev->iocond);
2941 }
2942 }
2943 release_lock (&dev->lock);
2944 return NULL;
2945 }
2946
2947 /* Turn the `suspended' bit off */
2948 dev->suspended = 0;
2949
2950 /* Wait for the device to become available */
2951 while (dev->ioactive != DEV_SYS_NONE
2952 && dev->ioactive != sysid)
2953 {
2954 dev->iowaiters++;
2955 wait_condition(&dev->iocond, &dev->lock);
2956 dev->iowaiters--;
2957 }
2958 dev->ioactive = sysid;
2959 dev->busy = 1;
2960
2961 if (dev->ccwtrace || dev->ccwstep || tracethis)
2962 logmsg (_("HHCCP074I Device %4.4X resumed\n"),
2963 dev->devnum);
2964
2965 /* Reset the suspended status in the SCSW */
2966 dev->scsw.flag3 &= ~SCSW3_AC_SUSP;
2967 dev->scsw.flag3 |= (SCSW3_AC_SCHAC | SCSW3_AC_DEVAC);
2968 }
2969
2970 /* Reset the resume pending flag */
2971 dev->scsw.flag2 &= ~SCSW2_AC_RESUM;
2972
2973 release_lock (&dev->lock);
2974
2975 /* Call the i/o resume exit */
2976 if (dev->hnd->resume) (dev->hnd->resume) (dev);
2977
2978 /* Reset fields as if starting a new channel program */
2979 dev->code = 0;
2980 ticaddr = 0;
2981 chain = 1;
2982 dev->chained = 0;
2983 dev->prev_chained = 0;
2984 dev->prevcode = 0;
2985 dev->ccwseq = 0;
2986 bufpos = 0;
2987 dev->syncio_retry = 0;
2988
2989 /* Go back and refetch the suspended CCW */
2990 ccwaddr -= 8;
2991 continue;
2992
2993 } /* end if(CCW_FLAGS_SUSP) */
2994 #endif /*FEATURE_CHANNEL_SUBSYSTEM*/
2995
2996 /* Signal I/O interrupt if PCI flag is set */
2997 if ((flags & CCW_FLAGS_PCI) && !dev->syncio_retry)
2998 {
2999 ARCH_DEP(raise_pci) (dev, ccwkey, ccwfmt, ccwaddr); /*@MW*/
3000 }
3001
3002 /* Allow the device handler to determine whether this is
3003 an immediate CCW (i.e. CONTROL with no data transfer) */
3004 dev->is_immed = IS_CCW_IMMEDIATE(dev);
3005
3006 /* Channel program check if invalid count */
3007 if (count == 0 && (ccwfmt == 0 ||
3008 (flags & CCW_FLAGS_CD) || (dev->chained & CCW_FLAGS_CD)))
3009 {
3010 chanstat = CSW_PROGC;
3011 break;
3012 }
3013
3014 /* If immediate, chain data is ignored */
3015 if (dev->is_immed && (flags & CCW_FLAGS_CD))
3016 {
3017 flags &= ~CCW_FLAGS_CD;
3018 dev->chained &= ~CCW_FLAGS_CD;
3019 }
3020
3021 /* If synchronous I/O and a syncio 2 device and not an
3022 immediate CCW then retry asynchronously */
3023 if (dev->syncio_active && dev->syncio == 2
3024 && !dev->is_immed && !IS_CCW_SENSE(dev->code))
3025 {
3026 dev->syncio_retry = 1;
3027 return NULL;
3028 }
3029
3030 /* For WRITE and non-immediate CONTROL operations,
3031 copy data from main storage into channel buffer */
3032 if ( IS_CCW_WRITE(dev->code)
3033 || ( IS_CCW_CONTROL(dev->code)
3034 && (!dev->is_immed)))
3035 {
3036 /* Channel program check if data exceeds buffer size */
3037 if (bufpos + count > 65536)
3038 {
3039 chanstat = CSW_PROGC;
3040 break;
3041 }
3042
3043 /* Copy data into channel buffer */
3044 ARCH_DEP(copy_iobuf) (dev, dev->code, flags, addr, count,
3045 ccwkey, idawfmt, idapmask, /*@IWZ*/
3046 iobuf + bufpos, &chanstat);
3047 if (chanstat != 0) break;
3048
3049 /* Update number of bytes in channel buffer */
3050 bufpos += count;
3051
3052 /* If device handler has requested merging of data
3053 chained write CCWs, then collect data from all CCWs
3054 in chain before passing buffer to device handler */
3055 if (dev->cdwmerge)
3056 {
3057 if (flags & CCW_FLAGS_CD)
3058 {
3059 /* If this is the first CCW in the data chain, then
3060 save the chaining flags from the previous CCW */
3061 if ((dev->chained & CCW_FLAGS_CD) == 0)
3062 dev->prev_chained = dev->chained;
3063
3064 /* Process next CCW in data chain */
3065 dev->chained = CCW_FLAGS_CD;
3066 chain = 1;
3067 continue;
3068 }
3069
3070 /* If this is the last CCW in the data chain, then
3071 restore the chaining flags from the previous CCW */
3072 if (dev->chained & CCW_FLAGS_CD)
3073 dev->chained = dev->prev_chained;
3074
3075 } /* end if(dev->cdwmerge) */
3076
3077 /* Reset the total count at end of data chain */
3078 count = bufpos;
3079 bufpos = 0;
3080 }
3081
3082 /* Set chaining flag */
3083 chain = ( flags & (CCW_FLAGS_CD | CCW_FLAGS_CC) ) ? 1 : 0;
3084
3085 /* Initialize residual byte count */
3086 residual = count;
3087 more = 0;
3088
3089 /* Channel program check if invalid CCW opcode */
3090 if (!(IS_CCW_WRITE(dev->code) || IS_CCW_READ(dev->code)
3091 || IS_CCW_CONTROL(dev->code) || IS_CCW_SENSE(dev->code)
3092 || IS_CCW_RDBACK(dev->code)))
3093 {
3094 chanstat = CSW_PROGC;
3095 break;
3096 }
3097
3098 /* Pass the CCW to the device handler for execution */
3099 (dev->hnd->exec) (dev, dev->code, flags, dev->chained, count, dev->prevcode,
3100 dev->ccwseq, iobuf, &more, &unitstat, &residual);
3101
3102 /* Check if synchronous I/O needs to be retried */
3103 if (dev->syncio_active && dev->syncio_retry)
3104 return NULL;
3105 /*
3106 * NOTE: syncio_retry is left on for an asynchronous I/O until
3107 * after the first call to the execute ccw device handler.
3108 * This allows the device handler to realize that the I/O is
3109 * being retried asynchronously.
3110 */
3111 dev->syncio_retry = 0;
3112
3113 /* Check for Command Retry (suggested by Jim Pierson) */
3114 if ( --cmdretry && unitstat == ( CSW_CE | CSW_DE | CSW_UC | CSW_SM ) )
3115 {
3116 chain = 1;
3117 ccwaddr -= 8; /* (retry same ccw again) */
3118 continue;
3119 }
3120
3121 /* For READ, SENSE, and READ BACKWARD operations, copy data
3122 from channel buffer to main storage, unless SKIP is set */
3123 if ((flags & CCW_FLAGS_SKIP) == 0
3124 && (IS_CCW_READ(dev->code)
3125 || IS_CCW_SENSE(dev->code)
3126 || IS_CCW_RDBACK(dev->code)))
3127 {
3128 ARCH_DEP(copy_iobuf) (dev, dev->code, flags,
3129 addr, count - residual,
3130 ccwkey, idawfmt, idapmask, /*@IWZ*/
3131 iobuf, &chanstat);
3132 }
3133
3134 /* Check for incorrect length */
3135 if (residual != 0
3136 || (more && ((flags & CCW_FLAGS_CD) == 0)))
3137 {
3138 /* Set incorrect length status if data chaining or
3139 or if suppress length indication flag is off
3140 for non-NOP CCWs */
3141 if (((flags & CCW_FLAGS_CD)
3142 || (flags & CCW_FLAGS_SLI) == 0)
3143 && (!dev->is_immed)
3144 #if defined(FEATURE_INCORRECT_LENGTH_INDICATION_SUPPRESSION)
3145 /* Suppress incorrect length indication if
3146 CCW format is one and SLI mode is indicated
3147 in the ORB */
3148 && !((dev->orb.flag5 & ORB5_F)
3149 && (dev->orb.flag5 & ORB5_U))
3150 #endif /*defined(FEATURE_INCORRECT_LENGTH_INDICATION_SUPPRESSION)*/
3151 )
3152 chanstat |= CSW_IL;
3153 }
3154
3155 /* Force tracing for this CCW if any unusual status occurred */
3156 if ((chanstat & (CSW_PROGC | CSW_PROTC | CSW_CDC | CSW_CCC
3157 | CSW_ICC | CSW_CHC))
3158 || ((unitstat & CSW_UC) && dev->sense[0] != 0))
3159 {
3160 /* Trace the CCW if not already done */
3161 if (!(dev->ccwtrace || dev->ccwstep || tracethis)
3162 && (CPU_STEPPING_OR_TRACING_ALL || sysblk.pgminttr
3163 || dev->ccwtrace || dev->ccwstep) )
3164 display_ccw (dev, ccw, addr);
3165
3166 /* Activate tracing for this CCW chain only
3167 if any trace is already active */
3168 if(CPU_STEPPING_OR_TRACING_ALL || sysblk.pgminttr
3169 || dev->ccwtrace || dev->ccwstep)
3170 tracethis = 1;
3171 }
3172
3173 /* Trace the results of CCW execution */
3174 if (dev->ccwtrace || dev->ccwstep || tracethis)
3175 {
3176 /* Format data for READ or SENSE commands only */
3177 if (IS_CCW_READ(dev->code) || IS_CCW_SENSE(dev->code) || IS_CCW_RDBACK(dev->code))
3178 format_iobuf_data (addr, area, dev);
3179 else
3180 area[0] = '\0';
3181
3182 /* Display status and residual byte count */
3183 logmsg (_("HHCCP075I %4.4X:Stat=%2.2X%2.2X Count=%4.4X %s\n"),
3184 dev->devnum, unitstat, chanstat, residual, area);
3185
3186 /* Display sense bytes if unit check is indicated */
3187 if (unitstat & CSW_UC)
3188 {
3189 logmsg (_("HHCCP076I %4.4X:Sense=%2.2X%2.2X%2.2X%2.2X "
3190 "%2.2X%2.2X%2.2X%2.2X %2.2X%2.2X%2.2X%2.2X "
3191 "%2.2X%2.2X%2.2X%2.2X %2.2X%2.2X%2.2X%2.2X "
3192 "%2.2X%2.2X%2.2X%2.2X\n"),
3193 dev->devnum, dev->sense[0], dev->sense[1],
3194 dev->sense[2], dev->sense[3], dev->sense[4],
3195 dev->sense[5], dev->sense[6], dev->sense[7],
3196 dev->sense[8], dev->sense[9], dev->sense[10],
3197 dev->sense[11], dev->sense[12], dev->sense[13],
3198 dev->sense[14], dev->sense[15], dev->sense[16],
3199 dev->sense[17], dev->sense[18], dev->sense[19],
3200 dev->sense[20], dev->sense[21], dev->sense[22],
3201 dev->sense[23]);
3202 if (dev->sense[0] != 0 || dev->sense[1] != 0)
3203 {
3204 logmsg (_("HHCCP077I %4.4X:Sense=%s%s%s%s%s%s%s%s"
3205 "%s%s%s%s%s%s%s%s\n"),
3206 dev->devnum,
3207 (dev->sense[0] & SENSE_CR) ? "CMDREJ " : "",
3208 (dev->sense[0] & SENSE_IR) ? "INTREQ " : "",
3209 (dev->sense[0] & SENSE_BOC) ? "BOC " : "",
3210 (dev->sense[0] & SENSE_EC) ? "EQC " : "",
3211 (dev->sense[0] & SENSE_DC) ? "DCK " : "",
3212 (dev->sense[0] & SENSE_OR) ? "OVR " : "",
3213 (dev->sense[0] & SENSE_CC) ? "CCK " : "",
3214 (dev->sense[0] & SENSE_OC) ? "OCK " : "",
3215 (dev->sense[1] & SENSE1_PER) ? "PER " : "",
3216 (dev->sense[1] & SENSE1_ITF) ? "ITF " : "",
3217 (dev->sense[1] & SENSE1_EOC) ? "EOC " : "",
3218 (dev->sense[1] & SENSE1_MTO) ? "MSG " : "",
3219 (dev->sense[1] & SENSE1_NRF) ? "NRF " : "",
3220 (dev->sense[1] & SENSE1_FP) ? "FP " : "",
3221 (dev->sense[1] & SENSE1_WRI) ? "WRI " : "",
3222 (dev->sense[1] & SENSE1_IE) ? "IE " : "");
3223 }
3224 }
3225 }
3226
3227 /* Increment CCW address if device returned status modifier */
3228 if (unitstat & CSW_SM)
3229 ccwaddr += 8;
3230
3231 /* Terminate the channel program if any unusual status */
3232 if (chanstat != 0
3233 || (unitstat & ~CSW_SM) != (CSW_CE | CSW_DE))
3234 chain = 0;
3235
3236 /* Update the chaining flags */
3237 dev->chained = flags & (CCW_FLAGS_CD | CCW_FLAGS_CC);
3238
3239 /* Update the CCW sequence number unless data chained */
3240 if ((flags & CCW_FLAGS_CD) == 0)
3241 dev->ccwseq++;
3242
3243 } /* end while(chain) */
3244
3245 IODELAY(dev);
3246
3247 /* Call the i/o end exit */
3248 if (dev->hnd->end) (dev->hnd->end) (dev);
3249
3250 obtain_lock (&dev->lock);
3251
3252 #ifdef FEATURE_S370_CHANNEL
3253 /* Build the channel status word */
3254 dev->csw[0] = ccwkey & 0xF0;
3255 dev->csw[1] = (ccwaddr & 0xFF0000) >> 16;
3256 dev->csw[2] = (ccwaddr & 0xFF00) >> 8;
3257 dev->csw[3] = ccwaddr & 0xFF;
3258 dev->csw[4] = unitstat;
3259 dev->csw[5] = chanstat;
3260 dev->csw[6] = (residual & 0xFF00) >> 8;
3261 dev->csw[7] = residual & 0xFF;
3262 #endif /*FEATURE_S370_CHANNEL*/
3263
3264 #ifdef FEATURE_CHANNEL_SUBSYSTEM
3265 /* Complete the subchannel status word */
3266 dev->scsw.flag3 &= ~(SCSW3_AC_SCHAC | SCSW3_AC_DEVAC);
3267 dev->scsw.flag3 |= (SCSW3_SC_PRI | SCSW3_SC_SEC | SCSW3_SC_PEND);
3268 STORE_FW(dev->scsw.ccwaddr,ccwaddr);
3269 dev->scsw.unitstat = unitstat;
3270 dev->scsw.chanstat = chanstat;
3271 STORE_HW(dev->scsw.count,residual);
3272
3273 /* Set alert status if terminated by any unusual condition */
3274 if (chanstat != 0 || unitstat != (CSW_CE | CSW_DE))
3275 dev->scsw.flag3 |= SCSW3_SC_ALERT;
3276
3277 /* Build the format-1 extended status word */
3278 memset (&dev->esw, 0, sizeof(ESW));
3279 dev->esw.lpum = 0x80;
3280
3281 /* Clear the extended control word */
3282 memset (dev->ecw, 0, sizeof(dev->ecw));
3283
3284 /* Return sense information if PMCW allows concurrent sense */
3285 if ((unitstat & CSW_UC) && (dev->pmcw.flag27 & PMCW27_S))
3286 {
3287 dev->scsw.flag1 |= SCSW1_E;
3288 dev->esw.erw0 |= ERW0_S;
3289 dev->esw.erw1 = (dev->numsense < (int)sizeof(dev->ecw)) ?
3290 dev->numsense : sizeof(dev->ecw);
3291 memcpy (dev->ecw, dev->sense, dev->esw.erw1 & ERW1_SCNT);
3292 memset (dev->sense, 0, sizeof(dev->sense));
3293 dev->sns_pending = 0;
3294 }
3295 #endif /*FEATURE_CHANNEL_SUBSYSTEM*/
3296
3297 /* Wake up any waiters if the device isn't reserved */
3298 if (!dev->reserved)
3299 {
3300 dev->ioactive = DEV_SYS_NONE;
3301 if (dev->iowaiters)
3302 signal_condition (&dev->iocond);
3303 }
3304
3305 /* Signal console thread to redrive select */
3306 if (dev->console)
3307 {
3308 SIGNAL_CONSOLE_THREAD();
3309 }
3310
3311 dev->busy = 0;
3312
3313 /* Queue the interrupt */
3314 QUEUE_IO_INTERRUPT (&dev->ioint);
3315
3316 release_lock (&dev->lock);
3317
3318 /* Present the interrupt */
3319 OBTAIN_INTLOCK(devregs(dev));
3320 if (dev->regs) dev->regs->hostregs->syncio = 0;
3321 UPDATE_IC_IOPENDING();
3322 RELEASE_INTLOCK(devregs(dev));
3323
3324 return NULL;
3325
3326 } /* end function execute_ccw_chain */
3327
3328
3329 /*-------------------------------------------------------------------*/
3330 /* TEST WHETHER INTERRUPTS ARE ENABLED FOR THE SPECIFIED DEVICE */
3331 /* When configured for S/370 channels, the PSW system mask and/or */
3332 /* the channel masks in control register 2 determine whether the */
3333 /* device is enabled. When configured for the XA or ESA channel */
3334 /* subsystem, the interrupt subclass masks in control register 6 */
3335 /* determine eligability; the PSW system mask is not tested, because */
3336 /* the TPI instruction can operate with I/O interrupts masked off. */
3337 /* Returns non-zero if interrupts enabled, 0 if interrupts disabled. */
3338 /*-------------------------------------------------------------------*/
3339 /* I/O Assist: */
3340 /* This routine must return: */
3341 /* */
3342 /* 0 - In the case of no pending interrupt */
3343 /* SIE_NO_INTERCEPT - For a non-intercepted I/O interrupt */
3344 /* SIE_INTERCEPT_IOINT - For an intercepted I/O interrupt */
3345 /* SIE_INTERCEPT_IOINTP- For a pending I/O interception */
3346 /* */
3347 /* SIE_INTERCEPT_IOINT may only be returned to a guest */
3348 /*-------------------------------------------------------------------*/
ARCH_DEP(interrupt_enabled)3349 static inline int ARCH_DEP(interrupt_enabled) (REGS *regs, DEVBLK *dev)
3350 {
3351 int i; /* Interruption subclass */
3352
3353 /* Ignore this device if subchannel not valid */
3354 if (!(dev->pmcw.flag5 & PMCW5_V))
3355 return 0;
3356
3357 #if defined(_FEATURE_IO_ASSIST)
3358 /* For I/O Assist the zone must match the guest zone */
3359 if(SIE_MODE(regs) && regs->siebk->zone != dev->pmcw.zone)
3360 return 0;
3361 #endif
3362
3363 #if defined(_FEATURE_IO_ASSIST)
3364 /* The interrupt interlock control bit must be on
3365 if not we must intercept */
3366 if(SIE_MODE(regs) && !(dev->pmcw.flag27 & PMCW27_I))
3367 return SIE_INTERCEPT_IOINT;
3368 #endif
3369
3370 #ifdef FEATURE_S370_CHANNEL
3371
3372 #if defined(FEATURE_CHANNEL_SWITCHING)
3373 /* Is this device on a channel connected to this CPU? */
3374 if(
3375 #if defined(_FEATURE_IO_ASSIST)
3376 !SIE_MODE(regs) &&
3377 #endif
3378 regs->chanset != dev->chanset)
3379 return 0;
3380 #endif /*defined(FEATURE_CHANNEL_SWITCHING)*/
3381
3382 /* Isolate the channel number */
3383 i = dev->devnum >> 8;
3384 if (!ECMODE(®s->psw) && i < 6)
3385 {
3386 #if defined(_FEATURE_IO_ASSIST)
3387 /* We must always intercept in BC mode */
3388 if(SIE_MODE(regs))
3389 return SIE_INTERCEPT_IOINT;
3390 #endif
3391 /* For BC mode channels 0-5, test system mask bits 0-5 */
3392 if ((regs->psw.sysmask & (0x80 >> i)) == 0)
3393 return 0;
3394 }
3395 else
3396 {
3397 /* For EC mode and channels 6-31, test system mask bit 6 */
3398 if ((regs->psw.sysmask & PSW_IOMASK) == 0)
3399 return 0;
3400
3401 /* If I/O mask is enabled, test channel masks in CR2 */
3402 if (i > 31) i = 31;
3403 if ((regs->CR(2) & (0x80000000 >> i)) == 0)
3404 return
3405 #if defined(_FEATURE_IO_ASSIST)
3406 SIE_MODE(regs) ? SIE_INTERCEPT_IOINTP :
3407 #endif
3408 0;
3409 }
3410 #endif /*FEATURE_S370_CHANNEL*/
3411
3412 #ifdef FEATURE_CHANNEL_SUBSYSTEM
3413 /* Ignore this device if subchannel not enabled */
3414 if (!(dev->pmcw.flag5 & PMCW5_E))
3415 return 0;
3416
3417 /* Isolate the interruption subclass */
3418 i =
3419 #if defined(_FEATURE_IO_ASSIST)
3420 /* For I/O Assisted devices use the guest (V)ISC */
3421 SIE_MODE(regs) ? (dev->pmcw.flag25 & PMCW25_VISC) :
3422 #endif
3423 ((dev->pmcw.flag4 & PMCW4_ISC) >> 3);
3424
3425 /* Test interruption subclass mask bit in CR6 */
3426 if ((regs->CR_L(6) & (0x80000000 >> i)) == 0)
3427 return
3428 #if defined(_FEATURE_IO_ASSIST)
3429 SIE_MODE(regs) ? SIE_INTERCEPT_IOINTP :
3430 #endif
3431 0;
3432 #endif /*FEATURE_CHANNEL_SUBSYSTEM*/
3433
3434 /* Interrupts are enabled for this device */
3435 return SIE_NO_INTERCEPT;
3436 } /* end function interrupt_enabled */
3437
3438 /*-------------------------------------------------------------------*/
3439 /* PRESENT PENDING I/O INTERRUPT */
3440 /* Finds a device with a pending condition for which an interrupt */
3441 /* is allowed by the CPU whose regs structure is passed as a */
3442 /* parameter. Clears the interrupt condition and returns the */
3443 /* I/O address and I/O interruption parameter (for channel subsystem)*/
3444 /* or the I/O address and CSW (for S/370 channels). */
3445 /* This routine does not perform a PSW switch. */
3446 /* The CSW pointer is NULL in the case of TPI. */
3447 /* The return value is the condition code for the TPI instruction: */
3448 /* 0 if no allowable pending interrupt exists, otherwise 1. */
3449 /* Note: The caller MUST hold the interrupt lock (sysblk.intlock). */
3450 /*-------------------------------------------------------------------*/
3451 /* I/O Assist: */
3452 /* This routine must return: */
3453 /* */
3454 /* 0 - In the case of no pending interrupt */
3455 /* SIE_NO_INTERCEPT - For a non-intercepted I/O interrupt */
3456 /* SIE_INTERCEPT_IOINT - For an I/O interrupt which must intercept */
3457 /* SIE_INTERCEPT_IOINTP- For a pending I/O interception */
3458 /* */
3459 /* SIE_INTERCEPT_IOINT may only be returned to a guest */
3460 /*-------------------------------------------------------------------*/
ARCH_DEP(present_io_interrupt)3461 int ARCH_DEP(present_io_interrupt) (REGS *regs, U32 *ioid,
3462 U32 *ioparm, U32 *iointid, BYTE *csw)
3463 {
3464 IOINT *io, *io2; /* -> I/O interrupt entry */
3465 DEVBLK *dev; /* -> Device control block */
3466 int icode = 0; /* Intercept code */
3467 #if defined(FEATURE_S370_CHANNEL)
3468 BYTE *pendcsw; /* Pending CSW */
3469 #endif
3470
3471 UNREFERENCED_370(ioparm);
3472 UNREFERENCED_370(iointid);
3473 #if defined(_FEATURE_IO_ASSIST)
3474 UNREFERENCED_390(iointid);
3475 #endif
3476 UNREFERENCED_390(csw);
3477 UNREFERENCED_900(csw);
3478
3479 /* Find a device with pending interrupt */
3480
3481 /* (N.B. devlock cannot be acquired while iointqlk held;
3482 iointqlk must be acquired after devlock) */
3483 retry:
3484 dev = NULL;
3485 obtain_lock(&sysblk.iointqlk);
3486 for (io = sysblk.iointq; io != NULL; io = io->next)
3487 {
3488 /* Exit loop if enabled for interrupts from this device */
3489 if ((icode = ARCH_DEP(interrupt_enabled)(regs, io->dev))
3490 #if defined(_FEATURE_IO_ASSIST)
3491 && icode != SIE_INTERCEPT_IOINTP
3492 #endif
3493 )
3494 {
3495 dev = io->dev;
3496 break;
3497 }
3498
3499 /* See if another CPU can take this interrupt */
3500 WAKEUP_CPU_MASK (sysblk.waiting_mask);
3501
3502 } /* end for(io) */
3503
3504 #if defined(_FEATURE_IO_ASSIST)
3505 /* In the case of I/O assist, do a rescan, to see if there are
3506 any devices with pending subclasses for which we are not
3507 enabled, if so cause a interception */
3508 if (io == NULL && SIE_MODE(regs))
3509 {
3510 /* Find a device with a pending interrupt, regardless
3511 of the interrupt subclass mask */
3512 ASSERT(dev == NULL);
3513 for (io = sysblk.iointq; io != NULL; io = io->next)
3514 {
3515 /* Exit loop if pending interrupts from this device */
3516 if ((icode = ARCH_DEP(interrupt_enabled)(regs, io->dev)))
3517 {
3518 dev = io->dev;
3519 break;
3520 }
3521 } /* end for(io) */
3522 }
3523 #endif
3524 release_lock(&sysblk.iointqlk);
3525
3526 /* If no interrupt pending, exit with condition code 0 */
3527 if (io == NULL)
3528 {
3529 ASSERT(dev == NULL);
3530 UPDATE_IC_IOPENDING();
3531 return 0;
3532 }
3533
3534 /* Obtain device lock for device with interrupt */
3535 ASSERT(dev != NULL);
3536 obtain_lock (&dev->lock);
3537
3538 /* Verify interrupt for this device still exists */
3539 obtain_lock(&sysblk.iointqlk);
3540 for (io2 = sysblk.iointq; io2 != NULL && io2 != io; io2 = io2->next);
3541
3542 if (io2 == NULL)
3543 {
3544 /* Our interrupt was dequeued; retry */
3545 release_lock(&sysblk.iointqlk);
3546 release_lock (&dev->lock);
3547 goto retry;
3548 }
3549
3550 #ifdef FEATURE_S370_CHANNEL
3551 /* Extract the I/O address and CSW */
3552 *ioid = dev->devnum;
3553 if(io->pcipending)
3554 {
3555 pendcsw=dev->pcicsw;
3556 memcpy (csw, pendcsw , 8);
3557 }
3558 if(io->pending)
3559 {
3560 pendcsw=dev->csw;
3561 memcpy (csw, pendcsw , 8);
3562 }
3563 if(io->attnpending)
3564 {
3565 pendcsw=dev->attncsw;
3566 memcpy (csw, pendcsw , 8);
3567 }
3568
3569 /* Display the channel status word */
3570 if (dev->ccwtrace || dev->ccwstep)
3571 display_csw (dev, csw);
3572 #endif /*FEATURE_S370_CHANNEL*/
3573
3574 #ifdef FEATURE_CHANNEL_SUBSYSTEM
3575 /* Extract the I/O address and interrupt parameter */
3576 *ioid = (dev->ssid << 16) | dev->subchan;
3577 FETCH_FW(*ioparm,dev->pmcw.intparm);
3578 #if defined(FEATURE_ESAME) || defined(_FEATURE_IO_ASSIST)
3579 *iointid =
3580 #if defined(_FEATURE_IO_ASSIST)
3581 /* For I/O Assisted devices use (V)ISC */
3582 (SIE_MODE(regs)) ?
3583 (icode == SIE_NO_INTERCEPT) ?
3584 ((dev->pmcw.flag25 & PMCW25_VISC) << 27) :
3585 ((dev->pmcw.flag25 & PMCW25_VISC) << 27)
3586 | (dev->pmcw.zone << 16)
3587 | ((dev->pmcw.flag27 & PMCW27_I) << 8) :
3588 #endif
3589 ((dev->pmcw.flag4 & PMCW4_ISC) << 24)
3590 #if defined(_FEATURE_IO_ASSIST)
3591 | (dev->pmcw.zone << 16)
3592 | ((dev->pmcw.flag27 & PMCW27_I) << 8)
3593 #endif
3594 ;
3595 #endif /*defined(FEATURE_ESAME) || defined(_FEATURE_IO_ASSIST)*/
3596 #endif /*FEATURE_CHANNEL_SUBSYSTEM*/
3597
3598 #if defined(_FEATURE_IO_ASSIST)
3599 /* Do not drain pending interrupts on intercept due to
3600 zero ISC mask */
3601 if(!SIE_MODE(regs) || icode != SIE_INTERCEPT_IOINTP)
3602 #endif
3603 {
3604 if(!SIE_MODE(regs) || icode != SIE_NO_INTERCEPT)
3605 dev->pmcw.flag27 &= ~PMCW27_I;
3606
3607 /* Dequeue the interrupt */
3608 DEQUEUE_IO_INTERRUPT_QLOCKED(io);
3609 UPDATE_IC_IOPENDING_QLOCKED();
3610
3611 /* Signal console thread to redrive select */
3612 if (dev->console)
3613 SIGNAL_CONSOLE_THREAD();
3614 }
3615 release_lock(&sysblk.iointqlk);
3616 release_lock (&dev->lock);
3617
3618 /* Exit with condition code indicating interrupt cleared */
3619 return icode;
3620
3621 } /* end function present_io_interrupt */
3622
3623
3624 #if defined(_FEATURE_IO_ASSIST)
ARCH_DEP(present_zone_io_interrupt)3625 int ARCH_DEP(present_zone_io_interrupt) (U32 *ioid, U32 *ioparm,
3626 U32 *iointid, BYTE zone)
3627 {
3628 IOINT *io; /* -> I/O interrupt entry */
3629 DEVBLK *dev; /* -> Device control block */
3630 typedef struct _DEVLIST { /* list of device block ptrs */
3631 struct _DEVLIST *next; /* next list entry or NULL */
3632 DEVBLK *dev; /* DEVBLK in requested zone */
3633 U16 ssid; /* Subsystem ID incl. lcssid */
3634 U16 subchan; /* Subchannel number */
3635 FWORD intparm; /* Interruption parameter */
3636 int visc; /* Guest Interrupt Subclass */
3637 } DEVLIST;
3638 DEVLIST *pDEVLIST, *pPrevDEVLIST = NULL;/* (work) */
3639 DEVLIST *pZoneDevs = NULL; /* devices in requested zone */
3640
3641 /* Gather devices within our zone with pending interrupt flagged */
3642 for (dev = sysblk.firstdev; dev; dev = dev->nextdev)
3643 {
3644 obtain_lock (&dev->lock);
3645
3646 if (1
3647 /* Pending interrupt flagged */
3648 && (dev->pending || dev->pcipending)
3649 /* Subchannel valid and enabled */
3650 && ((dev->pmcw.flag5 & (PMCW5_E | PMCW5_V)) == (PMCW5_E | PMCW5_V))
3651 /* Within requested zone */
3652 && (dev->pmcw.zone == zone)
3653 )
3654 {
3655 /* (save this device for further scrutiny) */
3656 pDEVLIST = malloc( sizeof(DEVLIST) );
3657 pDEVLIST->next = NULL;
3658 pDEVLIST->dev = dev;
3659 pDEVLIST->ssid = dev->ssid;
3660 pDEVLIST->subchan = dev->subchan;
3661 // pDEVLIST->intparm = dev->pmcw.intparm;
3662 memcpy( pDEVLIST->intparm, dev->pmcw.intparm, sizeof(pDEVLIST->intparm) );
3663 pDEVLIST->visc = (dev->pmcw.flag25 & PMCW25_VISC);
3664
3665 if (!pZoneDevs)
3666 pZoneDevs = pDEVLIST;
3667
3668 if (pPrevDEVLIST)
3669 pPrevDEVLIST->next = pDEVLIST;
3670
3671 pPrevDEVLIST = pDEVLIST;
3672 }
3673
3674 release_lock (&dev->lock);
3675 }
3676
3677 /* Exit with condition code 0 if no devices
3678 within our zone with a pending interrupt */
3679 if (!pZoneDevs)
3680 return 0;
3681
3682 /* Remove from our list those devices
3683 without a pending interrupt queued */
3684 obtain_lock(&sysblk.iointqlk);
3685 for (pDEVLIST = pZoneDevs, pPrevDEVLIST = NULL; pDEVLIST;)
3686 {
3687 /* Search interrupt queue for this device */
3688 for (io = sysblk.iointq; io != NULL && io->dev != pDEVLIST->dev; io = io->next);
3689
3690 /* Is interrupt queued for this device? */
3691 if (io == NULL)
3692 {
3693 /* No, remove it from our list */
3694 if (!pPrevDEVLIST)
3695 {
3696 ASSERT(pDEVLIST == pZoneDevs);
3697 pZoneDevs = pDEVLIST->next;
3698 free(pDEVLIST);
3699 pDEVLIST = pZoneDevs;
3700 }
3701 else
3702 {
3703 pPrevDEVLIST->next = pDEVLIST->next;
3704 free(pDEVLIST);
3705 pDEVLIST = pPrevDEVLIST->next;
3706 }
3707 }
3708 else
3709 {
3710 /* Yes, go on to next list entry */
3711 pPrevDEVLIST = pDEVLIST;
3712 pDEVLIST = pDEVLIST->next;
3713 }
3714 }
3715 release_lock(&sysblk.iointqlk);
3716
3717 /* If no devices remain, exit with condition code 0 */
3718 if (!pZoneDevs)
3719 return 0;
3720
3721 /* Extract the I/O address and interrupt parameter
3722 for the first pending subchannel */
3723 dev = pZoneDevs->dev;
3724 *ioid = (pZoneDevs->ssid << 16) | pZoneDevs->subchan;
3725 FETCH_FW(*ioparm,pZoneDevs->intparm);
3726 *iointid = (0x80000000 >> pZoneDevs->visc) | (zone << 16);
3727 pDEVLIST = pZoneDevs->next;
3728 free (pZoneDevs);
3729
3730 /* Find all other pending subclasses */
3731 while (pDEVLIST)
3732 {
3733 *iointid |= (0x80000000 >> pDEVLIST->visc);
3734 pPrevDEVLIST = pDEVLIST;
3735 pDEVLIST = pDEVLIST->next;
3736 free (pPrevDEVLIST);
3737 }
3738
3739 /* Exit with condition code indicating interrupt pending */
3740 return 1;
3741
3742 } /* end function present_zone_io_interrupt */
3743 #endif
3744
3745 #if !defined(_GEN_ARCH)
3746
3747 #if defined(_ARCHMODE2)
3748 #define _GEN_ARCH _ARCHMODE2
3749 #include "channel.c"
3750 #endif
3751
3752 #if defined(_ARCHMODE3)
3753 #undef _GEN_ARCH
3754 #define _GEN_ARCH _ARCHMODE3
3755 #include "channel.c"
3756 #endif
3757
3758
device_attention(DEVBLK * dev,BYTE unitstat)3759 int device_attention (DEVBLK *dev, BYTE unitstat)
3760 {
3761 switch(sysblk.arch_mode) {
3762 #if defined(_370)
3763 case ARCH_370:
3764 /* Do NOT raise if initial power-on state */
3765 /*
3766 * FIXME : The dev->crwpending test in S/370
3767 * mode prevents any devices added
3768 * at run time after IPL from being
3769 * operational. The test has been
3770 * temporarily disabled until it is
3771 * either confirmed as being superfluous
3772 * or another solution is found.
3773 * ISW 20070109
3774 */
3775 /*
3776 if (dev->crwpending) return 3;
3777 */
3778 return s370_device_attention(dev, unitstat);
3779 #endif
3780 #if defined(_390)
3781 case ARCH_390: return s390_device_attention(dev, unitstat);
3782 #endif
3783 #if defined(_900)
3784 case ARCH_900: return z900_device_attention(dev, unitstat);
3785 #endif
3786 }
3787 return 3;
3788 }
3789
call_execute_ccw_chain(int arch_mode,void * pDevBlk)3790 void call_execute_ccw_chain(int arch_mode, void* pDevBlk)
3791 {
3792 switch (arch_mode)
3793 {
3794 #if defined(_370)
3795 case ARCH_370: s370_execute_ccw_chain((DEVBLK*)pDevBlk); break;
3796 #endif
3797 #if defined(_390)
3798 case ARCH_390: s390_execute_ccw_chain((DEVBLK*)pDevBlk); break;
3799 #endif
3800 #if defined(_900)
3801 case ARCH_900: z900_execute_ccw_chain((DEVBLK*)pDevBlk); break;
3802 #endif
3803 }
3804 }
3805
3806 #endif /*!defined(_GEN_ARCH)*/
3807