1 /* $OpenBSD: tsc.c,v 1.17 2022/03/13 08:04:13 mpi Exp $ */
2 /* $NetBSD: tsc.c,v 1.3 2000/06/25 19:17:40 thorpej Exp $ */
3
4 /*-
5 * Copyright (c) 1999 by Ross Harvey. All rights reserved.
6 *
7 * Redistribution and use in source and binary forms, with or without
8 * modification, are permitted provided that the following conditions
9 * are met:
10 * 1. Redistributions of source code must retain the above copyright
11 * notice, this list of conditions and the following disclaimer.
12 * 2. Redistributions in binary form must reproduce the above copyright
13 * notice, this list of conditions and the following disclaimer in the
14 * documentation and/or other materials provided with the distribution.
15 * 3. All advertising materials mentioning features or use of this software
16 * must display the following acknowledgement:
17 * This product includes software developed by Ross Harvey.
18 * 4. The name of Ross Harvey may not be used to endorse or promote products
19 * derived from this software without specific prior written permission.
20 *
21 * THIS SOFTWARE IS PROVIDED BY ROSS HARVEY ``AS IS'' AND ANY EXPRESS
22 * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
23 * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP0SE
24 * ARE DISCLAIMED. IN NO EVENT SHALL ROSS HARVEY BE LIABLE FOR ANY
25 * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31 * SUCH DAMAGE.
32 *
33 */
34
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/device.h>
38 #include <sys/malloc.h>
39
40 #include <machine/autoconf.h>
41 #include <machine/rpb.h>
42
43 #include <dev/isa/isareg.h>
44 #include <dev/isa/isavar.h>
45 #include <dev/pci/pcireg.h>
46 #include <dev/pci/pcivar.h>
47 #include <alpha/pci/tsreg.h>
48 #include <alpha/pci/tsvar.h>
49
50 #ifdef DEC_6600
51 #include <alpha/pci/pci_6600.h>
52 #endif
53
54 #define tsc() { Generate ctags(1) key. }
55
56 int tscmatch(struct device *, void *, void *);
57 void tscattach(struct device *, struct device *, void *);
58
59 const struct cfattach tsc_ca = {
60 sizeof(struct device), tscmatch, tscattach,
61 };
62
63 struct cfdriver tsc_cd = {
64 NULL, "tsc", DV_DULL,
65 };
66
67 struct tsp_config tsp_configuration[4];
68
69 static int tscprint(void *, const char *pnp);
70
71 int tspmatch(struct device *, void *, void *);
72 void tspattach(struct device *, struct device *, void *);
73
74 const struct cfattach tsp_ca = {
75 sizeof(struct tsp_softc), tspmatch, tspattach,
76 };
77
78 struct cfdriver tsp_cd = {
79 NULL, "tsp", DV_DULL,
80 };
81
82
83 static int tspprint(void *, const char *pnp);
84
85 #if 0
86 static int tsp_bus_get_window(int, int,
87 struct alpha_bus_space_translation *);
88 #endif
89
90 /* There can be only one */
91 static int tscfound;
92
93 /* Which hose is the display console connected to? */
94 int tsp_console_hose;
95
96 int
tscmatch(parent,match,aux)97 tscmatch(parent, match, aux)
98 struct device *parent;
99 void *match;
100 void *aux;
101 {
102 struct mainbus_attach_args *ma = aux;
103
104 switch (cputype) {
105 case ST_DEC_6600:
106 case ST_DEC_TITAN:
107 return strcmp(ma->ma_name, tsc_cd.cd_name) == 0 && !tscfound;
108 default:
109 return 0;
110 }
111 }
112
113 void
tscattach(parent,self,aux)114 tscattach(parent, self, aux)
115 struct device *parent, *self;
116 void *aux;
117 {
118 int i;
119 int nbus;
120 u_int64_t csc, aar;
121 struct tsp_attach_args tsp;
122 struct mainbus_attach_args *ma = aux;
123 int titan = cputype == ST_DEC_TITAN;
124
125 tscfound = 1;
126
127 csc = LDQP(TS_C_CSC);
128
129 nbus = 1 + (CSC_BC(csc) >= 2);
130 printf(": 2127%c Chipset, Cchip rev %d\n"
131 "%s%d: %c Dchips, %d memory bus%s of %d bytes\n",
132 titan ? '4' : '2', (int)MISC_REV(LDQP(TS_C_MISC)),
133 ma->ma_name, ma->ma_slot, "2448"[CSC_BC(csc)],
134 nbus, nbus > 1 ? "es" : "", 16 + 16 * ((csc & CSC_AW) != 0));
135 printf("%s%d: arrays present: ", ma->ma_name, ma->ma_slot);
136 for(i = 0; i < 4; ++i) {
137 aar = LDQP(TS_C_AAR0 + i * TS_STEP);
138 printf("%s%dMB%s", i ? ", " : "", (8 << AAR_ASIZ(aar)) & ~0xf,
139 aar & AAR_SPLIT ? " (split)" : "");
140 }
141 printf(", Dchip 0 rev %d\n", (int)LDQP(TS_D_DREV) & 0xf);
142
143 tsp.tsp_name = "tsp";
144 tsp.tsp_slot = 0;
145 config_found(self, &tsp, tscprint);
146 if (titan) {
147 tsp.tsp_slot += 2;
148 config_found(self, &tsp, tscprint);
149 }
150
151 if (csc & CSC_P1P) {
152 tsp.tsp_slot = 1;
153 config_found(self, &tsp, tscprint);
154 if (titan) {
155 tsp.tsp_slot += 2;
156 config_found(self, &tsp, tscprint);
157 }
158 }
159
160 tsp.tsp_name = "tsciic";
161 tsp.tsp_slot = -1;
162 config_found(self, &tsp, tscprint);
163 }
164
165 static int
tscprint(aux,p)166 tscprint(aux, p)
167 void *aux;
168 const char *p;
169 {
170 struct tsp_attach_args *tsp = aux;
171
172 if (p)
173 printf("%s at %s", tsp->tsp_name, p);
174 if (tsp->tsp_slot >= 0)
175 printf(" hose %d", tsp->tsp_slot);
176 return UNCONF;
177 }
178
179 #define tsp() { Generate ctags(1) key. }
180
181 int
tspmatch(parent,match,aux)182 tspmatch(parent, match, aux)
183 struct device *parent;
184 void *match;
185 void *aux;
186 {
187 struct tsp_attach_args *t = aux;
188
189 switch (cputype) {
190 case ST_DEC_6600:
191 case ST_DEC_TITAN:
192 return strcmp(t->tsp_name, tsp_cd.cd_name) == 0;
193 default:
194 return 0;
195 }
196 }
197
198 void
tspattach(parent,self,aux)199 tspattach(parent, self, aux)
200 struct device *parent, *self;
201 void *aux;
202 {
203 struct pcibus_attach_args pba;
204 struct tsp_attach_args *t = aux;
205 struct tsp_config *pcp;
206
207 printf("\n");
208 pcp = tsp_init(1, t->tsp_slot);
209
210 tsp_dma_init(self, pcp);
211
212 /*
213 * Do PCI memory initialization that needs to be deferred until
214 * malloc is safe. On the Tsunami, we need to do this after
215 * DMA is initialized, as well.
216 */
217 tsp_bus_mem_init2(pcp);
218
219 pci_6600_pickintr(pcp);
220
221 bzero(&pba, sizeof(pba));
222 pba.pba_busname = "pci";
223 pba.pba_iot = &pcp->pc_iot;
224 pba.pba_memt = &pcp->pc_memt;
225 pba.pba_dmat =
226 alphabus_dma_get_tag(&pcp->pc_dmat_direct, ALPHA_BUS_PCI);
227 pba.pba_pc = &pcp->pc_pc;
228 pba.pba_domain = pci_ndomains++;
229 pba.pba_bus = 0;
230 #ifdef notyet
231 pba.pba_flags = PCI_FLAGS_IO_ENABLED | PCI_FLAGS_MEM_ENABLED |
232 PCI_FLAGS_MRL_OKAY | PCI_FLAGS_MRM_OKAY | PCI_FLAGS_MWI_OKAY;
233 #endif
234 config_found(self, &pba, tspprint);
235 }
236
237 struct tsp_config *
tsp_init(mallocsafe,n)238 tsp_init(mallocsafe, n)
239 int mallocsafe;
240 int n; /* hose number */
241 {
242 struct tsp_config *pcp;
243 int titan = cputype == ST_DEC_TITAN;
244
245 KASSERT(n >= 0 && n < nitems(tsp_configuration));
246 pcp = &tsp_configuration[n];
247 pcp->pc_pslot = n;
248 pcp->pc_iobase = TS_Pn(n, 0);
249 pcp->pc_csr = S_PAGE(TS_Pn(n & 1, P_CSRBASE));
250 if (n & 2) {
251 /* `A' port of PA Chip */
252 pcp->pc_csr++;
253 }
254 if (titan) {
255 /* same address on G and A ports */
256 pcp->pc_tlbia = &pcp->pc_csr->port.g.tsp_tlbia.tsg_r;
257 } else {
258 pcp->pc_tlbia = &pcp->pc_csr->port.p.tsp_tlbia.tsg_r;
259 }
260 snprintf(pcp->pc_io_ex_name, sizeof pcp->pc_io_ex_name,
261 "tsp%d_bus_io", n);
262 snprintf(pcp->pc_mem_ex_name, sizeof pcp->pc_mem_ex_name,
263 "tsp%d_bus_mem", n);
264
265 if (!pcp->pc_initted) {
266 tsp_bus_io_init(&pcp->pc_iot, pcp);
267 tsp_bus_mem_init(&pcp->pc_memt, pcp);
268 #if 0
269 alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_IO] = 1;
270 alpha_bus_window_count[ALPHA_BUS_TYPE_PCI_MEM] = 1;
271
272 alpha_bus_get_window = tsp_bus_get_window;
273 #endif
274 }
275 pcp->pc_mallocsafe = mallocsafe;
276 tsp_pci_init(&pcp->pc_pc, pcp);
277 alpha_pci_chipset = &pcp->pc_pc;
278 if (titan)
279 alpha_pci_chipset->pc_name = "titan";
280 else
281 alpha_pci_chipset->pc_name = "tsunami";
282 alpha_pci_chipset->pc_mem = P_PCI_MEM;
283 alpha_pci_chipset->pc_ports = P_PCI_IO;
284 alpha_pci_chipset->pc_hae_mask = 0;
285 alpha_pci_chipset->pc_dense = TS_P0(0); /* XXX */
286 alpha_pci_chipset->pc_bwx = 1;
287 pcp->pc_initted = 1;
288 return pcp;
289 }
290
291 static int
tspprint(aux,p)292 tspprint(aux, p)
293 void *aux;
294 const char *p;
295 {
296 register struct pcibus_attach_args *pci = aux;
297
298 if (p)
299 printf("%s at %s", pci->pba_busname, p);
300 printf(" bus %d", pci->pba_bus);
301 return UNCONF;
302 }
303
304 #if 0
305 static int
306 tsp_bus_get_window(type, window, abst)
307 int type, window;
308 struct alpha_bus_space_translation *abst;
309 {
310 struct tsp_config *tsp = &tsp_configuration[tsp_console_hose];
311 bus_space_tag_t st;
312 int error;
313
314 switch (type) {
315 case ALPHA_BUS_TYPE_PCI_IO:
316 st = &tsp->pc_iot;
317 break;
318
319 case ALPHA_BUS_TYPE_PCI_MEM:
320 st = &tsp->pc_memt;
321 break;
322
323 default:
324 panic("tsp_bus_get_window");
325 }
326
327 error = alpha_bus_space_get_window(st, window, abst);
328 if (error)
329 return (error);
330
331 abst->abst_sys_start = TS_PHYSADDR(abst->abst_sys_start);
332 abst->abst_sys_end = TS_PHYSADDR(abst->abst_sys_end);
333
334 return (0);
335 }
336 #endif
337