xref: /openbsd/sys/arch/alpha/pci/tsp_pci.c (revision b1926db3)
1 /* $OpenBSD: tsp_pci.c,v 1.4 2010/12/04 17:06:31 miod Exp $ */
2 /* $NetBSD: tsp_pci.c,v 1.1 1999/06/29 06:46:47 ross Exp $ */
3 
4 /*-
5  * Copyright (c) 1999 by Ross Harvey.  All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  * 3. All advertising materials mentioning features or use of this software
16  *    must display the following acknowledgement:
17  *	This product includes software developed by Ross Harvey.
18  * 4. The name of Ross Harvey may not be used to endorse or promote products
19  *    derived from this software without specific prior written permission.
20  *
21  * THIS SOFTWARE IS PROVIDED BY ROSS HARVEY ``AS IS'' AND ANY EXPRESS
22  * OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
23  * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURP0SE
24  * ARE DISCLAIMED.  IN NO EVENT SHALL ROSS HARVEY BE LIABLE FOR ANY
25  * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31  * SUCH DAMAGE.
32  *
33  */
34 
35 #include <sys/param.h>
36 #include <sys/systm.h>
37 #include <sys/kernel.h>
38 #include <sys/device.h>
39 
40 #include <uvm/uvm_extern.h>
41 
42 #include <dev/pci/pcireg.h>
43 #include <dev/pci/pcivar.h>
44 
45 #include <machine/autoconf.h>
46 #include <machine/rpb.h>
47 
48 #include <alpha/pci/tsreg.h>
49 #include <alpha/pci/tsvar.h>
50 
51 #define tsp_pci() { Generate ctags(1) key. }
52 
53 void		tsp_attach_hook(struct device *, struct device *,
54 		    struct pcibus_attach_args *);
55 int		tsp_bus_maxdevs(void *, int);
56 pcitag_t	tsp_make_tag(void *, int, int, int);
57 void		tsp_decompose_tag(void *, pcitag_t, int *, int *,
58 		    int *);
59 int		tsp_conf_size(void *, pcitag_t);
60 pcireg_t	tsp_conf_read(void *, pcitag_t, int);
61 void		tsp_conf_write(void *, pcitag_t, int, pcireg_t);
62 
63 void
tsp_pci_init(pc,v)64 tsp_pci_init(pc, v)
65 	pci_chipset_tag_t pc;
66 	void *v;
67 {
68 	pc->pc_conf_v = v;
69 	pc->pc_attach_hook = tsp_attach_hook;
70 	pc->pc_bus_maxdevs = tsp_bus_maxdevs;
71 	pc->pc_make_tag = tsp_make_tag;
72 	pc->pc_decompose_tag = tsp_decompose_tag;
73 	pc->pc_conf_size = tsp_conf_size;
74 	pc->pc_conf_read = tsp_conf_read;
75 	pc->pc_conf_write = tsp_conf_write;
76 }
77 
78 void
tsp_attach_hook(parent,self,pba)79 tsp_attach_hook(parent, self, pba)
80 	struct device *parent, *self;
81 	struct pcibus_attach_args *pba;
82 {
83 }
84 
85 int
tsp_bus_maxdevs(cpv,busno)86 tsp_bus_maxdevs(cpv, busno)
87 	void *cpv;
88 	int busno;
89 {
90 	return 32;
91 }
92 
93 pcitag_t
tsp_make_tag(cpv,b,d,f)94 tsp_make_tag(cpv, b, d, f)
95 	void *cpv;
96 	int b, d, f;
97 {
98 	return b << 16 | d << 11 | f << 8;
99 }
100 
101 void
tsp_decompose_tag(cpv,tag,bp,dp,fp)102 tsp_decompose_tag(cpv, tag, bp, dp, fp)
103 	void *cpv;
104 	pcitag_t tag;
105 	int *bp, *dp, *fp;
106 {
107 	if (bp != NULL)
108 		*bp = (tag >> 16) & 0xff;
109 	if (dp != NULL)
110 		*dp = (tag >> 11) & 0x1f;
111 	if (fp != NULL)
112 		*fp = (tag >> 8) & 0x7;
113 }
114 
115 int
tsp_conf_size(void * cpv,pcitag_t tag)116 tsp_conf_size(void *cpv, pcitag_t tag)
117 {
118 	return PCI_CONFIG_SPACE_SIZE;
119 }
120 
121 /*
122  * Tsunami makes this a lot easier than it used to be, automatically
123  * generating type 0 or type 1 cycles, and quietly returning -1 with
124  * no errors on unanswered probes.
125  */
126 pcireg_t
tsp_conf_read(cpv,tag,offset)127 tsp_conf_read(cpv, tag, offset)
128 	void *cpv;
129 	pcitag_t tag;
130 	int offset;
131 {
132 	pcireg_t *datap, data;
133 	struct tsp_config *pcp = cpv;
134 
135 	datap = S_PAGE(pcp->pc_iobase | P_PCI_CONFIG | tag | (offset & ~3));
136 	alpha_mb();
137 	data = *datap;
138 	alpha_mb();
139 	return data;
140 }
141 
142 void
tsp_conf_write(cpv,tag,offset,data)143 tsp_conf_write(cpv, tag, offset, data)
144 	void *cpv;
145 	pcitag_t tag;
146 	int offset;
147 	pcireg_t data;
148 {
149 	pcireg_t *datap;
150 	struct tsp_config *pcp = cpv;
151 
152 	datap = S_PAGE(pcp->pc_iobase | P_PCI_CONFIG | tag | (offset & ~3));
153 	alpha_mb();
154 	*datap = data;
155 	alpha_mb();
156 }
157