1 /* $NetBSD: twa.c,v 1.61 2021/12/10 20:36:04 andvar Exp $ */
2 /* $wasabi: twa.c,v 1.27 2006/07/28 18:17:21 wrstuden Exp $ */
3
4 /*-
5 * Copyright (c) 2004 The NetBSD Foundation, Inc.
6 * All rights reserved.
7 *
8 * This code is derived from software contributed to The NetBSD Foundation
9 * by Jordan Rhody of Wasabi Systems, Inc.
10 *
11 * Redistribution and use in source and binary forms, with or without
12 * modification, are permitted provided that the following conditions
13 * are met:
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in the
18 * documentation and/or other materials provided with the distribution.
19 *
20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 * POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 /*-
34 * Copyright (c) 2003-04 3ware, Inc.
35 * Copyright (c) 2000 Michael Smith
36 * Copyright (c) 2000 BSDi
37 * All rights reserved.
38 *
39 * Redistribution and use in source and binary forms, with or without
40 * modification, are permitted provided that the following conditions
41 * are met:
42 * 1. Redistributions of source code must retain the above copyright
43 * notice, this list of conditions and the following disclaimer.
44 * 2. Redistributions in binary form must reproduce the above copyright
45 * notice, this list of conditions and the following disclaimer in the
46 * documentation and/or other materials provided with the distribution.
47 *
48 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
49 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
50 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
51 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
52 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
53 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
54 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
55 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
56 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
57 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
58 * SUCH DAMAGE.
59 *
60 * $FreeBSD: src/sys/dev/twa/twa.c,v 1.2 2004/04/02 15:09:57 des Exp $
61 */
62
63 /*
64 * 3ware driver for 9000 series storage controllers.
65 *
66 * Author: Vinod Kashyap
67 */
68
69 #include <sys/cdefs.h>
70 __KERNEL_RCSID(0, "$NetBSD: twa.c,v 1.61 2021/12/10 20:36:04 andvar Exp $");
71
72 //#define TWA_DEBUG
73
74 #include <sys/param.h>
75 #include <sys/systm.h>
76 #include <sys/kernel.h>
77 #include <sys/device.h>
78 #include <sys/queue.h>
79 #include <sys/proc.h>
80 #include <sys/bswap.h>
81 #include <sys/buf.h>
82 #include <sys/bufq.h>
83 #include <sys/endian.h>
84 #include <sys/malloc.h>
85 #include <sys/conf.h>
86 #include <sys/disk.h>
87 #include <sys/sysctl.h>
88 #include <sys/syslog.h>
89 #include <sys/module.h>
90 #include <sys/bus.h>
91
92 #include <dev/pci/pcireg.h>
93 #include <dev/pci/pcivar.h>
94 #include <dev/pci/pcidevs.h>
95 #include <dev/pci/twareg.h>
96 #include <dev/pci/twavar.h>
97 #include <dev/pci/twaio.h>
98
99 #include <dev/scsipi/scsipi_all.h>
100 #include <dev/scsipi/scsipi_disk.h>
101 #include <dev/scsipi/scsipiconf.h>
102 #include <dev/scsipi/scsi_spc.h>
103
104 #include <dev/ldvar.h>
105
106 #include "locators.h"
107 #include "ioconf.h"
108
109 #define PCI_CBIO 0x10
110
111 static int twa_fetch_aen(struct twa_softc *);
112 static void twa_aen_callback(struct twa_request *);
113 static int twa_find_aen(struct twa_softc *sc, uint16_t);
114 static uint16_t twa_enqueue_aen(struct twa_softc *sc,
115 struct twa_command_header *);
116
117 static void twa_attach(device_t, device_t, void *);
118 static int twa_request_bus_scan(device_t, const char *, const int *);
119 static void twa_shutdown(void *);
120 static int twa_init_connection(struct twa_softc *, uint16_t, uint32_t,
121 uint16_t, uint16_t, uint16_t, uint16_t,
122 uint16_t *, uint16_t *, uint16_t *,
123 uint16_t *, uint32_t *);
124 static int twa_intr(void *);
125 static int twa_match(device_t, cfdata_t, void *);
126 static int twa_reset(struct twa_softc *);
127
128 static int twa_print(void *, const char *);
129 static int twa_soft_reset(struct twa_softc *);
130
131 static int twa_check_ctlr_state(struct twa_softc *, uint32_t);
132 static int twa_get_param(struct twa_softc *, int, int, size_t,
133 void (* callback)(struct twa_request *),
134 struct twa_param_9k **);
135 static int twa_set_param(struct twa_softc *, int, int, int, void *,
136 void (* callback)(struct twa_request *));
137 static void twa_describe_controller(struct twa_softc *);
138 static int twa_wait_status(struct twa_softc *, uint32_t, uint32_t);
139 static int twa_done(struct twa_softc *);
140
141 extern struct cfdriver twa_cd;
142 extern uint32_t twa_fw_img_size;
143 extern uint8_t twa_fw_img[];
144
145 CFATTACH_DECL3_NEW(twa, sizeof(struct twa_softc),
146 twa_match, twa_attach, NULL, NULL, twa_request_bus_scan, NULL, 0);
147
148 /* FreeBSD driver revision for sysctl expected by the 3ware cli */
149 const char twaver[] = "1.50.01.002";
150
151 /* AEN messages. */
152 static const struct twa_message twa_aen_table[] = {
153 {0x0000, "AEN queue empty"},
154 {0x0001, "Controller reset occurred"},
155 {0x0002, "Degraded unit detected"},
156 {0x0003, "Controller error occurred"},
157 {0x0004, "Background rebuild failed"},
158 {0x0005, "Background rebuild done"},
159 {0x0006, "Incomplete unit detected"},
160 {0x0007, "Background initialize done"},
161 {0x0008, "Unclean shutdown detected"},
162 {0x0009, "Drive timeout detected"},
163 {0x000A, "Drive error detected"},
164 {0x000B, "Rebuild started"},
165 {0x000C, "Background initialize started"},
166 {0x000D, "Entire logical unit was deleted"},
167 {0x000E, "Background initialize failed"},
168 {0x000F, "SMART attribute exceeded threshold"},
169 {0x0010, "Power supply reported AC under range"},
170 {0x0011, "Power supply reported DC out of range"},
171 {0x0012, "Power supply reported a malfunction"},
172 {0x0013, "Power supply predicted malfunction"},
173 {0x0014, "Battery charge is below threshold"},
174 {0x0015, "Fan speed is below threshold"},
175 {0x0016, "Temperature sensor is above threshold"},
176 {0x0017, "Power supply was removed"},
177 {0x0018, "Power supply was inserted"},
178 {0x0019, "Drive was removed from a bay"},
179 {0x001A, "Drive was inserted into a bay"},
180 {0x001B, "Drive bay cover door was opened"},
181 {0x001C, "Drive bay cover door was closed"},
182 {0x001D, "Product case was opened"},
183 {0x0020, "Prepare for shutdown (power-off)"},
184 {0x0021, "Downgrade UDMA mode to lower speed"},
185 {0x0022, "Upgrade UDMA mode to higher speed"},
186 {0x0023, "Sector repair completed"},
187 {0x0024, "Sbuf memory test failed"},
188 {0x0025, "Error flushing cached write data to disk"},
189 {0x0026, "Drive reported data ECC error"},
190 {0x0027, "DCB has checksum error"},
191 {0x0028, "DCB version is unsupported"},
192 {0x0029, "Background verify started"},
193 {0x002A, "Background verify failed"},
194 {0x002B, "Background verify done"},
195 {0x002C, "Bad sector overwritten during rebuild"},
196 {0x002D, "Source drive error occurred"},
197 {0x002E, "Replace failed because replacement drive too small"},
198 {0x002F, "Verify failed because array was never initialized"},
199 {0x0030, "Unsupported ATA drive"},
200 {0x0031, "Synchronize host/controller time"},
201 {0x0032, "Spare capacity is inadequate for some units"},
202 {0x0033, "Background migration started"},
203 {0x0034, "Background migration failed"},
204 {0x0035, "Background migration done"},
205 {0x0036, "Verify detected and fixed data/parity mismatch"},
206 {0x0037, "SO-DIMM incompatible"},
207 {0x0038, "SO-DIMM not detected"},
208 {0x0039, "Corrected Sbuf ECC error"},
209 {0x003A, "Drive power on reset detected"},
210 {0x003B, "Background rebuild paused"},
211 {0x003C, "Background initialize paused"},
212 {0x003D, "Background verify paused"},
213 {0x003E, "Background migration paused"},
214 {0x003F, "Corrupt flash file system detected"},
215 {0x0040, "Flash file system repaired"},
216 {0x0041, "Unit number assignments were lost"},
217 {0x0042, "Error during read of primary DCB"},
218 {0x0043, "Latent error found in backup DCB"},
219 {0x0044, "Battery voltage is normal"},
220 {0x0045, "Battery voltage is low"},
221 {0x0046, "Battery voltage is high"},
222 {0x0047, "Battery voltage is too low"},
223 {0x0048, "Battery voltage is too high"},
224 {0x0049, "Battery temperature is normal"},
225 {0x004A, "Battery temperature is low"},
226 {0x004B, "Battery temperature is high"},
227 {0x004C, "Battery temperature is too low"},
228 {0x004D, "Battery temperature is too high"},
229 {0x004E, "Battery capacity test started"},
230 {0x004F, "Cache synchronization skipped"},
231 {0x0050, "Battery capacity test completed"},
232 {0x0051, "Battery health check started"},
233 {0x0052, "Battery health check completed"},
234 {0x0053, "Battery capacity test needed"},
235 {0x0054, "Battery charge termination voltage is at high level"},
236 {0x0055, "Battery charging started"},
237 {0x0056, "Battery charging completed"},
238 {0x0057, "Battery charging fault"},
239 {0x0058, "Battery capacity is below warning level"},
240 {0x0059, "Battery capacity is below error level"},
241 {0x005A, "Battery is present"},
242 {0x005B, "Battery is not present"},
243 {0x005C, "Battery is weak"},
244 {0x005D, "Battery health check failed"},
245 {0x005E, "Cache synchronized after power fail"},
246 {0x005F, "Cache synchronization failed; some data lost"},
247 {0x0060, "Bad cache meta data checksum"},
248 {0x0061, "Bad cache meta data signature"},
249 {0x0062, "Cache meta data restore failed"},
250 {0x0063, "BBU not found after power fail"},
251 {0x00FC, "Recovered/finished array membership update"},
252 {0x00FD, "Handler lockup"},
253 {0x00FE, "Retrying PCI transfer"},
254 {0x00FF, "AEN queue is full"},
255 {0xFFFFFFFF, NULL}
256 };
257
258 /* AEN severity table. */
259 static const char *twa_aen_severity_table[] = {
260 "None",
261 "ERROR",
262 "WARNING",
263 "INFO",
264 "DEBUG",
265 NULL
266 };
267
268 #if 0
269 /* Error messages. */
270 static const struct twa_message twa_error_table[] = {
271 {0x0100, "SGL entry contains zero data"},
272 {0x0101, "Invalid command opcode"},
273 {0x0102, "SGL entry has unaligned address"},
274 {0x0103, "SGL size does not match command"},
275 {0x0104, "SGL entry has illegal length"},
276 {0x0105, "Command packet is not aligned"},
277 {0x0106, "Invalid request ID"},
278 {0x0107, "Duplicate request ID"},
279 {0x0108, "ID not locked"},
280 {0x0109, "LBA out of range"},
281 {0x010A, "Logical unit not supported"},
282 {0x010B, "Parameter table does not exist"},
283 {0x010C, "Parameter index does not exist"},
284 {0x010D, "Invalid field in CDB"},
285 {0x010E, "Specified port has invalid drive"},
286 {0x010F, "Parameter item size mismatch"},
287 {0x0110, "Failed memory allocation"},
288 {0x0111, "Memory request too large"},
289 {0x0112, "Out of memory segments"},
290 {0x0113, "Invalid address to deallocate"},
291 {0x0114, "Out of memory"},
292 {0x0115, "Out of heap"},
293 {0x0120, "Double degrade"},
294 {0x0121, "Drive not degraded"},
295 {0x0122, "Reconstruct error"},
296 {0x0123, "Replace not accepted"},
297 {0x0124, "Replace drive capacity too small"},
298 {0x0125, "Sector count not allowed"},
299 {0x0126, "No spares left"},
300 {0x0127, "Reconstruct error"},
301 {0x0128, "Unit is offline"},
302 {0x0129, "Cannot update status to DCB"},
303 {0x0130, "Invalid stripe handle"},
304 {0x0131, "Handle that was not locked"},
305 {0x0132, "Handle that was not empy"},
306 {0x0133, "Handle has different owner"},
307 {0x0140, "IPR has parent"},
308 {0x0150, "Illegal Pbuf address alignment"},
309 {0x0151, "Illegal Pbuf transfer length"},
310 {0x0152, "Illegal Sbuf address alignment"},
311 {0x0153, "Illegal Sbuf transfer length"},
312 {0x0160, "Command packet too large"},
313 {0x0161, "SGL exceeds maximum length"},
314 {0x0162, "SGL has too many entries"},
315 {0x0170, "Insufficient resources for rebuilder"},
316 {0x0171, "Verify error (data != parity)"},
317 {0x0180, "Requested segment not in directory of this DCB"},
318 {0x0181, "DCB segment has unsupported version"},
319 {0x0182, "DCB segment has checksum error"},
320 {0x0183, "DCB support (settings) segment invalid"},
321 {0x0184, "DCB UDB (unit descriptor block) segment invalid"},
322 {0x0185, "DCB GUID (globally unique identifier) segment invalid"},
323 {0x01A0, "Could not clear Sbuf"},
324 {0x01C0, "Flash identify failed"},
325 {0x01C1, "Flash out of bounds"},
326 {0x01C2, "Flash verify error"},
327 {0x01C3, "Flash file object not found"},
328 {0x01C4, "Flash file already present"},
329 {0x01C5, "Flash file system full"},
330 {0x01C6, "Flash file not present"},
331 {0x01C7, "Flash file size error"},
332 {0x01C8, "Bad flash file checksum"},
333 {0x01CA, "Corrupt flash file system detected"},
334 {0x01D0, "Invalid field in parameter list"},
335 {0x01D1, "Parameter list length error"},
336 {0x01D2, "Parameter item is not changeable"},
337 {0x01D3, "Parameter item is not saveable"},
338 {0x0200, "UDMA CRC error"},
339 {0x0201, "Internal CRC error"},
340 {0x0202, "Data ECC error"},
341 {0x0203, "ADP level 1 error"},
342 {0x0204, "Port timeout"},
343 {0x0205, "Drive power on reset"},
344 {0x0206, "ADP level 2 error"},
345 {0x0207, "Soft reset failed"},
346 {0x0208, "Drive not ready"},
347 {0x0209, "Unclassified port error"},
348 {0x020A, "Drive aborted command"},
349 {0x0210, "Internal CRC error"},
350 {0x0211, "Host PCI bus abort"},
351 {0x0212, "Host PCI parity error"},
352 {0x0213, "Port handler error"},
353 {0x0214, "Token interrupt count error"},
354 {0x0215, "Timeout waiting for PCI transfer"},
355 {0x0216, "Corrected buffer ECC"},
356 {0x0217, "Uncorrected buffer ECC"},
357 {0x0230, "Unsupported command during flash recovery"},
358 {0x0231, "Next image buffer expected"},
359 {0x0232, "Binary image architecture incompatible"},
360 {0x0233, "Binary image has no signature"},
361 {0x0234, "Binary image has bad checksum"},
362 {0x0235, "Image downloaded overflowed buffer"},
363 {0x0240, "I2C device not found"},
364 {0x0241, "I2C transaction aborted"},
365 {0x0242, "SO-DIMM parameter(s) incompatible using defaults"},
366 {0x0243, "SO-DIMM unsupported"},
367 {0x0248, "SPI transfer status error"},
368 {0x0249, "SPI transfer timeout error"},
369 {0x0250, "Invalid unit descriptor size in CreateUnit"},
370 {0x0251, "Unit descriptor size exceeds data buffer in CreateUnit"},
371 {0x0252, "Invalid value in CreateUnit descriptor"},
372 {0x0253, "Inadequate disk space to support descriptor in CreateUnit"},
373 {0x0254, "Unable to create data channel for this unit descriptor"},
374 {0x0255, "CreateUnit descriptor specifies a drive already in use"},
375 {0x0256, "Unable to write configuration to all disks during CreateUnit"},
376 {0x0257, "CreateUnit does not support this descriptor version"},
377 {0x0258, "Invalid subunit for RAID 0 or 5 in CreateUnit"},
378 {0x0259, "Too many descriptors in CreateUnit"},
379 {0x025A, "Invalid configuration specified in CreateUnit descriptor"},
380 {0x025B, "Invalid LBA offset specified in CreateUnit descriptor"},
381 {0x025C, "Invalid stripelet size specified in CreateUnit descriptor"},
382 {0x0260, "SMART attribute exceeded threshold"},
383 {0xFFFFFFFF, NULL}
384 };
385 #endif
386
387 struct twa_pci_identity {
388 uint32_t vendor_id;
389 uint32_t product_id;
390 const char *name;
391 };
392
393 static const struct twa_pci_identity twa_pci_products[] = {
394 { PCI_VENDOR_3WARE,
395 PCI_PRODUCT_3WARE_9000,
396 "3ware 9000 series",
397 },
398 { PCI_VENDOR_3WARE,
399 PCI_PRODUCT_3WARE_9550,
400 "3ware 9550SX series",
401 },
402 { PCI_VENDOR_3WARE,
403 PCI_PRODUCT_3WARE_9650,
404 "3ware 9650SE series",
405 },
406 { PCI_VENDOR_3WARE,
407 PCI_PRODUCT_3WARE_9690,
408 "3ware 9690 series",
409 },
410 { 0,
411 0,
412 NULL,
413 },
414 };
415
416
417 static inline void
twa_outl(struct twa_softc * sc,int off,uint32_t val)418 twa_outl(struct twa_softc *sc, int off, uint32_t val)
419 {
420
421 bus_space_write_4(sc->twa_bus_iot, sc->twa_bus_ioh, off, val);
422 bus_space_barrier(sc->twa_bus_iot, sc->twa_bus_ioh, off, 4,
423 BUS_SPACE_BARRIER_WRITE);
424 }
425
twa_inl(struct twa_softc * sc,int off)426 static inline uint32_t twa_inl(struct twa_softc *sc, int off)
427 {
428
429 bus_space_barrier(sc->twa_bus_iot, sc->twa_bus_ioh, off, 4,
430 BUS_SPACE_BARRIER_WRITE | BUS_SPACE_BARRIER_READ);
431 return (bus_space_read_4(sc->twa_bus_iot, sc->twa_bus_ioh, off));
432 }
433
434 void
twa_request_wait_handler(struct twa_request * tr)435 twa_request_wait_handler(struct twa_request *tr)
436 {
437
438 wakeup(tr);
439 }
440
441 static const struct twa_pci_identity *
twa_lookup(pcireg_t id)442 twa_lookup(pcireg_t id)
443 {
444 const struct twa_pci_identity *entry;
445 int i;
446
447 for (i = 0; i < __arraycount(twa_pci_products); i++) {
448 entry = &twa_pci_products[i];
449 if (entry->vendor_id == PCI_VENDOR(id) &&
450 entry->product_id == PCI_PRODUCT(id)) {
451 return entry;
452 }
453 }
454 return NULL;
455 }
456
457 static int
twa_match(device_t parent,cfdata_t cfdata,void * aux)458 twa_match(device_t parent, cfdata_t cfdata, void *aux)
459 {
460 struct pci_attach_args *pa = aux;
461 const struct twa_pci_identity *entry;
462
463 entry = twa_lookup(pa->pa_id);
464 if (entry != NULL) {
465 return 1;
466 }
467 return (0);
468 }
469
470 static const char *
twa_find_msg_string(const struct twa_message * table,uint16_t code)471 twa_find_msg_string(const struct twa_message *table, uint16_t code)
472 {
473 int i;
474
475 for (i = 0; table[i].message != NULL; i++)
476 if (table[i].code == code)
477 return(table[i].message);
478
479 return(table[i].message);
480 }
481
482 void
twa_release_request(struct twa_request * tr)483 twa_release_request(struct twa_request *tr)
484 {
485 int s;
486 struct twa_softc *sc;
487
488 sc = tr->tr_sc;
489
490 if ((tr->tr_flags & TWA_CMD_AEN) == 0) {
491 s = splbio();
492 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_free, tr, tr_link);
493 splx(s);
494 if (__predict_false((tr->tr_sc->twa_sc_flags &
495 TWA_STATE_REQUEST_WAIT) != 0)) {
496 tr->tr_sc->twa_sc_flags &= ~TWA_STATE_REQUEST_WAIT;
497 wakeup(&sc->twa_free);
498 }
499 } else
500 tr->tr_flags &= ~TWA_CMD_AEN_BUSY;
501 }
502
503 static void
twa_unmap_request(struct twa_request * tr)504 twa_unmap_request(struct twa_request *tr)
505 {
506 struct twa_softc *sc = tr->tr_sc;
507 uint8_t cmd_status;
508 int s;
509
510 /* If the command involved data, unmap that too. */
511 if (tr->tr_data != NULL) {
512 if (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K)
513 cmd_status = tr->tr_command->command.cmd_pkt_9k.status;
514 else
515 cmd_status =
516 tr->tr_command->command.cmd_pkt_7k.generic.status;
517
518 if (tr->tr_flags & TWA_CMD_DATA_OUT) {
519 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map,
520 0, tr->tr_length, BUS_DMASYNC_POSTREAD);
521 /*
522 * If we are using a bounce buffer, and we are reading
523 * data, copy the real data in.
524 */
525 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED)
526 if (cmd_status == 0)
527 memcpy(tr->tr_real_data, tr->tr_data,
528 tr->tr_real_length);
529 }
530 if (tr->tr_flags & TWA_CMD_DATA_IN)
531 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map,
532 0, tr->tr_length, BUS_DMASYNC_POSTWRITE);
533
534 bus_dmamap_unload(sc->twa_dma_tag, tr->tr_dma_map);
535 }
536
537 /* Free alignment buffer if it was used. */
538 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) {
539 s = splvm();
540 uvm_km_kmem_free(kmem_va_arena, (vaddr_t)tr->tr_data,
541 tr->tr_length);
542 splx(s);
543 tr->tr_data = tr->tr_real_data;
544 tr->tr_length = tr->tr_real_length;
545 }
546 }
547
548 /*
549 * Function name: twa_wait_request
550 * Description: Sends down a firmware cmd, and waits for the completion,
551 * but NOT in a tight loop.
552 *
553 * Input: tr -- ptr to request pkt
554 * timeout -- max # of seconds to wait before giving up
555 * Output: None
556 * Return value: 0 -- success
557 * non-zero-- failure
558 */
559 static int
twa_wait_request(struct twa_request * tr,uint32_t timeout)560 twa_wait_request(struct twa_request *tr, uint32_t timeout)
561 {
562 time_t end_time;
563 struct timeval t1;
564 int s, rv;
565
566 tr->tr_flags |= TWA_CMD_SLEEP_ON_REQUEST;
567 tr->tr_callback = twa_request_wait_handler;
568 tr->tr_status = TWA_CMD_BUSY;
569
570 rv = twa_map_request(tr);
571
572 if (rv != 0)
573 return (rv);
574
575 microtime(&t1);
576 end_time = t1.tv_usec +
577 (timeout * 1000 * 100);
578
579 while (tr->tr_status != TWA_CMD_COMPLETE) {
580 rv = tr->tr_error;
581 if (rv != 0)
582 return(rv);
583 if ((rv = tsleep(tr, PRIBIO, "twawait", timeout * hz)) == 0)
584 break;
585
586 if (rv == EWOULDBLOCK) {
587 /*
588 * We will reset the controller only if the request has
589 * already been submitted, so as to not lose the
590 * request packet. If a busy request timed out, the
591 * reset will take care of freeing resources. If a
592 * pending request timed out, we will free resources
593 * for that request, right here. So, the caller is
594 * expected to NOT cleanup when ETIMEDOUT is returned.
595 */
596 if (tr->tr_status == TWA_CMD_BUSY)
597 twa_reset(tr->tr_sc);
598 else {
599 /* Request was never submitted. Clean up. */
600 s = splbio();
601 TAILQ_REMOVE(&tr->tr_sc->twa_pending, tr,
602 tr_link);
603 splx(s);
604
605 twa_unmap_request(tr);
606 if (tr->tr_data)
607 free(tr->tr_data, M_DEVBUF);
608
609 twa_release_request(tr);
610 }
611 return(ETIMEDOUT);
612 }
613 /*
614 * Either the request got completed, or we were woken up by a
615 * signal. Calculate the new timeout, in case it was the
616 * latter.
617 */
618 microtime(&t1);
619
620 timeout = (end_time - t1.tv_usec) / (1000 * 100);
621 }
622 return(rv);
623 }
624
625 /*
626 * Function name: twa_immediate_request
627 * Description: Sends down a firmware cmd, and waits for the completion
628 * in a tight loop.
629 *
630 * Input: tr -- ptr to request pkt
631 * timeout -- max # of seconds to wait before giving up
632 * Output: None
633 * Return value: 0 -- success
634 * non-zero-- failure
635 */
636 static int
twa_immediate_request(struct twa_request * tr,uint32_t timeout)637 twa_immediate_request(struct twa_request *tr, uint32_t timeout)
638 {
639 struct timeval t1;
640 int s = 0, rv = 0;
641
642 rv = twa_map_request(tr);
643
644 if (rv != 0)
645 return(rv);
646
647 timeout = (timeout * 10000 * 10);
648
649 microtime(&t1);
650
651 timeout += t1.tv_usec;
652
653 do {
654 rv = tr->tr_error;
655 if (rv != 0)
656 return(rv);
657 s = splbio();
658 twa_done(tr->tr_sc);
659 splx(s);
660 if (tr->tr_status == TWA_CMD_COMPLETE)
661 return(rv);
662 microtime(&t1);
663 } while (t1.tv_usec <= timeout);
664
665 /*
666 * We will reset the controller only if the request has
667 * already been submitted, so as to not lose the
668 * request packet. If a busy request timed out, the
669 * reset will take care of freeing resources. If a
670 * pending request timed out, we will free resources
671 * for that request, right here. So, the caller is
672 * expected to NOT cleanup when ETIMEDOUT is returned.
673 */
674 rv = ETIMEDOUT;
675
676 if (tr->tr_status == TWA_CMD_BUSY)
677 twa_reset(tr->tr_sc);
678 else {
679 /* Request was never submitted. Clean up. */
680 s = splbio();
681 TAILQ_REMOVE(&tr->tr_sc->twa_pending, tr, tr_link);
682 splx(s);
683 twa_unmap_request(tr);
684 if (tr->tr_data)
685 free(tr->tr_data, M_DEVBUF);
686
687 twa_release_request(tr);
688 }
689 return (rv);
690 }
691
692 static int
twa_inquiry(struct twa_request * tr,int lunid)693 twa_inquiry(struct twa_request *tr, int lunid)
694 {
695 int error;
696 struct twa_command_9k *tr_9k_cmd;
697
698 if (tr->tr_data == NULL)
699 return (ENOMEM);
700
701 memset(tr->tr_data, 0, TWA_SECTOR_SIZE);
702
703 tr->tr_length = TWA_SECTOR_SIZE;
704 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K;
705 tr->tr_flags |= TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT;
706
707 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k;
708
709 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND;
710 tr_9k_cmd->unit = lunid;
711 tr_9k_cmd->request_id = tr->tr_request_id;
712 tr_9k_cmd->status = 0;
713 tr_9k_cmd->sgl_offset = 16;
714 tr_9k_cmd->sgl_entries = 1;
715 /* create the CDB here */
716 tr_9k_cmd->cdb[0] = INQUIRY;
717 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e);
718 tr_9k_cmd->cdb[4] = 255;
719
720 /* XXXX setup page data no lun device
721 * it seems 9000 series does not indicate
722 * NOTPRESENT - need more investigation
723 */
724 ((struct scsipi_inquiry_data *)tr->tr_data)->device =
725 SID_QUAL_LU_NOTPRESENT;
726
727 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD);
728 if (error != 0)
729 return (error);
730
731 if (((struct scsipi_inquiry_data *)tr->tr_data)->device ==
732 SID_QUAL_LU_NOTPRESENT)
733 error = 1;
734
735 return (error);
736 }
737
738 static int
twa_print_inquiry_data(struct twa_softc * sc,struct scsipi_inquiry_data * scsipi)739 twa_print_inquiry_data(struct twa_softc *sc, struct scsipi_inquiry_data *scsipi)
740 {
741
742 printf("%s: %s\n", device_xname(sc->twa_dv), scsipi->vendor);
743
744 return (1);
745 }
746
747
748 static uint64_t
twa_read_capacity(struct twa_request * tr,int lunid)749 twa_read_capacity(struct twa_request *tr, int lunid)
750 {
751 int error;
752 struct twa_command_9k *tr_9k_cmd;
753 uint64_t array_size = 0LL;
754
755 if (tr->tr_data == NULL)
756 return (ENOMEM);
757
758 memset(tr->tr_data, 0, TWA_SECTOR_SIZE);
759
760 tr->tr_length = TWA_SECTOR_SIZE;
761 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K;
762 tr->tr_flags |= TWA_CMD_DATA_OUT;
763
764 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k;
765
766 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND;
767 tr_9k_cmd->unit = lunid;
768 tr_9k_cmd->request_id = tr->tr_request_id;
769 tr_9k_cmd->status = 0;
770 tr_9k_cmd->sgl_offset = 16;
771 tr_9k_cmd->sgl_entries = 1;
772 /* create the CDB here */
773 tr_9k_cmd->cdb[0] = READ_CAPACITY_16;
774 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e) | SRC16_SERVICE_ACTION;
775
776 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD);
777
778 if (error == 0) {
779 #if BYTE_ORDER == BIG_ENDIAN
780 array_size = bswap64(_8btol(
781 ((struct scsipi_read_capacity_16_data *)tr->tr_data)->addr) + 1);
782 #else
783 array_size = _8btol(((struct scsipi_read_capacity_16_data *)
784 tr->tr_data)->addr) + 1;
785 #endif
786 }
787 return (array_size);
788 }
789
790 static int
twa_request_sense(struct twa_request * tr,int lunid)791 twa_request_sense(struct twa_request *tr, int lunid)
792 {
793 int error = 1;
794 struct twa_command_9k *tr_9k_cmd;
795
796 if (tr->tr_data == NULL)
797 return (error);
798
799 memset(tr->tr_data, 0, TWA_SECTOR_SIZE);
800
801 tr->tr_length = TWA_SECTOR_SIZE;
802 tr->tr_cmd_pkt_type = TWA_CMD_PKT_TYPE_9K;
803 tr->tr_flags |= TWA_CMD_DATA_OUT;
804
805 tr_9k_cmd = &tr->tr_command->command.cmd_pkt_9k;
806
807 tr_9k_cmd->command.opcode = TWA_OP_EXECUTE_SCSI_COMMAND;
808 tr_9k_cmd->unit = lunid;
809 tr_9k_cmd->request_id = tr->tr_request_id;
810 tr_9k_cmd->status = 0;
811 tr_9k_cmd->sgl_offset = 16;
812 tr_9k_cmd->sgl_entries = 1;
813 /* create the CDB here */
814 tr_9k_cmd->cdb[0] = SCSI_REQUEST_SENSE;
815 tr_9k_cmd->cdb[1] = ((lunid << 5) & 0x0e);
816 tr_9k_cmd->cdb[4] = 255;
817
818 /*XXX AEN notification called in interrupt context
819 * so just queue the request. Return as quickly
820 * as possible from interrupt
821 */
822 if ((tr->tr_flags & TWA_CMD_AEN) != 0)
823 error = twa_map_request(tr);
824 else
825 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD);
826
827 return (error);
828 }
829
830 static int
twa_alloc_req_pkts(struct twa_softc * sc,int num_reqs)831 twa_alloc_req_pkts(struct twa_softc *sc, int num_reqs)
832 {
833 struct twa_request *tr;
834 struct twa_command_packet *tc;
835 bus_dma_segment_t seg;
836 size_t max_segs, max_xfer;
837 int i, rv, rseg, size;
838
839 sc->sc_units = malloc(sc->sc_nunits *
840 sizeof(struct twa_drive), M_DEVBUF, M_WAITOK | M_ZERO);
841 sc->twa_req_buf = malloc(num_reqs * sizeof(struct twa_request),
842 M_DEVBUF, M_WAITOK);
843
844 size = num_reqs * sizeof(struct twa_command_packet);
845
846 /* Allocate memory for cmd pkts. */
847 if ((rv = bus_dmamem_alloc(sc->twa_dma_tag,
848 size, PAGE_SIZE, 0, &seg,
849 1, &rseg, BUS_DMA_NOWAIT)) != 0){
850 aprint_error_dev(sc->twa_dv, "unable to allocate "
851 "command packets, rv = %d\n", rv);
852 return (ENOMEM);
853 }
854
855 if ((rv = bus_dmamem_map(sc->twa_dma_tag,
856 &seg, rseg, size, (void **)&sc->twa_cmds,
857 BUS_DMA_NOWAIT | BUS_DMA_COHERENT)) != 0) {
858 aprint_error_dev(sc->twa_dv,
859 "unable to map commands, rv = %d\n", rv);
860 return (1);
861 }
862
863 if ((rv = bus_dmamap_create(sc->twa_dma_tag,
864 size, num_reqs, size,
865 0, BUS_DMA_NOWAIT, &sc->twa_cmd_map)) != 0) {
866 aprint_error_dev(sc->twa_dv,
867 "unable to create command DMA map, "
868 "rv = %d\n", rv);
869 return (ENOMEM);
870 }
871
872 if ((rv = bus_dmamap_load(sc->twa_dma_tag, sc->twa_cmd_map,
873 sc->twa_cmds, size, NULL,
874 BUS_DMA_NOWAIT)) != 0) {
875 aprint_error_dev(sc->twa_dv,
876 "unable to load command DMA map, rv = %d\n", rv);
877 return (1);
878 }
879
880 if ((uintptr_t)sc->twa_cmds % TWA_ALIGNMENT) {
881 aprint_error_dev(sc->twa_dv,
882 "DMA map memory not aligned on %d boundary\n",
883 TWA_ALIGNMENT);
884
885 return (1);
886 }
887 tc = sc->twa_cmd_pkt_buf = (struct twa_command_packet *)sc->twa_cmds;
888 sc->twa_cmd_pkt_phys = sc->twa_cmd_map->dm_segs[0].ds_addr;
889
890 memset(sc->twa_req_buf, 0, num_reqs * sizeof(struct twa_request));
891 memset(sc->twa_cmd_pkt_buf, 0,
892 num_reqs * sizeof(struct twa_command_packet));
893
894 sc->sc_twa_request = sc->twa_req_buf;
895 max_segs = twa_get_maxsegs();
896 max_xfer = twa_get_maxxfer(max_segs);
897
898 for (i = 0; i < num_reqs; i++, tc++) {
899 tr = &(sc->twa_req_buf[i]);
900 tr->tr_command = tc;
901 tr->tr_cmd_phys = sc->twa_cmd_pkt_phys +
902 (i * sizeof(struct twa_command_packet));
903 tr->tr_request_id = i;
904 tr->tr_sc = sc;
905
906 /*
907 * Create a map for data buffers. maxsize (256 * 1024) used in
908 * bus_dma_tag_create above should suffice the bounce page needs
909 * for data buffers, since the max I/O size we support is 128KB.
910 * If we supported I/O's bigger than 256KB, we would have to
911 * create a second dma_tag, with the appropriate maxsize.
912 */
913 if ((rv = bus_dmamap_create(sc->twa_dma_tag,
914 max_xfer, max_segs, 1, 0, BUS_DMA_NOWAIT,
915 &tr->tr_dma_map)) != 0) {
916 aprint_error_dev(sc->twa_dv,
917 "unable to create command DMA map, "
918 "rv = %d\n", rv);
919 return (ENOMEM);
920 }
921 /* Insert request into the free queue. */
922 if (i != 0) {
923 sc->twa_lookup[i] = tr;
924 twa_release_request(tr);
925 } else
926 tr->tr_flags |= TWA_CMD_AEN;
927 }
928 return(0);
929 }
930
931 static void
twa_recompute_openings(struct twa_softc * sc)932 twa_recompute_openings(struct twa_softc *sc)
933 {
934 struct twa_drive *td;
935 int unit;
936 int openings;
937 uint64_t total_size;
938
939 total_size = 0;
940 for (unit = 0; unit < sc->sc_nunits; unit++) {
941 td = &sc->sc_units[unit];
942 total_size += td->td_size;
943 }
944
945 for (unit = 0; unit < sc->sc_nunits; unit++) {
946 td = &sc->sc_units[unit];
947 /*
948 * In theory, TWA_Q_LENGTH - 1 should be usable, but
949 * keep one additional ccb for internal commands.
950 * This makes the controller more reliable under load.
951 */
952 if (total_size > 0) {
953 openings = (TWA_Q_LENGTH - 2) * td->td_size
954 / total_size;
955 } else
956 openings = 0;
957
958 if (openings == td->td_openings)
959 continue;
960 td->td_openings = openings;
961
962 #ifdef TWA_DEBUG
963 printf("%s: unit %d openings %d\n",
964 device_xname(sc->twa_dv), unit, openings);
965 #endif
966 if (td->td_dev != NULL)
967 (*td->td_callbacks->tcb_openings)(td->td_dev,
968 td->td_openings);
969 }
970 }
971
972 /* ARGSUSED */
973 static int
twa_request_bus_scan(device_t self,const char * attr,const int * flags)974 twa_request_bus_scan(device_t self, const char *attr, const int *flags)
975 {
976 struct twa_softc *sc = device_private(self);
977 struct twa_drive *td;
978 struct twa_request *tr;
979 struct twa_attach_args twaa;
980 int locs[TWACF_NLOCS];
981 int s, unit;
982
983 s = splbio();
984 for (unit = 0; unit < sc->sc_nunits; unit++) {
985
986 if ((tr = twa_get_request(sc, 0)) == NULL) {
987 splx(s);
988 return (EIO);
989 }
990
991 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL;
992
993 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_WAITOK);
994
995 td = &sc->sc_units[unit];
996
997 if (twa_inquiry(tr, unit) == 0) {
998 if (td->td_dev == NULL) {
999 twa_print_inquiry_data(sc,
1000 ((struct scsipi_inquiry_data *)tr->tr_data));
1001
1002 sc->sc_units[unit].td_size =
1003 twa_read_capacity(tr, unit);
1004
1005 twaa.twaa_unit = unit;
1006
1007 twa_recompute_openings(sc);
1008
1009 locs[TWACF_UNIT] = unit;
1010
1011 sc->sc_units[unit].td_dev =
1012 config_found(sc->twa_dv, &twaa, twa_print,
1013 CFARGS(.submatch = config_stdsubmatch,
1014 .iattr = attr,
1015 .locators = locs));
1016 }
1017 } else {
1018 if (td->td_dev != NULL) {
1019 (void) config_detach(td->td_dev, DETACH_FORCE);
1020 td->td_dev = NULL;
1021 td->td_size = 0;
1022
1023 twa_recompute_openings(sc);
1024 }
1025 }
1026 free(tr->tr_data, M_DEVBUF);
1027
1028 twa_release_request(tr);
1029 }
1030 splx(s);
1031
1032 return (0);
1033 }
1034
1035
1036 #ifdef DIAGNOSTIC
1037 static inline void
twa_check_busy_q(struct twa_request * tr)1038 twa_check_busy_q(struct twa_request *tr)
1039 {
1040 struct twa_request *rq;
1041 struct twa_softc *sc = tr->tr_sc;
1042
1043 TAILQ_FOREACH(rq, &sc->twa_busy, tr_link) {
1044 if (tr->tr_request_id == rq->tr_request_id) {
1045 panic("cannot submit same request more than once");
1046 } else if (tr->bp == rq->bp && tr->bp != 0) {
1047 /* XXX A check for 0 for the buf ptr is needed to
1048 * guard against ioctl requests with a buf ptr of
1049 * 0 and also aen notifications. Looking for
1050 * external cmds only.
1051 */
1052 panic("cannot submit same buf more than once");
1053 } else {
1054 /* Empty else statement */
1055 }
1056 }
1057 }
1058 #endif
1059
1060 static int
twa_start(struct twa_request * tr)1061 twa_start(struct twa_request *tr)
1062 {
1063 struct twa_softc *sc = tr->tr_sc;
1064 uint32_t status_reg;
1065 int s;
1066 int error;
1067
1068 s = splbio();
1069
1070 /*
1071 * The 9650 and 9690 have a bug in the detection of the full queue
1072 * condition.
1073 *
1074 * If a write operation has filled the queue and is directly followed
1075 * by a status read, it sometimes doesn't return the correct result.
1076 * To work around this, the upper 32bit are written first.
1077 * This effectively serialises the hardware, but does not change
1078 * the state of the queue.
1079 */
1080 if (sc->sc_quirks & TWA_QUIRK_QUEUEFULL_BUG) {
1081 /* Write lower 32 bits of address */
1082 TWA_WRITE_COMMAND_QUEUE_LOW(sc, tr->tr_cmd_phys +
1083 sizeof(struct twa_command_header));
1084 }
1085
1086 /* Check to see if we can post a command. */
1087 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET);
1088 if ((error = twa_check_ctlr_state(sc, status_reg)))
1089 goto out;
1090
1091 if (status_reg & TWA_STATUS_COMMAND_QUEUE_FULL) {
1092 if (tr->tr_status != TWA_CMD_PENDING) {
1093 tr->tr_status = TWA_CMD_PENDING;
1094 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_pending,
1095 tr, tr_link);
1096 }
1097 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
1098 TWA_CONTROL_UNMASK_COMMAND_INTERRUPT);
1099 error = EBUSY;
1100 } else {
1101 bus_dmamap_sync(sc->twa_dma_tag, sc->twa_cmd_map,
1102 (char *)tr->tr_command - (char *)sc->twa_cmds,
1103 sizeof(struct twa_command_packet),
1104 BUS_DMASYNC_PREWRITE | BUS_DMASYNC_PREREAD);
1105
1106 if (sc->sc_quirks & TWA_QUIRK_QUEUEFULL_BUG) {
1107 /*
1108 * Cmd queue is not full. Post the command
1109 * by writing upper 32 bits of address.
1110 */
1111 TWA_WRITE_COMMAND_QUEUE_HIGH(sc, tr->tr_cmd_phys +
1112 sizeof(struct twa_command_header));
1113 } else {
1114 /* Cmd queue is not full. Post the command. */
1115 TWA_WRITE_COMMAND_QUEUE(sc, tr->tr_cmd_phys +
1116 sizeof(struct twa_command_header));
1117 }
1118
1119 /* Mark the request as currently being processed. */
1120 tr->tr_status = TWA_CMD_BUSY;
1121
1122 #ifdef DIAGNOSTIC
1123 twa_check_busy_q(tr);
1124 #endif
1125
1126 /* Move the request into the busy queue. */
1127 TAILQ_INSERT_TAIL(&tr->tr_sc->twa_busy, tr, tr_link);
1128 }
1129 out:
1130 splx(s);
1131 return(error);
1132 }
1133
1134 static int
twa_drain_response_queue(struct twa_softc * sc)1135 twa_drain_response_queue(struct twa_softc *sc)
1136 {
1137 uint32_t status_reg;
1138
1139 for (;;) {
1140 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET);
1141 if (twa_check_ctlr_state(sc, status_reg))
1142 return(1);
1143 if (status_reg & TWA_STATUS_RESPONSE_QUEUE_EMPTY)
1144 return(0); /* no more response queue entries */
1145 (void)twa_inl(sc, TWA_RESPONSE_QUEUE_OFFSET);
1146 }
1147 }
1148
1149 /*
1150 * twa_drain_response_queue_large:
1151 *
1152 * specific to the 9550 and 9650 controller to remove requests.
1153 *
1154 * Removes all requests from "large" response queue on the 9550 controller.
1155 * This procedure is called as part of the 9550 controller reset sequence.
1156 */
1157 static int
twa_drain_response_queue_large(struct twa_softc * sc,uint32_t timeout)1158 twa_drain_response_queue_large(struct twa_softc *sc, uint32_t timeout)
1159 {
1160 uint32_t start_time = 0, end_time;
1161 uint32_t response = 0;
1162
1163 if (sc->sc_product_id == PCI_PRODUCT_3WARE_9550 ||
1164 sc->sc_product_id == PCI_PRODUCT_3WARE_9650 ) {
1165 start_time = 0;
1166 end_time = (timeout * TWA_MICROSECOND);
1167
1168 while ((response &
1169 TWA_9550SX_DRAIN_COMPLETE) != TWA_9550SX_DRAIN_COMPLETE) {
1170 response = twa_inl(sc, TWA_RESPONSE_QUEUE_LARGE_OFFSET);
1171 if (start_time >= end_time)
1172 return (1);
1173 DELAY(1);
1174 start_time++;
1175 }
1176 /* P-chip delay */
1177 DELAY(500000);
1178 }
1179 return (0);
1180 }
1181
1182 static void
twa_drain_busy_queue(struct twa_softc * sc)1183 twa_drain_busy_queue(struct twa_softc *sc)
1184 {
1185 struct twa_request *tr;
1186
1187 /* Walk the busy queue. */
1188
1189 while ((tr = TAILQ_FIRST(&sc->twa_busy)) != NULL) {
1190 TAILQ_REMOVE(&sc->twa_busy, tr, tr_link);
1191
1192 twa_unmap_request(tr);
1193 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_INTERNAL) ||
1194 (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_IOCTL)) {
1195 /* It's an internal/ioctl request. Simply free it. */
1196 if (tr->tr_data)
1197 free(tr->tr_data, M_DEVBUF);
1198 twa_release_request(tr);
1199 } else {
1200 /* It's a SCSI request. Complete it. */
1201 tr->tr_command->command.cmd_pkt_9k.status = EIO;
1202 if (tr->tr_callback)
1203 tr->tr_callback(tr);
1204 }
1205 }
1206 }
1207
1208 static int
twa_drain_pending_queue(struct twa_softc * sc)1209 twa_drain_pending_queue(struct twa_softc *sc)
1210 {
1211 struct twa_request *tr;
1212 int s, error = 0;
1213
1214 /*
1215 * Pull requests off the pending queue, and submit them.
1216 */
1217 s = splbio();
1218 while ((tr = TAILQ_FIRST(&sc->twa_pending)) != NULL) {
1219 TAILQ_REMOVE(&sc->twa_pending, tr, tr_link);
1220
1221 if ((error = twa_start(tr))) {
1222 if (error == EBUSY) {
1223 tr->tr_status = TWA_CMD_PENDING;
1224
1225 /* queue at the head */
1226 TAILQ_INSERT_HEAD(&tr->tr_sc->twa_pending,
1227 tr, tr_link);
1228 error = 0;
1229 break;
1230 } else {
1231 if (tr->tr_flags & TWA_CMD_SLEEP_ON_REQUEST) {
1232 tr->tr_error = error;
1233 tr->tr_callback(tr);
1234 error = EIO;
1235 }
1236 }
1237 }
1238 }
1239 splx(s);
1240
1241 return(error);
1242 }
1243
1244 static int
twa_drain_aen_queue(struct twa_softc * sc)1245 twa_drain_aen_queue(struct twa_softc *sc)
1246 {
1247 int s, error = 0;
1248 struct twa_request *tr;
1249 struct twa_command_header *cmd_hdr;
1250 struct timeval t1;
1251 uint32_t timeout;
1252
1253 for (;;) {
1254 if ((tr = twa_get_request(sc, 0)) == NULL) {
1255 error = EIO;
1256 break;
1257 }
1258 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL;
1259 tr->tr_callback = NULL;
1260
1261 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT);
1262
1263 if (tr->tr_data == NULL) {
1264 error = 1;
1265 goto out;
1266 }
1267
1268 if (twa_request_sense(tr, 0) != 0) {
1269 error = 1;
1270 break;
1271 }
1272
1273 timeout = (1000/*ms*/ * 100/*us*/ * TWA_REQUEST_TIMEOUT_PERIOD);
1274
1275 microtime(&t1);
1276
1277 timeout += t1.tv_usec;
1278
1279 do {
1280 s = splbio();
1281 twa_done(tr->tr_sc);
1282 splx(s);
1283 if (tr->tr_status != TWA_CMD_BUSY)
1284 break;
1285 microtime(&t1);
1286 } while (t1.tv_usec <= timeout);
1287
1288 if (tr->tr_status != TWA_CMD_COMPLETE) {
1289 error = ETIMEDOUT;
1290 break;
1291 }
1292
1293 if ((error = tr->tr_command->command.cmd_pkt_9k.status))
1294 break;
1295
1296 cmd_hdr = (struct twa_command_header *)(tr->tr_data);
1297 if ((cmd_hdr->status_block.error) /* aen_code */
1298 == TWA_AEN_QUEUE_EMPTY)
1299 break;
1300 (void)twa_enqueue_aen(sc, cmd_hdr);
1301
1302 free(tr->tr_data, M_DEVBUF);
1303 twa_release_request(tr);
1304 }
1305 out:
1306 if (tr) {
1307 if (tr->tr_data)
1308 free(tr->tr_data, M_DEVBUF);
1309
1310 twa_release_request(tr);
1311 }
1312 return(error);
1313 }
1314
1315
1316 #if 0
1317 static void
1318 twa_check_response_q(struct twa_request *tr, int clear)
1319 {
1320 int j;
1321 static int i = 0;
1322 static struct twa_request *req = 0;
1323 static struct buf *hist[255];
1324
1325
1326 if (clear) {
1327 i = 0;
1328 for (j = 0; j < 255; j++)
1329 hist[j] = 0;
1330 return;
1331 }
1332
1333 if (req == 0)
1334 req = tr;
1335
1336 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_EXTERNAL) != 0) {
1337 /* XXX this is bogus ! req can't be anything else but tr ! */
1338 if (req->tr_request_id == tr->tr_request_id)
1339 panic("req id: %d on controller queue twice",
1340 tr->tr_request_id);
1341
1342 for (j = 0; j < i; j++)
1343 if (tr->bp == hist[j])
1344 panic("req id: %d buf found twice",
1345 tr->tr_request_id);
1346 }
1347 req = tr;
1348
1349 hist[i++] = req->bp;
1350 }
1351 #endif
1352
1353 static int
twa_done(struct twa_softc * sc)1354 twa_done(struct twa_softc *sc)
1355 {
1356 union twa_response_queue rq;
1357 struct twa_request *tr;
1358 int rv = 0;
1359 uint32_t status_reg;
1360
1361 for (;;) {
1362 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET);
1363 if ((rv = twa_check_ctlr_state(sc, status_reg)))
1364 break;
1365 if (status_reg & TWA_STATUS_RESPONSE_QUEUE_EMPTY)
1366 break;
1367 /* Response queue is not empty. */
1368 rq.value = twa_inl(sc, TWA_RESPONSE_QUEUE_OFFSET);
1369 tr = sc->sc_twa_request + rq.u.response_id;
1370 #if 0
1371 twa_check_response_q(tr, 0);
1372 #endif
1373 /* Unmap the command packet, and any associated data buffer. */
1374 twa_unmap_request(tr);
1375
1376 tr->tr_status = TWA_CMD_COMPLETE;
1377 TAILQ_REMOVE(&tr->tr_sc->twa_busy, tr, tr_link);
1378
1379 if (tr->tr_callback)
1380 tr->tr_callback(tr);
1381 }
1382 (void)twa_drain_pending_queue(sc);
1383
1384 #if 0
1385 twa_check_response_q(NULL, 1);
1386 #endif
1387 return(rv);
1388 }
1389
1390 /*
1391 * Function name: twa_init_ctlr
1392 * Description: Establishes a logical connection with the controller.
1393 * If bundled with firmware, determines whether or not
1394 * the driver is compatible with the firmware on the
1395 * controller, before proceeding to work with it.
1396 *
1397 * Input: sc -- ptr to per ctlr structure
1398 * Output: None
1399 * Return value: 0 -- success
1400 * non-zero-- failure
1401 */
1402 static int
twa_init_ctlr(struct twa_softc * sc)1403 twa_init_ctlr(struct twa_softc *sc)
1404 {
1405 uint16_t fw_on_ctlr_srl = 0;
1406 uint16_t fw_on_ctlr_arch_id = 0;
1407 uint16_t fw_on_ctlr_branch = 0;
1408 uint16_t fw_on_ctlr_build = 0;
1409 uint32_t init_connect_result = 0;
1410 int error = 0;
1411
1412 /* Wait for the controller to become ready. */
1413 if (twa_wait_status(sc, TWA_STATUS_MICROCONTROLLER_READY,
1414 TWA_REQUEST_TIMEOUT_PERIOD)) {
1415 return(ENXIO);
1416 }
1417 /* Drain the response queue. */
1418 if (twa_drain_response_queue(sc))
1419 return(1);
1420
1421 /* Establish a logical connection with the controller. */
1422 if ((error = twa_init_connection(sc, TWA_INIT_MESSAGE_CREDITS,
1423 TWA_EXTENDED_INIT_CONNECT, TWA_CURRENT_FW_SRL,
1424 TWA_9000_ARCH_ID, TWA_CURRENT_FW_BRANCH,
1425 TWA_CURRENT_FW_BUILD, &fw_on_ctlr_srl,
1426 &fw_on_ctlr_arch_id, &fw_on_ctlr_branch,
1427 &fw_on_ctlr_build, &init_connect_result))) {
1428 return(error);
1429 }
1430 twa_drain_aen_queue(sc);
1431
1432 /* Set controller state to initialized. */
1433 sc->twa_state &= ~TWA_STATE_SHUTDOWN;
1434 return(0);
1435 }
1436
1437 static int
twa_setup(device_t self)1438 twa_setup(device_t self)
1439 {
1440 struct twa_softc *sc;
1441 struct tw_cl_event_packet *aen_queue;
1442 uint32_t i = 0;
1443 int error = 0;
1444
1445 sc = device_private(self);
1446
1447 /* Initialize request queues. */
1448 TAILQ_INIT(&sc->twa_free);
1449 TAILQ_INIT(&sc->twa_busy);
1450 TAILQ_INIT(&sc->twa_pending);
1451
1452 sc->twa_sc_flags = 0;
1453
1454 if (twa_alloc_req_pkts(sc, TWA_Q_LENGTH)) {
1455
1456 return(ENOMEM);
1457 }
1458
1459 /* Allocate memory for the AEN queue. */
1460 if ((aen_queue = malloc(sizeof(struct tw_cl_event_packet) *
1461 TWA_Q_LENGTH, M_DEVBUF, M_WAITOK)) == NULL) {
1462 /*
1463 * This should not cause us to return error. We will only be
1464 * unable to support AEN's. But then, we will have to check
1465 * time and again to see if we can support AEN's, if we
1466 * continue. So, we will just return error.
1467 */
1468 return (ENOMEM);
1469 }
1470 /* Initialize the aen queue. */
1471 memset(aen_queue, 0, sizeof(struct tw_cl_event_packet) * TWA_Q_LENGTH);
1472
1473 for (i = 0; i < TWA_Q_LENGTH; i++)
1474 sc->twa_aen_queue[i] = &(aen_queue[i]);
1475
1476 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
1477 TWA_CONTROL_DISABLE_INTERRUPTS);
1478
1479 /* Initialize the controller. */
1480 if ((error = twa_init_ctlr(sc))) {
1481 /* Soft reset the controller, and try one more time. */
1482
1483 printf("%s: controller initialization failed. "
1484 "Retrying initialization\n", device_xname(sc->twa_dv));
1485
1486 if ((error = twa_soft_reset(sc)) == 0)
1487 error = twa_init_ctlr(sc);
1488 }
1489
1490 twa_describe_controller(sc);
1491
1492 error = twa_request_bus_scan(self, NULL, NULL);
1493
1494 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
1495 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT |
1496 TWA_CONTROL_UNMASK_RESPONSE_INTERRUPT |
1497 TWA_CONTROL_ENABLE_INTERRUPTS);
1498
1499 return (error);
1500 }
1501
1502 void *twa_sdh;
1503
1504 static void
twa_attach(device_t parent,device_t self,void * aux)1505 twa_attach(device_t parent, device_t self, void *aux)
1506 {
1507 struct pci_attach_args *pa;
1508 struct twa_softc *sc;
1509 pci_chipset_tag_t pc;
1510 pcireg_t csr;
1511 pci_intr_handle_t ih;
1512 const char *intrstr;
1513 const struct sysctlnode *node;
1514 const struct twa_pci_identity *entry;
1515 int i;
1516 bool use_64bit;
1517 char intrbuf[PCI_INTRSTR_LEN];
1518
1519 sc = device_private(self);
1520
1521 sc->twa_dv = self;
1522
1523 pa = aux;
1524 pc = pa->pa_pc;
1525 sc->pc = pa->pa_pc;
1526 sc->tag = pa->pa_tag;
1527
1528 entry = twa_lookup(pa->pa_id);
1529 pci_aprint_devinfo_fancy(pa, "RAID controller", entry->name, 1);
1530
1531 sc->sc_quirks = 0;
1532
1533 if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9000) {
1534 sc->sc_nunits = TWA_MAX_UNITS;
1535 use_64bit = false;
1536 if (pci_mapreg_map(pa, PCI_MAPREG_START, PCI_MAPREG_TYPE_IO, 0,
1537 &sc->twa_bus_iot, &sc->twa_bus_ioh, NULL, NULL)) {
1538 aprint_error_dev(sc->twa_dv, "can't map i/o space\n");
1539 return;
1540 }
1541 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9550) {
1542 sc->sc_nunits = TWA_MAX_UNITS;
1543 use_64bit = true;
1544 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08,
1545 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot,
1546 &sc->twa_bus_ioh, NULL, NULL)) {
1547 aprint_error_dev(sc->twa_dv, "can't map mem space\n");
1548 return;
1549 }
1550 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9650) {
1551 sc->sc_nunits = TWA_9650_MAX_UNITS;
1552 use_64bit = true;
1553 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08,
1554 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot,
1555 &sc->twa_bus_ioh, NULL, NULL)) {
1556 aprint_error_dev(sc->twa_dv, "can't map mem space\n");
1557 return;
1558 }
1559 sc->sc_quirks |= TWA_QUIRK_QUEUEFULL_BUG;
1560 } else if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_3WARE_9690) {
1561 sc->sc_nunits = TWA_9690_MAX_UNITS;
1562 use_64bit = true;
1563 if (pci_mapreg_map(pa, PCI_MAPREG_START + 0x08,
1564 PCI_MAPREG_MEM_TYPE_64BIT, 0, &sc->twa_bus_iot,
1565 &sc->twa_bus_ioh, NULL, NULL)) {
1566 aprint_error_dev(sc->twa_dv, "can't map mem space\n");
1567 return;
1568 }
1569 sc->sc_quirks |= TWA_QUIRK_QUEUEFULL_BUG;
1570 } else {
1571 sc->sc_nunits = 0;
1572 use_64bit = false;
1573 aprint_error_dev(sc->twa_dv,
1574 "product id 0x%02x not recognized\n",
1575 PCI_PRODUCT(pa->pa_id));
1576 return;
1577 }
1578
1579 if (pci_dma64_available(pa) && use_64bit) {
1580 aprint_verbose_dev(self, "64-bit DMA addressing active\n");
1581 sc->twa_dma_tag = pa->pa_dmat64;
1582 } else {
1583 sc->twa_dma_tag = pa->pa_dmat;
1584 }
1585
1586 sc->sc_product_id = PCI_PRODUCT(pa->pa_id);
1587 /* Enable the device. */
1588 csr = pci_conf_read(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
1589
1590 pci_conf_write(pa->pa_pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
1591 csr | PCI_COMMAND_MASTER_ENABLE);
1592
1593 /* Map and establish the interrupt. */
1594 if (pci_intr_map(pa, &ih)) {
1595 aprint_error_dev(sc->twa_dv, "can't map interrupt\n");
1596 return;
1597 }
1598 intrstr = pci_intr_string(pc, ih, intrbuf, sizeof(intrbuf));
1599
1600 sc->twa_ih = pci_intr_establish_xname(pc, ih, IPL_BIO, twa_intr, sc,
1601 device_xname(self));
1602 if (sc->twa_ih == NULL) {
1603 aprint_error_dev(sc->twa_dv, "can't establish interrupt%s%s\n",
1604 (intrstr) ? " at " : "",
1605 (intrstr) ? intrstr : "");
1606 return;
1607 }
1608
1609 if (intrstr != NULL)
1610 aprint_normal_dev(sc->twa_dv, "interrupting at %s\n", intrstr);
1611
1612 twa_setup(self);
1613
1614 if (twa_sdh == NULL)
1615 twa_sdh = shutdownhook_establish(twa_shutdown, NULL);
1616
1617 /* sysctl set-up for 3ware cli */
1618 if (sysctl_createv(NULL, 0, NULL, &node,
1619 0, CTLTYPE_NODE, device_xname(sc->twa_dv),
1620 SYSCTL_DESCR("twa driver information"),
1621 NULL, 0, NULL, 0,
1622 CTL_HW, CTL_CREATE, CTL_EOL) != 0) {
1623 aprint_error_dev(sc->twa_dv,
1624 "could not create %s.%s sysctl node\n",
1625 "hw", device_xname(sc->twa_dv));
1626 return;
1627 }
1628 if ((i = sysctl_createv(NULL, 0, NULL, NULL,
1629 0, CTLTYPE_STRING, "driver_version",
1630 SYSCTL_DESCR("twa driver version"),
1631 NULL, 0, __UNCONST(&twaver), 0,
1632 CTL_HW, node->sysctl_num, CTL_CREATE, CTL_EOL))
1633 != 0) {
1634 aprint_error_dev(sc->twa_dv,
1635 "could not create %s.%s.driver_version sysctl\n",
1636 "hw", device_xname(sc->twa_dv));
1637 return;
1638 }
1639
1640 return;
1641 }
1642
1643 static void
twa_shutdown(void * arg)1644 twa_shutdown(void *arg)
1645 {
1646 extern struct cfdriver twa_cd;
1647 struct twa_softc *sc;
1648 int i, unit;
1649
1650 for (i = 0; i < twa_cd.cd_ndevs; i++) {
1651 if ((sc = device_lookup_private(&twa_cd, i)) == NULL)
1652 continue;
1653
1654 for (unit = 0; unit < sc->sc_nunits; unit++)
1655 if (sc->sc_units[unit].td_dev != NULL)
1656 (void) config_detach(sc->sc_units[unit].td_dev,
1657 DETACH_FORCE | DETACH_QUIET);
1658
1659 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
1660 TWA_CONTROL_DISABLE_INTERRUPTS);
1661
1662 /* Let the controller know that we are going down. */
1663 (void)twa_init_connection(sc, TWA_SHUTDOWN_MESSAGE_CREDITS,
1664 0, 0, 0, 0, 0,
1665 NULL, NULL, NULL, NULL, NULL);
1666 }
1667 }
1668
1669 void
twa_register_callbacks(struct twa_softc * sc,int unit,const struct twa_callbacks * tcb)1670 twa_register_callbacks(struct twa_softc *sc, int unit,
1671 const struct twa_callbacks *tcb)
1672 {
1673
1674 sc->sc_units[unit].td_callbacks = tcb;
1675 }
1676
1677 /*
1678 * Print autoconfiguration message for a sub-device
1679 */
1680 static int
twa_print(void * aux,const char * pnp)1681 twa_print(void *aux, const char *pnp)
1682 {
1683 struct twa_attach_args *twaa;
1684
1685 twaa = aux;
1686
1687 if (pnp !=NULL)
1688 aprint_normal("block device at %s\n", pnp);
1689 aprint_normal(" unit %d\n", twaa->twaa_unit);
1690 return (UNCONF);
1691 }
1692
1693 static void
twa_fillin_sgl(struct twa_sg * sgl,bus_dma_segment_t * segs,int nsegments)1694 twa_fillin_sgl(struct twa_sg *sgl, bus_dma_segment_t *segs, int nsegments)
1695 {
1696 int i;
1697 for (i = 0; i < nsegments; i++) {
1698 sgl[i].address = segs[i].ds_addr;
1699 sgl[i].length = (uint32_t)(segs[i].ds_len);
1700 }
1701 }
1702
1703 static int
twa_submit_io(struct twa_request * tr)1704 twa_submit_io(struct twa_request *tr)
1705 {
1706 int error;
1707
1708 if ((error = twa_start(tr))) {
1709 if (error == EBUSY)
1710 error = 0; /* request is in the pending queue */
1711 else {
1712 tr->tr_error = error;
1713 }
1714 }
1715 return(error);
1716 }
1717
1718 /*
1719 * Function name: twa_setup_data_dmamap
1720 * Description: Callback of bus_dmamap_load for the buffer associated
1721 * with data. Updates the cmd pkt (size/sgl_entries
1722 * fields, as applicable) to reflect the number of sg
1723 * elements.
1724 *
1725 * Input: arg -- ptr to request pkt
1726 * segs -- ptr to a list of segment descriptors
1727 * nsegments--# of segments
1728 * error -- 0 if no errors encountered before callback,
1729 * non-zero if errors were encountered
1730 * Output: None
1731 * Return value: None
1732 */
1733 static int
twa_setup_data_dmamap(void * arg,bus_dma_segment_t * segs,int nsegments)1734 twa_setup_data_dmamap(void *arg, bus_dma_segment_t *segs, int nsegments)
1735 {
1736 struct twa_request *tr = (struct twa_request *)arg;
1737 struct twa_command_packet *cmdpkt = tr->tr_command;
1738 struct twa_command_9k *cmd9k;
1739 union twa_command_7k *cmd7k;
1740 uint8_t sgl_offset;
1741 int error;
1742
1743 if (tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) {
1744 cmd9k = &(cmdpkt->command.cmd_pkt_9k);
1745 twa_fillin_sgl(&(cmd9k->sg_list[0]), segs, nsegments);
1746 cmd9k->sgl_entries += nsegments - 1;
1747 } else {
1748 /* It's a 7000 command packet. */
1749 cmd7k = &(cmdpkt->command.cmd_pkt_7k);
1750 if ((sgl_offset = cmdpkt->command.cmd_pkt_7k.generic.sgl_offset))
1751 twa_fillin_sgl((struct twa_sg *)
1752 (((uint32_t *)cmd7k) + sgl_offset),
1753 segs, nsegments);
1754 /* Modify the size field, based on sg address size. */
1755 cmd7k->generic.size +=
1756 ((TWA_64BIT_ADDRESSES ? 3 : 2) * nsegments);
1757 }
1758 if (tr->tr_flags & TWA_CMD_DATA_IN)
1759 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 0,
1760 tr->tr_length, BUS_DMASYNC_PREWRITE);
1761 if (tr->tr_flags & TWA_CMD_DATA_OUT) {
1762 /*
1763 * If we're using an alignment buffer, and we're
1764 * writing data, copy the real data out.
1765 */
1766 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED)
1767 memcpy(tr->tr_data, tr->tr_real_data,
1768 tr->tr_real_length);
1769 bus_dmamap_sync(tr->tr_sc->twa_dma_tag, tr->tr_dma_map, 0,
1770 tr->tr_length, BUS_DMASYNC_PREREAD);
1771 }
1772 error = twa_submit_io(tr);
1773
1774 if (error) {
1775 twa_unmap_request(tr);
1776 /*
1777 * If the caller had been returned EINPROGRESS, and he has
1778 * registered a callback for handling completion, the callback
1779 * will never get called because we were unable to submit the
1780 * request. So, free up the request right here.
1781 */
1782 if (tr->tr_callback)
1783 twa_release_request(tr);
1784 }
1785 return (error);
1786 }
1787
1788 /*
1789 * Function name: twa_map_request
1790 * Description: Maps a cmd pkt and data associated with it, into
1791 * DMA'able memory.
1792 *
1793 * Input: tr -- ptr to request pkt
1794 * Output: None
1795 * Return value: 0 -- success
1796 * non-zero-- failure
1797 */
1798 int
twa_map_request(struct twa_request * tr)1799 twa_map_request(struct twa_request *tr)
1800 {
1801 struct twa_softc *sc = tr->tr_sc;
1802 int s, rv, rc;
1803
1804 /* If the command involves data, map that too. */
1805 if (tr->tr_data != NULL) {
1806
1807 if (((u_long)tr->tr_data & (511)) != 0) {
1808 tr->tr_flags |= TWA_CMD_DATA_COPY_NEEDED;
1809 tr->tr_real_data = tr->tr_data;
1810 tr->tr_real_length = tr->tr_length;
1811 s = splvm();
1812 rc = uvm_km_kmem_alloc(kmem_va_arena,
1813 tr->tr_length, (VM_NOSLEEP | VM_INSTANTFIT),
1814 (vmem_addr_t *)&tr->tr_data);
1815 splx(s);
1816
1817 if (rc != 0) {
1818 tr->tr_data = tr->tr_real_data;
1819 tr->tr_length = tr->tr_real_length;
1820 return(ENOMEM);
1821 }
1822 if ((tr->tr_flags & TWA_CMD_DATA_IN) != 0)
1823 memcpy(tr->tr_data, tr->tr_real_data,
1824 tr->tr_length);
1825 }
1826
1827 /*
1828 * Map the data buffer into bus space and build the S/G list.
1829 */
1830 rv = bus_dmamap_load(sc->twa_dma_tag, tr->tr_dma_map,
1831 tr->tr_data, tr->tr_length, NULL,
1832 BUS_DMA_NOWAIT | BUS_DMA_STREAMING);
1833
1834 if (rv != 0) {
1835 if ((tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) != 0) {
1836 s = splvm();
1837 uvm_km_kmem_free(kmem_va_arena,
1838 (vaddr_t)tr->tr_data, tr->tr_length);
1839 splx(s);
1840 }
1841 return (rv);
1842 }
1843
1844 if ((rv = twa_setup_data_dmamap(tr,
1845 tr->tr_dma_map->dm_segs,
1846 tr->tr_dma_map->dm_nsegs))) {
1847
1848 if (tr->tr_flags & TWA_CMD_DATA_COPY_NEEDED) {
1849 s = splvm();
1850 uvm_km_kmem_free(kmem_va_arena,
1851 (vaddr_t)tr->tr_data, tr->tr_length);
1852 splx(s);
1853 tr->tr_data = tr->tr_real_data;
1854 tr->tr_length = tr->tr_real_length;
1855 }
1856 }
1857
1858 } else
1859 if ((rv = twa_submit_io(tr)))
1860 twa_unmap_request(tr);
1861
1862 return (rv);
1863 }
1864
1865 /*
1866 * Function name: twa_intr
1867 * Description: Interrupt handler. Determines the kind of interrupt,
1868 * and calls the appropriate handler.
1869 *
1870 * Input: sc -- ptr to per ctlr structure
1871 * Output: None
1872 * Return value: None
1873 */
1874
1875 static int
twa_intr(void * arg)1876 twa_intr(void *arg)
1877 {
1878 int caught, s, rv __diagused;
1879 struct twa_softc *sc;
1880 uint32_t status_reg;
1881 sc = (struct twa_softc *)arg;
1882
1883 caught = 0;
1884 /* Collect current interrupt status. */
1885 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET);
1886 if (twa_check_ctlr_state(sc, status_reg)) {
1887 caught = 1;
1888 goto bail;
1889 }
1890 /* Dispatch based on the kind of interrupt. */
1891 if (status_reg & TWA_STATUS_HOST_INTERRUPT) {
1892 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
1893 TWA_CONTROL_CLEAR_HOST_INTERRUPT);
1894 caught = 1;
1895 }
1896 if ((status_reg & TWA_STATUS_ATTENTION_INTERRUPT) != 0) {
1897 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
1898 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT);
1899 rv = twa_fetch_aen(sc);
1900 #ifdef DIAGNOSTIC
1901 if (rv != 0)
1902 printf("%s: unable to retrieve AEN (%d)\n",
1903 device_xname(sc->twa_dv), rv);
1904 #endif
1905 caught = 1;
1906 }
1907 if (status_reg & TWA_STATUS_COMMAND_INTERRUPT) {
1908 /* Start any requests that might be in the pending queue. */
1909 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
1910 TWA_CONTROL_MASK_COMMAND_INTERRUPT);
1911 (void)twa_drain_pending_queue(sc);
1912 caught = 1;
1913 }
1914 if (status_reg & TWA_STATUS_RESPONSE_INTERRUPT) {
1915 s = splbio();
1916 twa_done(sc);
1917 splx(s);
1918 caught = 1;
1919 }
1920 bail:
1921 return (caught);
1922 }
1923
1924 /*
1925 * Accept an open operation on the control device.
1926 */
1927 static int
twaopen(dev_t dev,int flag,int mode,struct lwp * l)1928 twaopen(dev_t dev, int flag, int mode, struct lwp *l)
1929 {
1930 struct twa_softc *twa;
1931
1932 if ((twa = device_lookup_private(&twa_cd, minor(dev))) == NULL)
1933 return (ENXIO);
1934 if ((twa->twa_sc_flags & TWA_STATE_OPEN) != 0)
1935 return (EBUSY);
1936
1937 twa->twa_sc_flags |= TWA_STATE_OPEN;
1938
1939 return (0);
1940 }
1941
1942 /*
1943 * Accept the last close on the control device.
1944 */
1945 static int
twaclose(dev_t dev,int flag,int mode,struct lwp * l)1946 twaclose(dev_t dev, int flag, int mode,
1947 struct lwp *l)
1948 {
1949 struct twa_softc *twa;
1950
1951 twa = device_lookup_private(&twa_cd, minor(dev));
1952 twa->twa_sc_flags &= ~TWA_STATE_OPEN;
1953 return (0);
1954 }
1955
1956 /*
1957 * Function name: twaioctl
1958 * Description: ioctl handler.
1959 *
1960 * Input: sc -- ptr to per ctlr structure
1961 * cmd -- ioctl cmd
1962 * buf -- ptr to buffer in kernel memory, which is
1963 * a copy of the input buffer in user-space
1964 * Output: buf -- ptr to buffer in kernel memory, which will
1965 * be copied of the output buffer in user-space
1966 * Return value: 0 -- success
1967 * non-zero-- failure
1968 */
1969 static int
twaioctl(dev_t dev,u_long cmd,void * data,int flag,struct lwp * l)1970 twaioctl(dev_t dev, u_long cmd, void *data, int flag,
1971 struct lwp *l)
1972 {
1973 struct twa_softc *sc;
1974 struct twa_ioctl_9k *user_buf = (struct twa_ioctl_9k *)data;
1975 struct tw_cl_event_packet event_buf;
1976 struct twa_request *tr = 0;
1977 int32_t event_index = 0;
1978 int32_t start_index;
1979 int s, error = 0;
1980
1981 sc = device_lookup_private(&twa_cd, minor(dev));
1982
1983 switch (cmd) {
1984 case TW_OSL_IOCTL_FIRMWARE_PASS_THROUGH:
1985 {
1986 struct twa_command_packet *cmdpkt;
1987 uint32_t data_buf_size_adjusted;
1988
1989 /* Get a request packet */
1990 tr = twa_get_request_wait(sc, 0);
1991 KASSERT(tr != NULL);
1992 /*
1993 * Make sure that the data buffer sent to firmware is a
1994 * 512 byte multiple in size.
1995 */
1996 data_buf_size_adjusted =
1997 (user_buf->twa_drvr_pkt.buffer_length + 511) & ~511;
1998
1999 if ((tr->tr_length = data_buf_size_adjusted)) {
2000 if ((tr->tr_data = malloc(data_buf_size_adjusted,
2001 M_DEVBUF, M_WAITOK)) == NULL) {
2002 error = ENOMEM;
2003 goto fw_passthru_done;
2004 }
2005 /* Copy the payload. */
2006 if ((error = copyin((void *) (user_buf->pdata),
2007 (void *) (tr->tr_data),
2008 user_buf->twa_drvr_pkt.buffer_length)) != 0) {
2009 goto fw_passthru_done;
2010 }
2011 tr->tr_flags |= TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT;
2012 }
2013 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_IOCTL;
2014 cmdpkt = tr->tr_command;
2015
2016 /* Copy the command packet. */
2017 memcpy(cmdpkt, &(user_buf->twa_cmd_pkt),
2018 sizeof(struct twa_command_packet));
2019 cmdpkt->command.cmd_pkt_7k.generic.request_id =
2020 tr->tr_request_id;
2021
2022 /* Send down the request, and wait for it to complete. */
2023 if ((error = twa_wait_request(tr, TWA_REQUEST_TIMEOUT_PERIOD))) {
2024 if (error == ETIMEDOUT)
2025 break; /* clean-up done by twa_wait_request */
2026 goto fw_passthru_done;
2027 }
2028
2029 /* Copy the command packet back into user space. */
2030 memcpy(&user_buf->twa_cmd_pkt, cmdpkt,
2031 sizeof(struct twa_command_packet));
2032
2033 /* If there was a payload, copy it back too. */
2034 if (tr->tr_length)
2035 error = copyout(tr->tr_data, user_buf->pdata,
2036 user_buf->twa_drvr_pkt.buffer_length);
2037 fw_passthru_done:
2038 /* Free resources. */
2039 if (tr->tr_data)
2040 free(tr->tr_data, M_DEVBUF);
2041
2042 if (tr)
2043 twa_release_request(tr);
2044 break;
2045 }
2046
2047 case TW_OSL_IOCTL_SCAN_BUS:
2048 twa_request_bus_scan(sc->twa_dv, "twa", 0);
2049 break;
2050
2051 case TW_CL_IOCTL_GET_FIRST_EVENT:
2052 if (sc->twa_aen_queue_wrapped) {
2053 if (sc->twa_aen_queue_overflow) {
2054 /*
2055 * The aen queue has wrapped, even before some
2056 * events have been retrieved. Let the caller
2057 * know that he missed out on some AEN's.
2058 */
2059 user_buf->twa_drvr_pkt.status =
2060 TWA_ERROR_AEN_OVERFLOW;
2061 sc->twa_aen_queue_overflow = FALSE;
2062 } else
2063 user_buf->twa_drvr_pkt.status = 0;
2064 event_index = sc->twa_aen_head;
2065 } else {
2066 if (sc->twa_aen_head == sc->twa_aen_tail) {
2067 user_buf->twa_drvr_pkt.status =
2068 TWA_ERROR_AEN_NO_EVENTS;
2069 break;
2070 }
2071 user_buf->twa_drvr_pkt.status = 0;
2072 event_index = sc->twa_aen_tail; /* = 0 */
2073 }
2074 if ((error = copyout(sc->twa_aen_queue[event_index],
2075 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0)
2076 (sc->twa_aen_queue[event_index])->retrieved =
2077 TWA_AEN_RETRIEVED;
2078 break;
2079
2080 case TW_CL_IOCTL_GET_LAST_EVENT:
2081 if (sc->twa_aen_queue_wrapped) {
2082 if (sc->twa_aen_queue_overflow) {
2083 /*
2084 * The aen queue has wrapped, even before some
2085 * events have been retrieved. Let the caller
2086 * know that he missed out on some AEN's.
2087 */
2088 user_buf->twa_drvr_pkt.status =
2089 TWA_ERROR_AEN_OVERFLOW;
2090 sc->twa_aen_queue_overflow = FALSE;
2091 } else
2092 user_buf->twa_drvr_pkt.status = 0;
2093 } else {
2094 if (sc->twa_aen_head == sc->twa_aen_tail) {
2095 user_buf->twa_drvr_pkt.status =
2096 TWA_ERROR_AEN_NO_EVENTS;
2097 break;
2098 }
2099 user_buf->twa_drvr_pkt.status = 0;
2100 }
2101 event_index =
2102 (sc->twa_aen_head - 1 + TWA_Q_LENGTH) % TWA_Q_LENGTH;
2103 if ((error = copyout(sc->twa_aen_queue[event_index],
2104 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0)
2105 (sc->twa_aen_queue[event_index])->retrieved =
2106 TWA_AEN_RETRIEVED;
2107 break;
2108
2109 case TW_CL_IOCTL_GET_NEXT_EVENT:
2110 user_buf->twa_drvr_pkt.status = 0;
2111 if (sc->twa_aen_queue_wrapped) {
2112
2113 if (sc->twa_aen_queue_overflow) {
2114 /*
2115 * The aen queue has wrapped, even before some
2116 * events have been retrieved. Let the caller
2117 * know that he missed out on some AEN's.
2118 */
2119 user_buf->twa_drvr_pkt.status =
2120 TWA_ERROR_AEN_OVERFLOW;
2121 sc->twa_aen_queue_overflow = FALSE;
2122 }
2123 start_index = sc->twa_aen_head;
2124 } else {
2125 if (sc->twa_aen_head == sc->twa_aen_tail) {
2126 user_buf->twa_drvr_pkt.status =
2127 TWA_ERROR_AEN_NO_EVENTS;
2128 break;
2129 }
2130 start_index = sc->twa_aen_tail; /* = 0 */
2131 }
2132 error = copyin(user_buf->pdata, &event_buf,
2133 sizeof(struct tw_cl_event_packet));
2134
2135 event_index = (start_index + event_buf.sequence_id -
2136 (sc->twa_aen_queue[start_index])->sequence_id + 1)
2137 % TWA_Q_LENGTH;
2138
2139 if (!((sc->twa_aen_queue[event_index])->sequence_id >
2140 event_buf.sequence_id)) {
2141 if (user_buf->twa_drvr_pkt.status ==
2142 TWA_ERROR_AEN_OVERFLOW)
2143 /* so we report the overflow next time */
2144 sc->twa_aen_queue_overflow = TRUE;
2145 user_buf->twa_drvr_pkt.status = TWA_ERROR_AEN_NO_EVENTS;
2146 break;
2147 }
2148 if ((error = copyout(sc->twa_aen_queue[event_index],
2149 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0)
2150 (sc->twa_aen_queue[event_index])->retrieved =
2151 TWA_AEN_RETRIEVED;
2152 break;
2153
2154 case TW_CL_IOCTL_GET_PREVIOUS_EVENT:
2155 user_buf->twa_drvr_pkt.status = 0;
2156 if (sc->twa_aen_queue_wrapped) {
2157 if (sc->twa_aen_queue_overflow) {
2158 /*
2159 * The aen queue has wrapped, even before some
2160 * events have been retrieved. Let the caller
2161 * know that he missed out on some AEN's.
2162 */
2163 user_buf->twa_drvr_pkt.status =
2164 TWA_ERROR_AEN_OVERFLOW;
2165 sc->twa_aen_queue_overflow = FALSE;
2166 }
2167 start_index = sc->twa_aen_head;
2168 } else {
2169 if (sc->twa_aen_head == sc->twa_aen_tail) {
2170 user_buf->twa_drvr_pkt.status =
2171 TWA_ERROR_AEN_NO_EVENTS;
2172 break;
2173 }
2174 start_index = sc->twa_aen_tail; /* = 0 */
2175 }
2176 if ((error = copyin(user_buf->pdata, &event_buf,
2177 sizeof(struct tw_cl_event_packet))) != 0)
2178
2179 event_index = (start_index + event_buf.sequence_id -
2180 (sc->twa_aen_queue[start_index])->sequence_id - 1)
2181 % TWA_Q_LENGTH;
2182 if (!((sc->twa_aen_queue[event_index])->sequence_id <
2183 event_buf.sequence_id)) {
2184 if (user_buf->twa_drvr_pkt.status ==
2185 TWA_ERROR_AEN_OVERFLOW)
2186 /* so we report the overflow next time */
2187 sc->twa_aen_queue_overflow = TRUE;
2188 user_buf->twa_drvr_pkt.status =
2189 TWA_ERROR_AEN_NO_EVENTS;
2190 break;
2191 }
2192 if ((error = copyout(sc->twa_aen_queue [event_index],
2193 user_buf->pdata, sizeof(struct tw_cl_event_packet))) != 0)
2194 aprint_error_dev(sc->twa_dv, "get_previous: Could not "
2195 "copyout to event_buf. error = %x\n", error);
2196 (sc->twa_aen_queue[event_index])->retrieved = TWA_AEN_RETRIEVED;
2197 break;
2198
2199 case TW_CL_IOCTL_GET_LOCK:
2200 {
2201 struct tw_cl_lock_packet twa_lock;
2202
2203 copyin(user_buf->pdata, &twa_lock,
2204 sizeof(struct tw_cl_lock_packet));
2205 s = splbio();
2206 if ((sc->twa_ioctl_lock.lock == TWA_LOCK_FREE) ||
2207 (twa_lock.force_flag) ||
2208 (time_second >= sc->twa_ioctl_lock.timeout)) {
2209
2210 sc->twa_ioctl_lock.lock = TWA_LOCK_HELD;
2211 sc->twa_ioctl_lock.timeout = time_second +
2212 (twa_lock.timeout_msec / 1000);
2213 twa_lock.time_remaining_msec = twa_lock.timeout_msec;
2214 user_buf->twa_drvr_pkt.status = 0;
2215 } else {
2216 twa_lock.time_remaining_msec =
2217 (sc->twa_ioctl_lock.timeout - time_second) *
2218 1000;
2219 user_buf->twa_drvr_pkt.status =
2220 TWA_ERROR_IOCTL_LOCK_ALREADY_HELD;
2221 }
2222 splx(s);
2223 copyout(&twa_lock, user_buf->pdata,
2224 sizeof(struct tw_cl_lock_packet));
2225 break;
2226 }
2227
2228 case TW_CL_IOCTL_RELEASE_LOCK:
2229 s = splbio();
2230 if (sc->twa_ioctl_lock.lock == TWA_LOCK_FREE) {
2231 user_buf->twa_drvr_pkt.status =
2232 TWA_ERROR_IOCTL_LOCK_NOT_HELD;
2233 } else {
2234 sc->twa_ioctl_lock.lock = TWA_LOCK_FREE;
2235 user_buf->twa_drvr_pkt.status = 0;
2236 }
2237 splx(s);
2238 break;
2239
2240 case TW_CL_IOCTL_GET_COMPATIBILITY_INFO:
2241 {
2242 struct tw_cl_compatibility_packet comp_pkt;
2243
2244 memcpy(comp_pkt.driver_version, TWA_DRIVER_VERSION_STRING,
2245 sizeof(TWA_DRIVER_VERSION_STRING));
2246 comp_pkt.working_srl = sc->working_srl;
2247 comp_pkt.working_branch = sc->working_branch;
2248 comp_pkt.working_build = sc->working_build;
2249 user_buf->twa_drvr_pkt.status = 0;
2250
2251 /* Copy compatibility information to user space. */
2252 copyout(&comp_pkt, user_buf->pdata,
2253 uimin(sizeof(struct tw_cl_compatibility_packet),
2254 user_buf->twa_drvr_pkt.buffer_length));
2255 break;
2256 }
2257
2258 case TWA_IOCTL_GET_UNITNAME: /* WASABI EXTENSION */
2259 {
2260 struct twa_unitname *tn;
2261 struct twa_drive *tdr;
2262
2263 tn = (struct twa_unitname *)data;
2264 /* XXX mutex */
2265 if (tn->tn_unit < 0 || tn->tn_unit >= sc->sc_nunits)
2266 return (EINVAL);
2267 tdr = &sc->sc_units[tn->tn_unit];
2268 if (tdr->td_dev == NULL)
2269 tn->tn_name[0] = '\0';
2270 else
2271 strlcpy(tn->tn_name, device_xname(tdr->td_dev),
2272 sizeof(tn->tn_name));
2273 return (0);
2274 }
2275
2276 default:
2277 /* Unknown opcode. */
2278 error = ENOTTY;
2279 }
2280
2281 return(error);
2282 }
2283
2284 const struct cdevsw twa_cdevsw = {
2285 .d_open = twaopen,
2286 .d_close = twaclose,
2287 .d_read = noread,
2288 .d_write = nowrite,
2289 .d_ioctl = twaioctl,
2290 .d_stop = nostop,
2291 .d_tty = notty,
2292 .d_poll = nopoll,
2293 .d_mmap = nommap,
2294 .d_kqfilter = nokqfilter,
2295 .d_discard = nodiscard,
2296 .d_flag = D_OTHER
2297 };
2298
2299 /*
2300 * Function name: twa_get_param
2301 * Description: Get a firmware parameter.
2302 *
2303 * Input: sc -- ptr to per ctlr structure
2304 * table_id -- parameter table #
2305 * param_id -- index of the parameter in the table
2306 * param_size -- size of the parameter in bytes
2307 * callback -- ptr to function, if any, to be called
2308 * back on completion; NULL if no callback.
2309 * Output: None
2310 * Return value: ptr to param structure -- success
2311 * NULL -- failure
2312 */
2313 static int
twa_get_param(struct twa_softc * sc,int table_id,int param_id,size_t param_size,void (* callback)(struct twa_request * tr),struct twa_param_9k ** param)2314 twa_get_param(struct twa_softc *sc, int table_id, int param_id,
2315 size_t param_size, void (* callback)(struct twa_request *tr),
2316 struct twa_param_9k **param)
2317 {
2318 int rv = 0;
2319 struct twa_request *tr;
2320 union twa_command_7k *cmd;
2321
2322 /* Get a request packet. */
2323 if ((tr = twa_get_request(sc, 0)) == NULL) {
2324 rv = EAGAIN;
2325 goto out;
2326 }
2327
2328 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL;
2329
2330 /* Allocate memory to read data into. */
2331 if ((*param = (struct twa_param_9k *)
2332 malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT)) == NULL) {
2333 rv = ENOMEM;
2334 goto out;
2335 }
2336
2337 memset(*param, 0, sizeof(struct twa_param_9k) - 1 + param_size);
2338 tr->tr_data = *param;
2339 tr->tr_length = TWA_SECTOR_SIZE;
2340 tr->tr_flags = TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT;
2341
2342 /* Build the cmd pkt. */
2343 cmd = &(tr->tr_command->command.cmd_pkt_7k);
2344
2345 tr->tr_command->cmd_hdr.header_desc.size_header = 128;
2346
2347 cmd->param.opcode = TWA_OP_GET_PARAM;
2348 cmd->param.sgl_offset = 2;
2349 cmd->param.size = 2;
2350 cmd->param.request_id = tr->tr_request_id;
2351 cmd->param.unit = 0;
2352 cmd->param.param_count = 1;
2353
2354 /* Specify which parameter we need. */
2355 (*param)->table_id = table_id | TWA_9K_PARAM_DESCRIPTOR;
2356 (*param)->parameter_id = param_id;
2357 (*param)->parameter_size_bytes = param_size;
2358
2359 /* Submit the command. */
2360 if (callback == NULL) {
2361 /* There's no call back; wait till the command completes. */
2362 rv = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD);
2363
2364 if (rv != 0)
2365 goto out;
2366
2367 if ((rv = cmd->param.status) != 0) {
2368 /* twa_drain_complete_queue will have done the unmapping */
2369 goto out;
2370 }
2371 twa_release_request(tr);
2372 return (rv);
2373 } else {
2374 /* There's a call back. Simply submit the command. */
2375 tr->tr_callback = callback;
2376 rv = twa_map_request(tr);
2377 return (rv);
2378 }
2379 out:
2380 if (tr)
2381 twa_release_request(tr);
2382 return(rv);
2383 }
2384
2385 /*
2386 * Function name: twa_set_param
2387 * Description: Set a firmware parameter.
2388 *
2389 * Input: sc -- ptr to per ctlr structure
2390 * table_id -- parameter table #
2391 * param_id -- index of the parameter in the table
2392 * param_size -- size of the parameter in bytes
2393 * callback -- ptr to function, if any, to be called
2394 * back on completion; NULL if no callback.
2395 * Output: None
2396 * Return value: 0 -- success
2397 * non-zero-- failure
2398 */
2399 static int
twa_set_param(struct twa_softc * sc,int table_id,int param_id,int param_size,void * data,void (* callback)(struct twa_request * tr))2400 twa_set_param(struct twa_softc *sc, int table_id, int param_id, int param_size,
2401 void *data, void (* callback)(struct twa_request *tr))
2402 {
2403 struct twa_request *tr;
2404 union twa_command_7k *cmd;
2405 struct twa_param_9k *param = NULL;
2406 int error = ENOMEM;
2407
2408 tr = twa_get_request(sc, 0);
2409 if (tr == NULL)
2410 return (EAGAIN);
2411
2412 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL;
2413
2414 /* Allocate memory to send data using. */
2415 if ((param = (struct twa_param_9k *)
2416 malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT)) == NULL)
2417 goto out;
2418 memset(param, 0, sizeof(struct twa_param_9k) - 1 + param_size);
2419 tr->tr_data = param;
2420 tr->tr_length = TWA_SECTOR_SIZE;
2421 tr->tr_flags = TWA_CMD_DATA_IN | TWA_CMD_DATA_OUT;
2422
2423 /* Build the cmd pkt. */
2424 cmd = &(tr->tr_command->command.cmd_pkt_7k);
2425
2426 tr->tr_command->cmd_hdr.header_desc.size_header = 128;
2427
2428 cmd->param.opcode = TWA_OP_SET_PARAM;
2429 cmd->param.sgl_offset = 2;
2430 cmd->param.size = 2;
2431 cmd->param.request_id = tr->tr_request_id;
2432 cmd->param.unit = 0;
2433 cmd->param.param_count = 1;
2434
2435 /* Specify which parameter we want to set. */
2436 param->table_id = table_id | TWA_9K_PARAM_DESCRIPTOR;
2437 param->parameter_id = param_id;
2438 param->parameter_size_bytes = param_size;
2439 memcpy(param->data, data, param_size);
2440
2441 /* Submit the command. */
2442 if (callback == NULL) {
2443 /* There's no call back; wait till the command completes. */
2444 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD);
2445 if (error == ETIMEDOUT)
2446 /* clean-up done by twa_immediate_request */
2447 return(error);
2448 if (error)
2449 goto out;
2450 if ((error = cmd->param.status)) {
2451 /*
2452 * twa_drain_complete_queue will have done the
2453 * unmapping.
2454 */
2455 goto out;
2456 }
2457 free(param, M_DEVBUF);
2458 twa_release_request(tr);
2459 return(error);
2460 } else {
2461 /* There's a call back. Simply submit the command. */
2462 tr->tr_callback = callback;
2463 if ((error = twa_map_request(tr)))
2464 goto out;
2465
2466 return (0);
2467 }
2468 out:
2469 if (param)
2470 free(param, M_DEVBUF);
2471 if (tr)
2472 twa_release_request(tr);
2473 return(error);
2474 }
2475
2476 /*
2477 * Function name: twa_init_connection
2478 * Description: Send init_connection cmd to firmware
2479 *
2480 * Input: sc -- ptr to per ctlr structure
2481 * message_credits -- max # of requests that we might send
2482 * down simultaneously. This will be
2483 * typically set to 256 at init-time or
2484 * after a reset, and to 1 at shutdown-time
2485 * set_features -- indicates if we intend to use 64-bit
2486 * sg, also indicates if we want to do a
2487 * basic or an extended init_connection;
2488 *
2489 * Note: The following input/output parameters are valid, only in case of an
2490 * extended init_connection:
2491 *
2492 * current_fw_srl -- srl of fw we are bundled
2493 * with, if any; 0 otherwise
2494 * current_fw_arch_id -- arch_id of fw we are bundled
2495 * with, if any; 0 otherwise
2496 * current_fw_branch -- branch # of fw we are bundled
2497 * with, if any; 0 otherwise
2498 * current_fw_build -- build # of fw we are bundled
2499 * with, if any; 0 otherwise
2500 * Output: fw_on_ctlr_srl -- srl of fw on ctlr
2501 * fw_on_ctlr_arch_id -- arch_id of fw on ctlr
2502 * fw_on_ctlr_branch -- branch # of fw on ctlr
2503 * fw_on_ctlr_build -- build # of fw on ctlr
2504 * init_connect_result -- result bitmap of fw response
2505 * Return value: 0 -- success
2506 * non-zero-- failure
2507 */
2508 static int
twa_init_connection(struct twa_softc * sc,uint16_t message_credits,uint32_t set_features,uint16_t current_fw_srl,uint16_t current_fw_arch_id,uint16_t current_fw_branch,uint16_t current_fw_build,uint16_t * fw_on_ctlr_srl,uint16_t * fw_on_ctlr_arch_id,uint16_t * fw_on_ctlr_branch,uint16_t * fw_on_ctlr_build,uint32_t * init_connect_result)2509 twa_init_connection(struct twa_softc *sc, uint16_t message_credits,
2510 uint32_t set_features, uint16_t current_fw_srl,
2511 uint16_t current_fw_arch_id, uint16_t current_fw_branch,
2512 uint16_t current_fw_build, uint16_t *fw_on_ctlr_srl,
2513 uint16_t *fw_on_ctlr_arch_id, uint16_t *fw_on_ctlr_branch,
2514 uint16_t *fw_on_ctlr_build, uint32_t *init_connect_result)
2515 {
2516 struct twa_request *tr;
2517 struct twa_command_init_connect *init_connect;
2518 int error = 1;
2519
2520 /* Get a request packet. */
2521 if ((tr = twa_get_request(sc, 0)) == NULL)
2522 goto out;
2523 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL;
2524 /* Build the cmd pkt. */
2525 init_connect = &(tr->tr_command->command.cmd_pkt_7k.init_connect);
2526
2527 tr->tr_command->cmd_hdr.header_desc.size_header = 128;
2528
2529 init_connect->opcode = TWA_OP_INIT_CONNECTION;
2530 init_connect->request_id = tr->tr_request_id;
2531 init_connect->message_credits = message_credits;
2532 init_connect->features = set_features;
2533 if (TWA_64BIT_ADDRESSES)
2534 init_connect->features |= TWA_64BIT_SG_ADDRESSES;
2535 if (set_features & TWA_EXTENDED_INIT_CONNECT) {
2536 /*
2537 * Fill in the extra fields needed for
2538 * an extended init_connect.
2539 */
2540 init_connect->size = 6;
2541 init_connect->fw_srl = current_fw_srl;
2542 init_connect->fw_arch_id = current_fw_arch_id;
2543 init_connect->fw_branch = current_fw_branch;
2544 } else
2545 init_connect->size = 3;
2546
2547 /* Submit the command, and wait for it to complete. */
2548 error = twa_immediate_request(tr, TWA_REQUEST_TIMEOUT_PERIOD);
2549 if (error == ETIMEDOUT)
2550 return(error); /* clean-up done by twa_immediate_request */
2551 if (error)
2552 goto out;
2553 if ((error = init_connect->status)) {
2554 /* twa_drain_complete_queue will have done the unmapping */
2555 goto out;
2556 }
2557 if (set_features & TWA_EXTENDED_INIT_CONNECT) {
2558 *fw_on_ctlr_srl = init_connect->fw_srl;
2559 *fw_on_ctlr_arch_id = init_connect->fw_arch_id;
2560 *fw_on_ctlr_branch = init_connect->fw_branch;
2561 *fw_on_ctlr_build = init_connect->fw_build;
2562 *init_connect_result = init_connect->result;
2563 }
2564 twa_release_request(tr);
2565 return(error);
2566
2567 out:
2568 if (tr)
2569 twa_release_request(tr);
2570 return(error);
2571 }
2572
2573 static int
twa_reset(struct twa_softc * sc)2574 twa_reset(struct twa_softc *sc)
2575 {
2576 int s;
2577 int error = 0;
2578
2579 /* Set the 'in reset' flag. */
2580 sc->twa_sc_flags |= TWA_STATE_IN_RESET;
2581
2582 /*
2583 * Disable interrupts from the controller, and mask any
2584 * accidental entry into our interrupt handler.
2585 */
2586 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
2587 TWA_CONTROL_DISABLE_INTERRUPTS);
2588
2589 s = splbio();
2590
2591 /* Soft reset the controller. */
2592 if ((error = twa_soft_reset(sc)))
2593 goto out;
2594
2595 /* Re-establish logical connection with the controller. */
2596 if ((error = twa_init_connection(sc, TWA_INIT_MESSAGE_CREDITS,
2597 0, 0, 0, 0, 0,
2598 NULL, NULL, NULL, NULL, NULL))) {
2599 goto out;
2600 }
2601 /*
2602 * Complete all requests in the complete queue; error back all requests
2603 * in the busy queue. Any internal requests will be simply freed.
2604 * Re-submit any requests in the pending queue.
2605 */
2606 twa_drain_busy_queue(sc);
2607
2608 out:
2609 splx(s);
2610 /*
2611 * Enable interrupts, and also clear attention and response interrupts.
2612 */
2613 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
2614 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT |
2615 TWA_CONTROL_UNMASK_RESPONSE_INTERRUPT |
2616 TWA_CONTROL_ENABLE_INTERRUPTS);
2617
2618 /* Clear the 'in reset' flag. */
2619 sc->twa_sc_flags &= ~TWA_STATE_IN_RESET;
2620
2621 return(error);
2622 }
2623
2624 static int
twa_soft_reset(struct twa_softc * sc)2625 twa_soft_reset(struct twa_softc *sc)
2626 {
2627 uint32_t status_reg;
2628
2629 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
2630 TWA_CONTROL_ISSUE_SOFT_RESET |
2631 TWA_CONTROL_CLEAR_HOST_INTERRUPT |
2632 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT |
2633 TWA_CONTROL_MASK_COMMAND_INTERRUPT |
2634 TWA_CONTROL_MASK_RESPONSE_INTERRUPT |
2635 TWA_CONTROL_DISABLE_INTERRUPTS);
2636
2637 if (twa_drain_response_queue_large(sc, 30) != 0) {
2638 aprint_error_dev(sc->twa_dv,
2639 "response queue not empty after reset.\n");
2640 return(1);
2641 }
2642 if (twa_wait_status(sc, TWA_STATUS_MICROCONTROLLER_READY |
2643 TWA_STATUS_ATTENTION_INTERRUPT, 30)) {
2644 aprint_error_dev(sc->twa_dv,
2645 "no attention interrupt after reset.\n");
2646 return(1);
2647 }
2648 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
2649 TWA_CONTROL_CLEAR_ATTENTION_INTERRUPT);
2650
2651 if (twa_drain_response_queue(sc)) {
2652 aprint_error_dev(sc->twa_dv, "cannot drain response queue.\n");
2653 return(1);
2654 }
2655 if (twa_drain_aen_queue(sc)) {
2656 aprint_error_dev(sc->twa_dv, "cannot drain AEN queue.\n");
2657 return(1);
2658 }
2659 if (twa_find_aen(sc, TWA_AEN_SOFT_RESET)) {
2660 aprint_error_dev(sc->twa_dv,
2661 "reset not reported by controller.\n");
2662 return(1);
2663 }
2664 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET);
2665 if (TWA_STATUS_ERRORS(status_reg) ||
2666 twa_check_ctlr_state(sc, status_reg)) {
2667 aprint_error_dev(sc->twa_dv, "controller errors detected.\n");
2668 return(1);
2669 }
2670 return(0);
2671 }
2672
2673 static int
twa_wait_status(struct twa_softc * sc,uint32_t status,uint32_t timeout)2674 twa_wait_status(struct twa_softc *sc, uint32_t status, uint32_t timeout)
2675 {
2676 struct timeval t1;
2677 time_t end_time;
2678 uint32_t status_reg;
2679
2680 timeout = (timeout * 1000 * 100);
2681
2682 microtime(&t1);
2683
2684 end_time = t1.tv_usec + timeout;
2685
2686 do {
2687 status_reg = twa_inl(sc, TWA_STATUS_REGISTER_OFFSET);
2688 /* got the required bit(s)? */
2689 if ((status_reg & status) == status)
2690 return(0);
2691 DELAY(100000);
2692 microtime(&t1);
2693 } while (t1.tv_usec <= end_time);
2694
2695 return(1);
2696 }
2697
2698 static int
twa_fetch_aen(struct twa_softc * sc)2699 twa_fetch_aen(struct twa_softc *sc)
2700 {
2701 struct twa_request *tr;
2702 int s, error = 0;
2703
2704 s = splbio();
2705
2706 if ((tr = twa_get_request(sc, TWA_CMD_AEN)) == NULL) {
2707 splx(s);
2708 return(EIO);
2709 }
2710 tr->tr_cmd_pkt_type |= TWA_CMD_PKT_TYPE_INTERNAL;
2711 tr->tr_callback = twa_aen_callback;
2712 tr->tr_data = malloc(TWA_SECTOR_SIZE, M_DEVBUF, M_NOWAIT);
2713 if (twa_request_sense(tr, 0) != 0) {
2714 if (tr->tr_data)
2715 free(tr->tr_data, M_DEVBUF);
2716 twa_release_request(tr);
2717 error = 1;
2718 }
2719 splx(s);
2720
2721 return(error);
2722 }
2723
2724 /*
2725 * Function name: twa_aen_callback
2726 * Description: Callback for requests to fetch AEN's.
2727 *
2728 * Input: tr -- ptr to completed request pkt
2729 * Output: None
2730 * Return value: None
2731 */
2732 static void
twa_aen_callback(struct twa_request * tr)2733 twa_aen_callback(struct twa_request *tr)
2734 {
2735 int i;
2736 int fetch_more_aens = 0;
2737 struct twa_softc *sc = tr->tr_sc;
2738 struct twa_command_header *cmd_hdr =
2739 (struct twa_command_header *)(tr->tr_data);
2740 struct twa_command_9k *cmd =
2741 &(tr->tr_command->command.cmd_pkt_9k);
2742
2743 if (! cmd->status) {
2744 if ((tr->tr_cmd_pkt_type & TWA_CMD_PKT_TYPE_9K) &&
2745 (cmd->cdb[0] == 0x3 /* REQUEST_SENSE */))
2746 if (twa_enqueue_aen(sc, cmd_hdr)
2747 != TWA_AEN_QUEUE_EMPTY)
2748 fetch_more_aens = 1;
2749 } else {
2750 cmd_hdr->err_specific_desc[sizeof(cmd_hdr->err_specific_desc) - 1] = '\0';
2751 for (i = 0; i < 18; i++)
2752 printf("%x\t", tr->tr_command->cmd_hdr.sense_data[i]);
2753 printf("\n"); /* print new line */
2754
2755 for (i = 0; i < 128; i++)
2756 printf("%x\t", ((int8_t *)(tr->tr_data))[i]);
2757 printf("\n"); /* print new line */
2758 }
2759 if (tr->tr_data)
2760 free(tr->tr_data, M_DEVBUF);
2761 twa_release_request(tr);
2762
2763 if (fetch_more_aens)
2764 twa_fetch_aen(sc);
2765 }
2766
2767 /*
2768 * Function name: twa_enqueue_aen
2769 * Description: Queues AEN's to be supplied to user-space tools on request.
2770 *
2771 * Input: sc -- ptr to per ctlr structure
2772 * cmd_hdr -- ptr to hdr of fw cmd pkt, from where the AEN
2773 * details can be retrieved.
2774 * Output: None
2775 * Return value: None
2776 */
2777 static uint16_t
twa_enqueue_aen(struct twa_softc * sc,struct twa_command_header * cmd_hdr)2778 twa_enqueue_aen(struct twa_softc *sc, struct twa_command_header *cmd_hdr)
2779 {
2780 int rv __diagused, s;
2781 struct tw_cl_event_packet *event;
2782 uint16_t aen_code;
2783 unsigned long sync_time;
2784
2785 s = splbio();
2786 aen_code = cmd_hdr->status_block.error;
2787
2788 switch (aen_code) {
2789 case TWA_AEN_SYNC_TIME_WITH_HOST:
2790
2791 sync_time = (time_second - (3 * 86400)) % 604800;
2792 rv = twa_set_param(sc, TWA_PARAM_TIME_TABLE,
2793 TWA_PARAM_TIME_SchedulerTime, 4,
2794 &sync_time, twa_aen_callback);
2795 #ifdef DIAGNOSTIC
2796 if (rv != 0)
2797 aprint_error_dev(sc->twa_dv,
2798 "unable to sync time with ctlr\n");
2799 #endif
2800 break;
2801
2802 case TWA_AEN_QUEUE_EMPTY:
2803 break;
2804
2805 default:
2806 /* Queue the event. */
2807 event = sc->twa_aen_queue[sc->twa_aen_head];
2808 if (event->retrieved == TWA_AEN_NOT_RETRIEVED)
2809 sc->twa_aen_queue_overflow = TRUE;
2810 event->severity =
2811 cmd_hdr->status_block.substatus_block.severity;
2812 event->time_stamp_sec = time_second;
2813 event->aen_code = aen_code;
2814 event->retrieved = TWA_AEN_NOT_RETRIEVED;
2815 event->sequence_id = ++(sc->twa_current_sequence_id);
2816 cmd_hdr->err_specific_desc[sizeof(cmd_hdr->err_specific_desc) - 1] = '\0';
2817 event->parameter_len = strlen(cmd_hdr->err_specific_desc);
2818 memcpy(event->parameter_data, cmd_hdr->err_specific_desc,
2819 event->parameter_len);
2820
2821 if (event->severity < TWA_AEN_SEVERITY_DEBUG) {
2822 printf("%s: AEN 0x%04X: %s: %s: %s\n",
2823 device_xname(sc->twa_dv),
2824 aen_code,
2825 twa_aen_severity_table[event->severity],
2826 twa_find_msg_string(twa_aen_table, aen_code),
2827 event->parameter_data);
2828 }
2829
2830 if ((sc->twa_aen_head + 1) == TWA_Q_LENGTH)
2831 sc->twa_aen_queue_wrapped = TRUE;
2832 sc->twa_aen_head = (sc->twa_aen_head + 1) % TWA_Q_LENGTH;
2833 break;
2834 } /* switch */
2835 splx(s);
2836
2837 return (aen_code);
2838 }
2839
2840 /*
2841 * Function name: twa_find_aen
2842 * Description: Reports whether a given AEN ever occurred.
2843 *
2844 * Input: sc -- ptr to per ctlr structure
2845 * aen_code-- AEN to look for
2846 * Output: None
2847 * Return value: 0 -- success
2848 * non-zero-- failure
2849 */
2850 static int
twa_find_aen(struct twa_softc * sc,uint16_t aen_code)2851 twa_find_aen(struct twa_softc *sc, uint16_t aen_code)
2852 {
2853 uint32_t last_index;
2854 int s;
2855 int i;
2856
2857 s = splbio();
2858
2859 if (sc->twa_aen_queue_wrapped)
2860 last_index = sc->twa_aen_head;
2861 else
2862 last_index = 0;
2863
2864 i = sc->twa_aen_head;
2865 do {
2866 i = (i + TWA_Q_LENGTH - 1) % TWA_Q_LENGTH;
2867 if ((sc->twa_aen_queue[i])->aen_code == aen_code) {
2868 splx(s);
2869 return(0);
2870 }
2871 } while (i != last_index);
2872
2873 splx(s);
2874 return(1);
2875 }
2876
2877 static inline void
twa_request_init(struct twa_request * tr,int flags)2878 twa_request_init(struct twa_request *tr, int flags)
2879 {
2880 tr->tr_data = NULL;
2881 tr->tr_real_data = NULL;
2882 tr->tr_length = 0;
2883 tr->tr_real_length = 0;
2884 tr->tr_status = TWA_CMD_SETUP;/* command is in setup phase */
2885 tr->tr_flags = flags;
2886 tr->tr_error = 0;
2887 tr->tr_callback = NULL;
2888 tr->tr_cmd_pkt_type = 0;
2889 tr->bp = 0;
2890
2891 /*
2892 * Look at the status field in the command packet to see how
2893 * it completed the last time it was used, and zero out only
2894 * the portions that might have changed. Note that we don't
2895 * care to zero out the sglist.
2896 */
2897 if (tr->tr_command->command.cmd_pkt_9k.status)
2898 memset(tr->tr_command, 0,
2899 sizeof(struct twa_command_header) + 28);
2900 else
2901 memset(&(tr->tr_command->command), 0, 28);
2902 }
2903
2904 struct twa_request *
twa_get_request_wait(struct twa_softc * sc,int flags)2905 twa_get_request_wait(struct twa_softc *sc, int flags)
2906 {
2907 struct twa_request *tr;
2908 int s;
2909
2910 KASSERT((flags & TWA_CMD_AEN) == 0);
2911
2912 s = splbio();
2913 while ((tr = TAILQ_FIRST(&sc->twa_free)) == NULL) {
2914 sc->twa_sc_flags |= TWA_STATE_REQUEST_WAIT;
2915 (void) tsleep(&sc->twa_free, PRIBIO, "twaccb", hz);
2916 }
2917 TAILQ_REMOVE(&sc->twa_free, tr, tr_link);
2918
2919 splx(s);
2920
2921 twa_request_init(tr, flags);
2922
2923 return(tr);
2924 }
2925
2926 struct twa_request *
twa_get_request(struct twa_softc * sc,int flags)2927 twa_get_request(struct twa_softc *sc, int flags)
2928 {
2929 int s;
2930 struct twa_request *tr;
2931
2932 /* Get a free request packet. */
2933 s = splbio();
2934 if (__predict_false((flags & TWA_CMD_AEN) != 0)) {
2935
2936 if ((sc->sc_twa_request->tr_flags & TWA_CMD_AEN_BUSY) == 0) {
2937 tr = sc->sc_twa_request;
2938 flags |= TWA_CMD_AEN_BUSY;
2939 } else {
2940 splx(s);
2941 return (NULL);
2942 }
2943 } else {
2944 if (__predict_false((tr =
2945 TAILQ_FIRST(&sc->twa_free)) == NULL)) {
2946 splx(s);
2947 return (NULL);
2948 }
2949 TAILQ_REMOVE(&sc->twa_free, tr, tr_link);
2950 }
2951 splx(s);
2952
2953 twa_request_init(tr, flags);
2954
2955 return(tr);
2956 }
2957
2958 /*
2959 * Print some information about the controller
2960 */
2961 static void
twa_describe_controller(struct twa_softc * sc)2962 twa_describe_controller(struct twa_softc *sc)
2963 {
2964 struct twa_param_9k *p[10];
2965 int i, rv = 0;
2966 uint32_t dsize;
2967 uint8_t ports;
2968
2969 memset(p, 0, sizeof(p));
2970
2971 /* Get the port count. */
2972 rv |= twa_get_param(sc, TWA_PARAM_CONTROLLER,
2973 TWA_PARAM_CONTROLLER_PortCount, 1, NULL, &p[0]);
2974
2975 /* get version strings */
2976 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_FW,
2977 16, NULL, &p[1]);
2978 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_BIOS,
2979 16, NULL, &p[2]);
2980 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_Mon,
2981 16, NULL, &p[3]);
2982 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_PCBA,
2983 8, NULL, &p[4]);
2984 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_ATA,
2985 8, NULL, &p[5]);
2986 rv |= twa_get_param(sc, TWA_PARAM_VERSION, TWA_PARAM_VERSION_PCI,
2987 8, NULL, &p[6]);
2988 rv |= twa_get_param(sc, TWA_PARAM_DRIVESUMMARY, TWA_PARAM_DRIVESTATUS,
2989 16, NULL, &p[7]);
2990
2991 if (rv) {
2992 /* some error occurred */
2993 aprint_error_dev(sc->twa_dv,
2994 "failed to fetch version information\n");
2995 goto bail;
2996 }
2997
2998 ports = *(uint8_t *)(p[0]->data);
2999
3000 aprint_normal_dev(sc->twa_dv, "%d ports, Firmware %.16s, BIOS %.16s\n",
3001 ports, p[1]->data, p[2]->data);
3002
3003 aprint_verbose_dev(sc->twa_dv,
3004 "Monitor %.16s, PCB %.8s, Achip %.8s, Pchip %.8s\n",
3005 p[3]->data, p[4]->data,
3006 p[5]->data, p[6]->data);
3007
3008 for (i = 0; i < ports; i++) {
3009
3010 if ((*((char *)(p[7]->data + i)) & TWA_DRIVE_DETECTED) == 0)
3011 continue;
3012
3013 rv = twa_get_param(sc, TWA_PARAM_DRIVE_TABLE + i,
3014 TWA_PARAM_DRIVEMODELINDEX,
3015 TWA_PARAM_DRIVEMODEL_LENGTH, NULL, &p[8]);
3016
3017 if (rv != 0) {
3018 aprint_error_dev(sc->twa_dv,
3019 "unable to get drive model for port %d\n", i);
3020 continue;
3021 }
3022
3023 rv = twa_get_param(sc, TWA_PARAM_DRIVE_TABLE + i,
3024 TWA_PARAM_DRIVESIZEINDEX,
3025 TWA_PARAM_DRIVESIZE_LENGTH, NULL, &p[9]);
3026
3027 if (rv != 0) {
3028 aprint_error_dev(sc->twa_dv, "unable to get drive size"
3029 " for port %d\n", i);
3030 free(p[8], M_DEVBUF);
3031 continue;
3032 }
3033
3034 dsize = *(uint32_t *)(p[9]->data);
3035
3036 aprint_verbose_dev(sc->twa_dv, "port %d: %.40s %d MB\n",
3037 i, p[8]->data, dsize / 2048);
3038
3039 if (p[8])
3040 free(p[8], M_DEVBUF);
3041 if (p[9])
3042 free(p[9], M_DEVBUF);
3043 }
3044 bail:
3045 if (p[0])
3046 free(p[0], M_DEVBUF);
3047 if (p[1])
3048 free(p[1], M_DEVBUF);
3049 if (p[2])
3050 free(p[2], M_DEVBUF);
3051 if (p[3])
3052 free(p[3], M_DEVBUF);
3053 if (p[4])
3054 free(p[4], M_DEVBUF);
3055 if (p[5])
3056 free(p[5], M_DEVBUF);
3057 if (p[6])
3058 free(p[6], M_DEVBUF);
3059 }
3060
3061 /*
3062 * Function name: twa_check_ctlr_state
3063 * Description: Makes sure that the fw status register reports a
3064 * proper status.
3065 *
3066 * Input: sc -- ptr to per ctlr structure
3067 * status_reg -- value in the status register
3068 * Output: None
3069 * Return value: 0 -- no errors
3070 * non-zero-- errors
3071 */
3072 static int
twa_check_ctlr_state(struct twa_softc * sc,uint32_t status_reg)3073 twa_check_ctlr_state(struct twa_softc *sc, uint32_t status_reg)
3074 {
3075 int result = 0;
3076 struct timeval t1;
3077 static time_t last_warning[2] = {0, 0};
3078
3079 /* Check if the 'micro-controller ready' bit is not set. */
3080 if ((status_reg & TWA_STATUS_EXPECTED_BITS) !=
3081 TWA_STATUS_EXPECTED_BITS) {
3082
3083 microtime(&t1);
3084
3085 last_warning[0] += (5 * 1000 * 100);
3086
3087 if (t1.tv_usec > last_warning[0]) {
3088 microtime(&t1);
3089 last_warning[0] = t1.tv_usec;
3090 }
3091 result = 1;
3092 }
3093
3094 /* Check if any error bits are set. */
3095 if ((status_reg & TWA_STATUS_UNEXPECTED_BITS) != 0) {
3096
3097 microtime(&t1);
3098 last_warning[1] += (5 * 1000 * 100);
3099 if (t1.tv_usec > last_warning[1]) {
3100 microtime(&t1);
3101 last_warning[1] = t1.tv_usec;
3102 }
3103 if (status_reg & TWA_STATUS_PCI_PARITY_ERROR_INTERRUPT) {
3104 aprint_error_dev(sc->twa_dv, "clearing PCI parity "
3105 "error re-seat/move/replace card.\n");
3106 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
3107 TWA_CONTROL_CLEAR_PARITY_ERROR);
3108 pci_conf_write(sc->pc, sc->tag,
3109 PCI_COMMAND_STATUS_REG,
3110 TWA_PCI_CONFIG_CLEAR_PARITY_ERROR);
3111 }
3112 if (status_reg & TWA_STATUS_PCI_ABORT_INTERRUPT) {
3113 aprint_error_dev(sc->twa_dv, "clearing PCI abort\n");
3114 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
3115 TWA_CONTROL_CLEAR_PCI_ABORT);
3116 pci_conf_write(sc->pc, sc->tag,
3117 PCI_COMMAND_STATUS_REG,
3118 TWA_PCI_CONFIG_CLEAR_PCI_ABORT);
3119 }
3120 if (status_reg & TWA_STATUS_QUEUE_ERROR_INTERRUPT) {
3121 /*
3122 * As documented by 3ware, the 9650 erroneously
3123 * flags queue errors during resets.
3124 * Just ignore them during the reset instead of
3125 * bothering the console.
3126 */
3127 if ((sc->sc_product_id != PCI_PRODUCT_3WARE_9650) ||
3128 ((sc->twa_sc_flags & TWA_STATE_IN_RESET) == 0)) {
3129 aprint_error_dev(sc->twa_dv,
3130 "clearing controller queue error\n");
3131 }
3132
3133 twa_outl(sc, TWA_CONTROL_REGISTER_OFFSET,
3134 TWA_CONTROL_CLEAR_QUEUE_ERROR);
3135 }
3136 if (status_reg & TWA_STATUS_MICROCONTROLLER_ERROR) {
3137 aprint_error_dev(sc->twa_dv,
3138 "micro-controller error\n");
3139 result = 1;
3140 }
3141 }
3142 return(result);
3143 }
3144
3145 MODULE(MODULE_CLASS_DRIVER, twa, "pci");
3146
3147 #ifdef _MODULE
3148 #include "ioconf.c"
3149 #endif
3150
3151 static int
twa_modcmd(modcmd_t cmd,void * opaque)3152 twa_modcmd(modcmd_t cmd, void *opaque)
3153 {
3154 int error = 0;
3155
3156 #ifdef _MODULE
3157 switch (cmd) {
3158 case MODULE_CMD_INIT:
3159 error = config_init_component(cfdriver_ioconf_twa,
3160 cfattach_ioconf_twa, cfdata_ioconf_twa);
3161 break;
3162 case MODULE_CMD_FINI:
3163 error = config_fini_component(cfdriver_ioconf_twa,
3164 cfattach_ioconf_twa, cfdata_ioconf_twa);
3165 break;
3166 default:
3167 error = ENOTTY;
3168 break;
3169 }
3170 #endif
3171
3172 return error;
3173 }
3174