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Searched defs:tx_tdata (Results 1 – 12 of 12) sorted by relevance

/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/fifo/
H A Dfifo64_to_axi4lite.v48 wire [31:0] tx_tdata; net
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/wishbone/
H A Daxi_stream_to_wb.v44 output [63:0] tx_tdata, port
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/simple_gemac/
H A Dgmii_to_axis.v37 input [63:0] tx_tdata, port
H A Dsimple_gemac_wrapper.v21 input [63:0] tx_tdata, input [3:0] tx_tuser, input tx_tlast, input tx_tvalid, output tx_tready, port
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/gpif2/
H A Dgpif2_slave_fifo32.v44 output [63:0] tx_tdata, output tx_tlast, output tx_tvalid, input tx_tready, port
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/b2xxmini/
H A Db205.v208 wire [63:0] ctrl_tdata, resp_tdata, rx_tdata, tx_tdata; net
H A Db205_core.v31 input [63:0] tx_tdata, input tx_tlast, input tx_tvalid, output tx_tready, port
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/xge_interface/
H A Dxge_mac_wrapper.v48 input [63:0] tx_tdata, port
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/b200/
H A Db200.v243 wire [63:0] ctrl_tdata, resp_tdata, rx_tdata, tx_tdata; net
H A Db200_core.v33 input [63:0] tx_tdata, input tx_tlast, input tx_tvalid, output tx_tready, port
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/lib/radio_200/
H A Dradio_legacy.v29 input [63:0] tx_tdata, input tx_tlast, input tx_tvalid, output tx_tready, port
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/x300/
H A Dsoft_ctrl.v68 output [63:0] tx_tdata, port