1 //
2 //   Copyright (C) 2008 by sinamas <sinamas at users.sourceforge.net>
3 //
4 //   This program is free software; you can redistribute it and/or modify
5 //   it under the terms of the GNU General Public License version 2 as
6 //   published by the Free Software Foundation.
7 //
8 //   This program is distributed in the hope that it will be useful,
9 //   but WITHOUT ANY WARRANTY; without even the implied warranty of
10 //   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
11 //   GNU General Public License version 2 for more details.
12 //
13 //   You should have received a copy of the GNU General Public License
14 //   version 2 along with this program; if not, write to the
15 //   Free Software Foundation, Inc.,
16 //   59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
17 //
18 
19 #ifndef SAVESTATE_H
20 #define SAVESTATE_H
21 
22 #include <stddef.h>
23 #include <cstddef>
24 
25 namespace gambatte {
26 
27 class SaverList;
28 
29 struct SaveState {
30 	template<typename T>
31 	class Ptr {
32 	public:
PtrSaveState33 		Ptr() : ptr(0), size_(0) {}
getSaveState34 		T* get() const { return ptr; }
sizeSaveState35 		std::size_t size() const { return size_; }
setSaveState36 		void set(T *p, std::size_t size) { ptr = p; size_ = size; }
37 
38 		friend class SaverList;
39 		friend void setInitState(SaveState &, bool, bool);
40 
41 	private:
42 		T *ptr;
43 		std::size_t size_;
44 	};
45 
46 	struct CPU {
47 		unsigned long cycleCounter;
48 		unsigned short pc;
49 		unsigned short sp;
50 		unsigned char a;
51 		unsigned char b;
52 		unsigned char c;
53 		unsigned char d;
54 		unsigned char e;
55 		unsigned char f;
56 		unsigned char h;
57 		unsigned char l;
58 		bool skip;
59 	} cpu;
60 
61 	struct Mem {
62 		Ptr<unsigned char> vram;
63 		Ptr<unsigned char> sram;
64 		Ptr<unsigned char> wram;
65 		Ptr<unsigned char> ioamhram;
66 		unsigned long divLastUpdate;
67 		unsigned long timaLastUpdate;
68 		unsigned long tmatime;
69 		unsigned long nextSerialtime;
70 		unsigned long lastOamDmaUpdate;
71 		unsigned long minIntTime;
72 		unsigned long unhaltTime;
73 		unsigned short rombank;
74 		unsigned short dmaSource;
75 		unsigned short dmaDestination;
76 		unsigned char rambank;
77 		unsigned char oamDmaPos;
78 		unsigned char HuC3RAMflag;
79 #ifdef HAVE_NETWORK
80 		unsigned char serialize_value;
81 		bool serialize_is_fastcgb;
82 #endif
83 		bool IME;
84 		bool halted;
85 		bool enableRam;
86 		bool rambankMode;
87 		bool hdmaTransfer;
88 	} mem;
89 
90 	struct PPU {
91 		Ptr<unsigned char> bgpData;
92 		Ptr<unsigned char> objpData;
93 		//SpriteMapper::OamReader
94 		Ptr<unsigned char> oamReaderBuf;
95 		Ptr<bool> oamReaderSzbuf;
96       unsigned char dmgPalette[8 * 3];
97 
98 		unsigned long videoCycles;
99 		unsigned long enableDisplayM0Time;
100 		unsigned short lastM0Time;
101 		unsigned short nextM0Irq;
102 		unsigned short tileword;
103 		unsigned short ntileword;
104 		unsigned char spAttribList[10];
105 		unsigned char spByte0List[10];
106 		unsigned char spByte1List[10];
107 		unsigned char winYPos;
108 		unsigned char xpos;
109 		unsigned char endx;
110 		unsigned char reg0;
111 		unsigned char reg1;
112 		unsigned char attrib;
113 		unsigned char nattrib;
114 		unsigned char state;
115 		unsigned char nextSprite;
116 		unsigned char currentSprite;
117 		unsigned char lyc;
118 		unsigned char m0lyc;
119 		unsigned char oldWy;
120 		unsigned char winDrawState;
121 		unsigned char wscx;
122 		bool weMaster;
123 		bool pendingLcdstatIrq;
124 	} ppu;
125 
126 	struct SPU {
127 		struct Duty {
128 			unsigned long nextPosUpdate;
129 			unsigned char nr3;
130 			unsigned char pos;
131 			bool high;
132 		};
133 
134 		struct Env {
135 			unsigned long counter;
136 			unsigned char volume;
137 		};
138 
139 		struct LCounter {
140 			unsigned long counter;
141 			unsigned short lengthCounter;
142 		};
143 
144 		struct {
145 			struct {
146 				unsigned long counter;
147 				unsigned short shadow;
148 				unsigned char nr0;
149 				bool negging;
150 			} sweep;
151 			Duty duty;
152 			Env env;
153 			LCounter lcounter;
154 			unsigned char nr4;
155 			bool master;
156 		} ch1;
157 
158 		struct {
159 			Duty duty;
160 			Env env;
161 			LCounter lcounter;
162 			unsigned char nr4;
163 			bool master;
164 		} ch2;
165 
166 		struct {
167 			Ptr<unsigned char> waveRam;
168 			LCounter lcounter;
169 			unsigned long waveCounter;
170 			unsigned long lastReadTime;
171 			unsigned char nr3;
172 			unsigned char nr4;
173 			unsigned char wavePos;
174 			unsigned char sampleBuf;
175 			bool master;
176 		} ch3;
177 
178 		struct {
179 			struct {
180 				unsigned long counter;
181 				unsigned short reg;
182 			} lfsr;
183 			Env env;
184 			LCounter lcounter;
185 			unsigned char nr4;
186 			bool master;
187 		} ch4;
188 
189 		unsigned long cycleCounter;
190 	} spu;
191 
192 	struct RTC {
193 		unsigned long baseTime;
194 		unsigned long haltTime;
195 		unsigned char dataDh;
196 		unsigned char dataDl;
197 		unsigned char dataH;
198 		unsigned char dataM;
199 		unsigned char dataS;
200 		bool lastLatchData;
201 	} rtc;
202 
203 	struct HuC3 {
204 		unsigned long baseTime;
205 		unsigned long haltTime;
206 		unsigned long dataTime;
207 		unsigned long writingTime;
208 		unsigned long irBaseCycle;
209 		bool halted;
210 		unsigned char shift;
211 		unsigned char ramValue;
212 		unsigned char modeflag;
213 		bool irReceivingPulse;
214 	} huc3;
215 };
216 
217 }
218 
219 #endif
220