1 /*
2  * Copyright (C) 1995-2008 University of Karlsruhe.  All right reserved.
3  *
4  * This file is part of libFirm.
5  *
6  * This file may be distributed and/or modified under the terms of the
7  * GNU General Public License version 2 as published by the Free Software
8  * Foundation and appearing in the file LICENSE.GPL included in the
9  * packaging of this file.
10  *
11  * Licensees holding valid libFirm Professional Edition licenses may use
12  * this file in accordance with the libFirm Commercial License.
13  * Agreement provided with the Software.
14  *
15  * This file is provided AS IS with NO WARRANTY OF ANY KIND, INCLUDING THE
16  * WARRANTY OF DESIGN, MERCHANTABILITY AND FITNESS FOR A PARTICULAR
17  * PURPOSE.
18  */
19 
20 /**
21  * @file
22  * @brief       ia32 architecture variants
23  * @author      Michael Beck, Matthias Braun
24  */
25 #ifndef FIRM_BE_IA32_ARCHITECTURE_H
26 #define FIRM_BE_IA32_ARCHITECTURE_H
27 
28 typedef struct {
29 	/** optimize for size */
30 	unsigned optimize_size:1;
31 	/** use leave in function epilogue */
32 	unsigned use_leave:1;
33 	/** use inc, dec instead of add $1, reg and add $-1, reg */
34 	unsigned use_incdec:1;
35 	/** use soft float library */
36 	unsigned use_softfloat:1;
37 	/** use sse2 instructions (instead of x87) */
38 	unsigned use_sse2:1;
39 	/** use ffreep instead of fpop */
40 	unsigned use_ffreep:1;
41 	/** use femms to pop all float registers */
42 	unsigned use_femms:1;
43 	/** use emms to pop all float registers */
44 	unsigned use_emms:1;
45 	/** use the fucomi instruction */
46 	unsigned use_fucomi:1;
47 	/** use cmovXX instructions */
48 	unsigned use_cmov:1;
49 	/** mode_D moves instead of 2 integer moves */
50 	unsigned use_modeD_moves:1;
51 	/** use add esp, 4 instead of pop */
52 	unsigned use_add_esp_4:1;
53 	/** use add esp, 8 instead of 2 pops */
54 	unsigned use_add_esp_8:1;
55 	/** use sub esp, 4 instead of push */
56 	unsigned use_sub_esp_4:1;
57 	/** use sub esp, 8 instead of 2 pushs */
58 	unsigned use_sub_esp_8:1;
59 	/** use imul mem, imm32 instruction (slow on some CPUs) */
60 	unsigned use_imul_mem_imm32:1;
61 	/** use pxor instead xorps/xorpd */
62 	unsigned use_pxor:1;
63 	/** use mov reg, 0 instruction */
64 	unsigned use_mov_0:1;
65 	/** use cwtl/cltd, which are shorter, to sign extend ax/eax */
66 	unsigned use_short_sex_eax:1;
67 	/** pad Ret instructions that are destination of conditional jump or directly preceded
68 	    by other jump instruction. */
69 	unsigned use_pad_return:1;
70 	/** use the bt instruction */
71 	unsigned use_bt:1;
72 	/** use fisttp instruction (requires SSE3) */
73 	unsigned use_fisttp:1;
74 	/** use SSE prefetch instructions */
75 	unsigned use_sse_prefetch:1;
76 	/** use 3DNow! prefetch instructions */
77 	unsigned use_3dnow_prefetch:1;
78 	/** use SSE4.2 or SSE4a popcnt instruction */
79 	unsigned use_popcnt:1;
80 	/** use i486 instructions */
81 	unsigned use_bswap:1;
82 	/** optimize calling convention where possible */
83 	unsigned optimize_cc:1;
84 	/**
85 	 * disrespect current floating  point rounding mode at entry and exit of
86 	 * functions (this is ok for programs that don't explicitly change the
87 	 * rounding mode
88 	 */
89 	unsigned use_unsafe_floatconv:1;
90 	/** emit machine code instead of assembler */
91 	unsigned emit_machcode:1;
92 
93 	/** function alignment (a power of two in bytes) */
94 	unsigned function_alignment;
95 	/** alignment for labels (which are expected to be frequent jump targets) */
96 	unsigned label_alignment;
97 	/** maximum skip alignment for labels (which are expected to be frequent jump targets) */
98 	unsigned label_alignment_max_skip;
99 	/** if a blocks execfreq is factor higher than its predecessor then align
100 	 *  the blocks label (0 switches off label alignment) */
101 	double label_alignment_factor;
102 } ia32_code_gen_config_t;
103 
104 extern ia32_code_gen_config_t  ia32_cg_config;
105 
106 typedef enum ia32_fp_architectures {
107 	IA32_FPU_ARCH_NONE      = 0,
108 	IA32_FPU_ARCH_X87       = 0x00000001,
109 	IA32_FPU_ARCH_SSE2      = 0x00000002,
110 	IA32_FPU_ARCH_SOFTFLOAT = 0x00000004,
111 }
112 ia32_fp_architectures;
113 
114 /** Initialize the ia32 architecture module. */
115 void ia32_init_architecture(void);
116 
117 /** Setup the ia32_cg_config structure by inspecting current user settings. */
118 void ia32_setup_cg_config(void);
119 
120 /**
121  * Evaluate the costs of an instruction. Used by the irach multiplication
122  * lowerer.
123  *
124  * @param kind   the instruction
125  * @param mode   the mode of the instruction
126  * @param tv     for MUL instruction, the multiplication constant
127  *
128  * @return the cost
129  */
130 int ia32_evaluate_insn(insn_kind kind, const ir_mode *mode, ir_tarval *tv);
131 
132 #endif
133