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Searched defs:user_clk (Results 1 – 10 of 10) sorted by relevance

/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/n3xx/ip/aurora_64b66b_pcs_pma/
H A Daurora_phy_mmcm.v9 output user_clk, port
H A Daurora_phy_x1.v11 input user_clk, port
/dports/cad/openfpgaloader/openFPGALoader-0.6.1/src/
H A DftdiJtagBitbang.cpp79 uint32_t user_clk = clkHZ; in setClkFreq() local
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/e320/ip/aurora_64b66b_pcs_pma/
H A Daurora_phy_x1.v12 output user_clk, port
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/x300/ip/aurora_64b66b_pcs_pma/
H A Daurora_phy_x1.v12 output user_clk, port
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/n3xx/
H A Dn3xx_mgt_wrapper.v34 input wire user_clk, port
H A Dn3xx_mgt_channel_wrapper.v35 input wire user_clk, port
H A Dn3xx_mgt_io_core.v32 input user_clk, port
/dports/comms/uhd/uhd-90ce6062b6b5df2eddeee723777be85108e4e7c7/fpga/usrp3/top/e320/
H A Dn3xx_mgt_io_core.v465 wire user_clk, user_rst; net
H A Dn3xx_sfp_wrapper.v34 input user_clk, port