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Searched defs:virtReg (Results 1 – 25 of 56) sorted by relevance

123

/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/include/llvm/CodeGen/
H A DVirtRegMap.h100 bool hasPhys(Register virtReg) const { in hasPhys()
106 MCRegister getPhys(Register virtReg) const { in getPhys()
117 bool hasShape(Register virtReg) const { in hasShape()
121 ShapeT getShape(Register virtReg) const { in getShape()
126 void assignVirt2Shape(Register virtReg, ShapeT shape) { in assignVirt2Shape()
132 void clearVirt(Register virtReg) { in clearVirt()
154 void setIsSplitFromReg(Register virtReg, Register SReg) { in setIsSplitFromReg()
162 Register getPreSplitReg(Register virtReg) const { in getPreSplitReg()
177 bool isAssignedReg(Register virtReg) const { in isAssignedReg()
188 int getStackSlot(Register virtReg) const { in getStackSlot()
/dports/graphics/llvm-mesa/llvm-13.0.1.src/include/llvm/CodeGen/
H A DVirtRegMap.h100 bool hasPhys(Register virtReg) const { in hasPhys()
106 MCRegister getPhys(Register virtReg) const { in getPhys()
117 bool hasShape(Register virtReg) const { in hasShape()
121 ShapeT getShape(Register virtReg) const { in getShape()
126 void assignVirt2Shape(Register virtReg, ShapeT shape) { in assignVirt2Shape()
132 void clearVirt(Register virtReg) { in clearVirt()
154 void setIsSplitFromReg(Register virtReg, Register SReg) { in setIsSplitFromReg()
162 Register getPreSplitReg(Register virtReg) const { in getPreSplitReg()
177 bool isAssignedReg(Register virtReg) const { in isAssignedReg()
188 int getStackSlot(Register virtReg) const { in getStackSlot()
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/include/llvm/CodeGen/
H A DVirtRegMap.h100 bool hasPhys(Register virtReg) const { in hasPhys()
106 MCRegister getPhys(Register virtReg) const { in getPhys()
117 bool hasShape(Register virtReg) const { in hasShape()
121 ShapeT getShape(Register virtReg) const { in getShape()
126 void assignVirt2Shape(Register virtReg, ShapeT shape) { in assignVirt2Shape()
132 void clearVirt(Register virtReg) { in clearVirt()
154 void setIsSplitFromReg(Register virtReg, Register SReg) { in setIsSplitFromReg()
162 Register getPreSplitReg(Register virtReg) const { in getPreSplitReg()
177 bool isAssignedReg(Register virtReg) const { in isAssignedReg()
188 int getStackSlot(Register virtReg) const { in getStackSlot()
/dports/lang/rust/rustc-1.58.1-src/src/llvm-project/llvm/include/llvm/CodeGen/
H A DVirtRegMap.h100 bool hasPhys(Register virtReg) const { in hasPhys()
106 MCRegister getPhys(Register virtReg) const { in getPhys()
117 bool hasShape(Register virtReg) const { in hasShape()
121 ShapeT getShape(Register virtReg) const { in getShape()
126 void assignVirt2Shape(Register virtReg, ShapeT shape) { in assignVirt2Shape()
132 void clearVirt(Register virtReg) { in clearVirt()
154 void setIsSplitFromReg(Register virtReg, Register SReg) { in setIsSplitFromReg()
162 Register getPreSplitReg(Register virtReg) const { in getPreSplitReg()
177 bool isAssignedReg(Register virtReg) const { in isAssignedReg()
188 int getStackSlot(Register virtReg) const { in getStackSlot()
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/include/llvm/CodeGen/
H A DVirtRegMap.h100 bool hasPhys(Register virtReg) const { in hasPhys()
106 MCRegister getPhys(Register virtReg) const { in getPhys()
117 bool hasShape(Register virtReg) const { in hasShape()
121 ShapeT getShape(Register virtReg) const { in getShape()
126 void assignVirt2Shape(Register virtReg, ShapeT shape) { in assignVirt2Shape()
132 void clearVirt(Register virtReg) { in clearVirt()
154 void setIsSplitFromReg(Register virtReg, Register SReg) { in setIsSplitFromReg()
162 Register getPreSplitReg(Register virtReg) const { in getPreSplitReg()
177 bool isAssignedReg(Register virtReg) const { in isAssignedReg()
188 int getStackSlot(Register virtReg) const { in getStackSlot()
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/include/llvm/CodeGen/
H A DVirtRegMap.h100 bool hasPhys(Register virtReg) const { in hasPhys()
106 MCRegister getPhys(Register virtReg) const { in getPhys()
117 bool hasShape(Register virtReg) const { in hasShape()
121 ShapeT getShape(Register virtReg) const { in getShape()
126 void assignVirt2Shape(Register virtReg, ShapeT shape) { in assignVirt2Shape()
132 void clearVirt(Register virtReg) { in clearVirt()
154 void setIsSplitFromReg(Register virtReg, Register SReg) { in setIsSplitFromReg()
162 Register getPreSplitReg(Register virtReg) const { in getPreSplitReg()
177 bool isAssignedReg(Register virtReg) const { in isAssignedReg()
188 int getStackSlot(Register virtReg) const { in getStackSlot()
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/include/llvm/CodeGen/
H A DVirtRegMap.h100 bool hasPhys(Register virtReg) const { in hasPhys()
106 MCRegister getPhys(Register virtReg) const { in getPhys()
117 bool hasShape(Register virtReg) const { in hasShape()
121 ShapeT getShape(Register virtReg) const { in getShape()
126 void assignVirt2Shape(Register virtReg, ShapeT shape) { in assignVirt2Shape()
132 void clearVirt(Register virtReg) { in clearVirt()
154 void setIsSplitFromReg(Register virtReg, Register SReg) { in setIsSplitFromReg()
162 Register getPreSplitReg(Register virtReg) const { in getPreSplitReg()
177 bool isAssignedReg(Register virtReg) const { in isAssignedReg()
188 int getStackSlot(Register virtReg) const { in getStackSlot()
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/include/llvm/CodeGen/
H A DVirtRegMap.h100 bool hasPhys(Register virtReg) const { in hasPhys()
106 MCRegister getPhys(Register virtReg) const { in getPhys()
117 bool hasShape(Register virtReg) const { in hasShape()
121 ShapeT getShape(Register virtReg) const { in getShape()
126 void assignVirt2Shape(Register virtReg, ShapeT shape) { in assignVirt2Shape()
132 void clearVirt(Register virtReg) { in clearVirt()
154 void setIsSplitFromReg(Register virtReg, Register SReg) { in setIsSplitFromReg()
162 Register getPreSplitReg(Register virtReg) const { in getPreSplitReg()
177 bool isAssignedReg(Register virtReg) const { in isAssignedReg()
188 int getStackSlot(Register virtReg) const { in getStackSlot()
/dports/security/clamav-lts/clamav-0.103.5/libclamav/c++/llvm/lib/CodeGen/
H A DVirtRegMap.h164 bool hasPhys(unsigned virtReg) const { in hasPhys()
170 unsigned getPhys(unsigned virtReg) const { in getPhys()
188 void clearVirt(unsigned virtReg) { in clearVirt()
210 unsigned getPreSplitReg(unsigned virtReg) { in getPreSplitReg()
216 bool isAssignedReg(unsigned virtReg) const { in isAssignedReg()
227 int getStackSlot(unsigned virtReg) const { in getStackSlot()
234 int getReMatId(unsigned virtReg) const { in getReMatId()
283 void removeKillPoint(unsigned virtReg) { in removeKillPoint()
319 unsigned virtReg = I->second.back().first; in transferSpillPts() local
359 unsigned virtReg = I->second.back(); in transferRestorePts() local
[all …]
H A DVirtRegMap.cpp102 unsigned VirtRegMap::getRegAllocPref(unsigned virtReg) { in getRegAllocPref()
114 int VirtRegMap::assignVirt2StackSlot(unsigned virtReg) { in assignVirt2StackSlot()
133 void VirtRegMap::assignVirt2StackSlot(unsigned virtReg, int SS) { in assignVirt2StackSlot()
143 int VirtRegMap::assignVirtReMatId(unsigned virtReg) { in assignVirtReMatId()
151 void VirtRegMap::assignVirtReMatId(unsigned virtReg, int id) { in assignVirtReMatId()
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/include/llvm/CodeGen/
H A DVirtRegMap.h95 bool hasPhys(Register virtReg) const { in hasPhys()
101 MCRegister getPhys(Register virtReg) const { in getPhys()
112 void clearVirt(Register virtReg) { in clearVirt()
134 void setIsSplitFromReg(Register virtReg, unsigned SReg) { in setIsSplitFromReg()
139 unsigned getPreSplitReg(Register virtReg) const { in getPreSplitReg()
154 bool isAssignedReg(Register virtReg) const { in isAssignedReg()
165 int getStackSlot(Register virtReg) const { in getStackSlot()
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/include/llvm/CodeGen/
H A DVirtRegMap.h95 bool hasPhys(Register virtReg) const { in hasPhys()
101 Register getPhys(Register virtReg) const { in getPhys()
112 void clearVirt(Register virtReg) { in clearVirt()
134 void setIsSplitFromReg(Register virtReg, unsigned SReg) { in setIsSplitFromReg()
139 unsigned getPreSplitReg(Register virtReg) const { in getPreSplitReg()
154 bool isAssignedReg(Register virtReg) const { in isAssignedReg()
165 int getStackSlot(Register virtReg) const { in getStackSlot()
/dports/devel/llvm10/llvm-10.0.1.src/include/llvm/CodeGen/
H A DVirtRegMap.h96 bool hasPhys(Register virtReg) const { in hasPhys()
102 Register getPhys(Register virtReg) const { in getPhys()
113 void clearVirt(Register virtReg) { in clearVirt()
135 void setIsSplitFromReg(Register virtReg, unsigned SReg) { in setIsSplitFromReg()
140 unsigned getPreSplitReg(Register virtReg) const { in getPreSplitReg()
155 bool isAssignedReg(Register virtReg) const { in isAssignedReg()
166 int getStackSlot(Register virtReg) const { in getStackSlot()
/dports/devel/llvm11/llvm-11.0.1.src/include/llvm/CodeGen/
H A DVirtRegMap.h95 bool hasPhys(Register virtReg) const { in hasPhys()
101 Register getPhys(Register virtReg) const { in getPhys()
112 void clearVirt(Register virtReg) { in clearVirt()
134 void setIsSplitFromReg(Register virtReg, unsigned SReg) { in setIsSplitFromReg()
139 unsigned getPreSplitReg(Register virtReg) const { in getPreSplitReg()
154 bool isAssignedReg(Register virtReg) const { in isAssignedReg()
165 int getStackSlot(Register virtReg) const { in getStackSlot()
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/include/llvm/CodeGen/
H A DVirtRegMap.h96 bool hasPhys(Register virtReg) const { in hasPhys()
102 Register getPhys(Register virtReg) const { in getPhys()
113 void clearVirt(Register virtReg) { in clearVirt()
135 void setIsSplitFromReg(Register virtReg, unsigned SReg) { in setIsSplitFromReg()
140 unsigned getPreSplitReg(Register virtReg) const { in getPreSplitReg()
155 bool isAssignedReg(Register virtReg) const { in isAssignedReg()
166 int getStackSlot(Register virtReg) const { in getStackSlot()
/dports/devel/tinygo/tinygo-0.14.1/llvm-project/llvm/include/llvm/CodeGen/
H A DVirtRegMap.h96 bool hasPhys(Register virtReg) const { in hasPhys()
102 Register getPhys(Register virtReg) const { in getPhys()
113 void clearVirt(Register virtReg) { in clearVirt()
135 void setIsSplitFromReg(Register virtReg, unsigned SReg) { in setIsSplitFromReg()
140 unsigned getPreSplitReg(Register virtReg) const { in getPreSplitReg()
155 bool isAssignedReg(Register virtReg) const { in isAssignedReg()
166 int getStackSlot(Register virtReg) const { in getStackSlot()
/dports/devel/llvm90/llvm-9.0.1.src/include/llvm/CodeGen/
H A DVirtRegMap.h96 bool hasPhys(unsigned virtReg) const { in hasPhys()
102 Register getPhys(Register virtReg) const { in getPhys()
113 void clearVirt(unsigned virtReg) { in clearVirt()
135 void setIsSplitFromReg(unsigned virtReg, unsigned SReg) { in setIsSplitFromReg()
140 unsigned getPreSplitReg(unsigned virtReg) const { in getPreSplitReg()
155 bool isAssignedReg(unsigned virtReg) const { in isAssignedReg()
165 int getStackSlot(unsigned virtReg) const { in getStackSlot()
/dports/devel/llvm70/llvm-7.0.1.src/include/llvm/CodeGen/
H A DVirtRegMap.h95 bool hasPhys(unsigned virtReg) const { in hasPhys()
101 unsigned getPhys(unsigned virtReg) const { in getPhys()
112 void clearVirt(unsigned virtReg) { in clearVirt()
134 void setIsSplitFromReg(unsigned virtReg, unsigned SReg) { in setIsSplitFromReg()
139 unsigned getPreSplitReg(unsigned virtReg) const { in getPreSplitReg()
154 bool isAssignedReg(unsigned virtReg) const { in isAssignedReg()
164 int getStackSlot(unsigned virtReg) const { in getStackSlot()
/dports/databases/mariadb103-client/mariadb-10.3.34/storage/rocksdb/rocksdb/util/
H A Dmutexlock.h87 explicit WriteLock(port::RWMutex *mu) : mu_(mu) { in assignVirt2Phys()
122 port::AsmVolatilePause(); in hasPreferredPhys()
123 if (tries > 100) { in hasPreferredPhys()
129 void unlock() { locked_.store(false, std::memory_order_release); } in hasPreferredPhys()
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/lib/CodeGen/
H A DVirtRegMap.cpp83 void VirtRegMap::assignVirt2Phys(Register virtReg, MCPhysReg physReg) { in assignVirt2Phys()
119 int VirtRegMap::assignVirt2StackSlot(Register virtReg) { in assignVirt2StackSlot()
127 void VirtRegMap::assignVirt2StackSlot(Register virtReg, int SS) { in assignVirt2StackSlot()
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/lib/CodeGen/
H A DVirtRegMap.cpp83 void VirtRegMap::assignVirt2Phys(Register virtReg, MCPhysReg physReg) { in assignVirt2Phys()
119 int VirtRegMap::assignVirt2StackSlot(Register virtReg) { in assignVirt2StackSlot()
127 void VirtRegMap::assignVirt2StackSlot(Register virtReg, int SS) { in assignVirt2StackSlot()
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/lib/CodeGen/
H A DVirtRegMap.cpp84 void VirtRegMap::assignVirt2Phys(Register virtReg, MCPhysReg physReg) { in assignVirt2Phys()
120 int VirtRegMap::assignVirt2StackSlot(Register virtReg) { in assignVirt2StackSlot()
128 void VirtRegMap::assignVirt2StackSlot(Register virtReg, int SS) { in assignVirt2StackSlot()
/dports/devel/llvm10/llvm-10.0.1.src/lib/CodeGen/
H A DVirtRegMap.cpp83 void VirtRegMap::assignVirt2Phys(Register virtReg, MCPhysReg physReg) { in assignVirt2Phys()
119 int VirtRegMap::assignVirt2StackSlot(Register virtReg) { in assignVirt2StackSlot()
127 void VirtRegMap::assignVirt2StackSlot(Register virtReg, int SS) { in assignVirt2StackSlot()
/dports/devel/llvm11/llvm-11.0.1.src/lib/CodeGen/
H A DVirtRegMap.cpp83 void VirtRegMap::assignVirt2Phys(Register virtReg, MCPhysReg physReg) { in assignVirt2Phys()
119 int VirtRegMap::assignVirt2StackSlot(Register virtReg) { in assignVirt2StackSlot()
127 void VirtRegMap::assignVirt2StackSlot(Register virtReg, int SS) { in assignVirt2StackSlot()
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/swiftshader/third_party/llvm-10.0/llvm/lib/CodeGen/
H A DVirtRegMap.cpp83 void VirtRegMap::assignVirt2Phys(Register virtReg, MCPhysReg physReg) { in assignVirt2Phys()
119 int VirtRegMap::assignVirt2StackSlot(Register virtReg) { in assignVirt2StackSlot()
127 void VirtRegMap::assignVirt2StackSlot(Register virtReg, int SS) { in assignVirt2StackSlot()

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