1 /*	$NetBSD: tsreg.h,v 1.4 2005/12/11 12:23:29 christos Exp $ */
2 /*
3  * Copyright (c) 1995 Ludd, University of Lule}, Sweden.
4  * All rights reserved.
5  *
6  * This code is derived from software contributed to Ludd by
7  * Bertram Barth.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  *    notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  *    notice, this list of conditions and the following disclaimer in the
16  *    documentation and/or other materials provided with the distribution.
17  * 3. All advertising materials mentioning features or use of this software
18  *    must display the following acknowledgement:
19  *      This product includes software developed at Ludd, University of
20  *      Lule}, Sweden and its contributors.
21  * 4. The name of the author may not be used to endorse or promote products
22  *    derived from this software without specific prior written permission
23  *
24  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
25  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
26  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
27  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
28  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
29  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
30  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
31  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
32  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
33  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
34  */
35 
36 /*
37  * TSV05 u.g. 5-11:
38  *
39  * The TSV05 Subsystem has four device registers that occupy only two
40  * LSI-11 Bus word locations: a Data Buffer (TSDB), a Bus Address
41  * Register (TSBA), a Status Register (TSSR), and an Extended Data
42  * Bufffer (TSDBX). The TSDB is an 18-bit register that is ...
43  */
44 
45 #ifdef notdef
46 struct tsdevice {
47 	unsigned short tsdb;/* Data Buffer (TSDB)/Bus Address Register (TSBA) */
48 	unsigned short tssr;/* Status Reg. (TSSR)/Extended Data Buffer(TSDBX) */
49 };
50 #endif
51 #define	TSDB	0
52 #define	TSBA	0
53 #define	TSSR	2
54 #define	TSDBX	3
55 
56 /*
57  * TSSR Register bit definitions
58  */
59 #define TS_SC	0x8000	/* Special Condition */
60 #define TS_UPE	0x4000	/* not used in TSV05, UPE in TS11 */
61 #define TS_SCE	0x2000	/* Sanity Check Error, SPE in TS11 */
62 #define TS_RMR	0x1000	/* Register Modification Refused */
63 #define TS_NXM	0x0800	/* Nonexistent Memory */
64 #define TS_NBA	0x0400	/* Need Buffer Address */
65 #define TS_A11	0x0300	/* Address Bits 17-16 */
66 #define TS_SSR	0x0080	/* Subsystem Ready */
67 #define TS_OFL	0x0040	/* Off Line */
68 #define TS_FTC	0x0030	/* Fatal Termination Class Code */
69 #define TS_TC	0x000E	/* Termination Class Code */
70 #define TS_NU	0x0001	/* Not Used */
71 
72 #define TS_TSSR_BITS	"\20\20SC\17UPE\16SCE\15RMR\14NXM\13NBA\12A17\11A16" \
73 			   "\10SSR\7OFL\6FTC\5FTC\4FTL\3ERR\2ATTN\1NU"
74 
75 /*
76  * Termination Codes
77  */
78 #define TS_FTC_IDF	(0<<4)	/* internal diagnostic failure */
79 #define TS_FTC_RSVD	(1<<4)	/* Reserved */
80 #define TS_FTC_NU	(2<<4)	/* Not Used */
81 #define TS_FTC_DPD	(3<<4)	/* Detection of Power Down (not implemented) */
82 
83 #define TS_TC_NORM	(0<<1)	/* Normal Termination */
84 #define TS_TC_ATTN	(1<<1)	/* Attention Condition */
85 #define TS_TC_TSA	(2<<1)	/* Tape status alert */
86 #define TS_TC_FR	(3<<1)	/* Function reject */
87 #define TS_TC_TPD	(4<<1)	/* Tape position is one record down (recov.) */
88 #define TS_TC_TNM	(5<<1)	/* Tape not moved (recoverable) */
89 #define TS_TC_TPL	(6<<1)	/* Tape position lost (unrecoverable) */
90 #define TS_TC_FCE	(7<<1)	/* Fatal Controller Error (see FTC) */
91 
92 struct cmd {			/* command packet (not all words required) */
93 	unsigned short cmdr;	/* command word */
94 	unsigned short cw1;	/* low order data pointer address  (A15-00) */
95 	unsigned short cw2;	/* high order data pointer address (A21-16) */
96 	unsigned short cw3;	/* count parameter */
97 };
98 
99 /*
100  * Command flags
101  */
102 #define TS_CF_ACK	(1<<15)		/* Acknowledge */
103 #define TS_CF_CVC	(1<<14)		/* Clear Volume Check */
104 #define TS_CF_OPP	(1<<13)		/* Opposite */
105 #define TS_CF_SWB	(1<<12)		/* Swap Bytes */
106 #define TS_CF_IE	(1<< 7)		/* Interrupt Enable */
107 #define TS_CF_CMODE	0x0F00		/* Command Mode Field */
108 #define TS_CF_CCODE	0x001F		/* Command Code (major) */
109 #define TS_CF_CMASK	0x0F1F		/* mask for complete command */
110 
111 #define TS_CMD(cMode,cCode)	((cMode<<8)|cCode)
112 
113 #define TS_CC_READ	0x01			/* READ */
114 #define TS_CMD_RNF	TS_CMD(0,TS_CC_READ)	/* Read Next (Forward) */
115 #define TS_CMD_RPR	TS_CMD(1,TS_CC_READ)	/* Read Previous (Reverse) */
116 #define TS_CMD_RPF	TS_CMD(2,TS_CC_READ)	/* Read Previous (Forward) */
117 #define TS_CMD_RNR	TS_CMD(3,TS_CC_READ)	/* Read Next (Reverse) */
118 
119 #define TS_CC_WCHAR	0x04			/* WRITE CHARACTERISTICS */
120 #define TS_CMD_WCHAR	TS_CMD(0,TS_CC_WCHAR)	/* Load msg-buffer etc. */
121 
122 #define TS_CC_WRITE	0x05			/* WRITE */
123 #define TS_CMD_WD	TS_CMD(0,TS_CC_WRITE)	/* Write Data (Next) */
124 #define TS_CMD_WDR	TS_CMD(1,TS_CC_WRITE)	/* Write Data (Retry) */
125 
126 #define TS_CC_WSM	0x06			/* WRITE SUBSYSTEM MEMORY */
127 #define TS_CMD_WSM	TS_CMD(0,TS_CC_WSM)	/* (diagnostics only) */
128 
129 #define TS_CC_POS	0x08			/* POSITION */
130 #define TS_CMD_SRF	TS_CMD(0,TS_CC_POS)	/* Space Records Forward */
131 #define TS_CMD_SRR	TS_CMD(1,TS_CC_POS)	/* Space Records Reverse */
132 #define TS_CMD_STMF	TS_CMD(2,TS_CC_POS)	/* Skip Tape Marks Forward */
133 #define TS_CMD_STMR	TS_CMD(3,TS_CC_POS)	/* Skip Tape Marks Reverse */
134 #define TS_CMD_RWND	TS_CMD(4,TS_CC_POS)	/* Rewind */
135 
136 #define TS_CC_FRMT	0x09			/* FORMAT */
137 #define TS_CMD_WTM	TS_CMD(0,TS_CC_FRMT)	/* Write Tape Mark */
138 #define TS_CMD_ETM	TS_CMD(1,TS_CC_FRMT)	/* Erase */
139 #define TS_CMD_WTMR	TS_CMD(2,TS_CC_FRMT)	/* Write Tape Mark (Retry) */
140 
141 #define TS_CC_CTRL	0x0A			/* CONTROL */
142 #define TS_CMD_MBR	TS_CMD(0,TS_CC_CTRL)	/* Message Buffer Release */
143 #define TS_CMD_RWUL	TS_CMD(1,TS_CC_CTRL)	/* Rewind and Unload */
144 #define TS_CMD_NOP	TS_CMD(2,TS_CC_CTRL)	/* NO-OP (TS11: clean tape) */
145 #define TS_CMD_RWII	TS_CMD(4,TS_CC_CTRL)	/* Rewind with intermediate */
146 						/* interrupt (TS11: N.A.) */
147 #define TS_CC_INIT	0x0B			/* INITIALIZE */
148 #define TS_CMD_INIT	TS_CMD(0,TS_CC_INIT)	/* Controller/Drive Initial. */
149 
150 #define TS_CC_STAT	0x0F			/* GET STATUS */
151 #define TS_CMD_STAT	TS_CMD(0,TS_CC_STAT)	/* Get Status (END) */
152 
153 struct status {			/* message packet */
154 	unsigned short hdr;	/* ACK, class-code, format 1, message type */
155 	unsigned short dfl;	/* data field length (8 bit) */
156 	unsigned short rbpcr;	/* residual b/r/tm count word */
157 	unsigned short xst0;	/* Extended Status Registers 0-4 */
158 	unsigned short xst1;
159 	unsigned short xst2;
160 	unsigned short xst3;
161 	unsigned short xst4;	/* total size: 16 bytes */
162 };
163 
164 struct chr {
165 	unsigned short sadrl;	/* low-word of status addr */
166 	unsigned short sadrh;
167 	unsigned short onesix;	/* 016/020 */
168 	unsigned short chrw;	/* Characteristics word */
169 	unsigned short xchrw;	/* TS05 extra word */
170 };
171 /*
172  * Flags used in write-characteristics command
173  */
174 #define TS_WC_ESS	(1<<7)	/* Enable Skip Tape Marks Stop */
175 #define TS_WC_ENB	(1<<6)  /* Enable Tape Mark Stop at Bot */
176 #define TS_WC_EAI	(1<<5)	/* Enable Attention interrupts */
177 #define TS_WC_ERI	(1<<4)	/* Enable Message Buffer Release interrupts */
178 #define TS_WCX_HSP	(1<<5)	/* High Speed Select (25 in/s vs. 100 in/s) */
179 #define TS_WCX_RBUF	(1<<4)	/* Enable read buffering */
180 #define TS_WCX_WBUF	(1<<3)	/* Enable write buffering */
181 
182 /*
183  * Status flags
184  *
185  * Extended Status register 0 (XST0)  --  XST0 appears as the fourth word
186  * in the message buffer stored by the TSV05 subsystem upon completion of
187  * a command or an ATTN
188  */
189 #define TS_SF_TMK	(1<<15)	/* Tape Mark Detected */
190 #define TS_SF_RLS	(1<<14)	/* Record Length Short */
191 #define TS_SF_LET	(1<<13)	/* Logical End of Tape */
192 #define TS_SF_RLL	(1<<12)	/* Record Length Long */
193 #define TS_SF_WLE	(1<<11)	/* Write Lock Error */
194 #define TS_SF_NEF	(1<<10) /* Nonexecutable Function */
195 #define TS_SF_ILC	(1<< 9)	/* Illegal Command */
196 #define TS_SF_ILA	(1<< 8)	/* Illegal Address */
197 #define TS_SF_MOT	(1<< 7)	/* Motion */
198 #define TS_SF_ONL	(1<< 6)	/* On-Line */
199 #define TS_SF_IE	(1<< 5)	/* Interrupt Enable */
200 #define TS_SF_VCK	(1<< 4)	/* Volume Check */
201 #define TS_SF_PED	(1<< 3)	/* Phase Encoded Drive */
202 #define TS_SF_WLK	(1<< 2)	/* Write Locked */
203 #define TS_SF_BOT	(1<< 1)	/* Beginning of Tape */
204 #define TS_SF_EOT	(1<< 0)	/* End of Tape */
205 
206 #define TS_XST0_BITS	"\20\20TMK\17RLS\16LET\15RLL\14WLE\13NEF\12ILC\11ILA" \
207 			   "\10MOT\07ONL\06IE \05VCK\04PED\03WLK\02BOT\01EOT"
208 /*
209  * Extended Status register 1 (XST1)  --  XST1 appears as the fifth word
210  * in the message buffer stored by the TSV05 subsystem upon completion of
211  * a command or an ATTN
212  */
213 #define TS_SF_DLT	(1<<15)	/* Data Late */
214 #define TS_SF_COR	(1<<13)	/* Correctable Data */
215 #define TS_SF_CRS	(1<<12)	/* TS11: Crease Detected */
216 #define TS_SF_TIG	(1<<11)	/* TS11: Trash in Gap */
217 #define TS_SF_DBF	(1<<10)	/* TS11: Desckew Buffer Fail */
218 #define TS_SF_SCK	(1<< 9)	/* TS11: Speed Check */
219 #define TS_SF_RBP	(1<< 8)	/* Read Bus Parity Error */
220 #define TS_SF_IPR	(1<< 7)	/* TS11: Invalid Preamble */
221 #define TS_SF_IPO	(1<< 6)	/* TS11: Invalid Postamble */
222 #define TS_SF_SYN	(1<< 5)	/* TS11: Sync Failure */
223 #define TS_SF_IED	(1<< 4)	/* TS11: Invalid End Data */
224 #define TS_SF_POS	(1<< 3)	/* TS11: Postamble short */
225 #define TS_SF_POL	(1<< 2)	/* TS11: Postamble long */
226 #define TS_SF_UNC	(1<< 1)	/* Uncorrectable Data or Hard Error */
227 #define TS_SF_MTE	(1<< 0)	/* TS11: Multitrack Error */
228 
229 #define TS_XST1_BITS	"\20\20DLT\16COR\15CRS\14TIG\13DBF\12SCK\11RBP" \
230 			   "\10IPR\07IPO\06SYN\05IED\04POS\03POL\02UNC\01MTE"
231 
232 /*
233  * Extended Status register 2 (XST2)  --  sixth word
234  */
235 #define TS_SF_OPM	(1<<15)	/* Operation in Progress (tape moving) */
236 #define TS_SF_RCE	(1<<14)	/* RAM Checksum Error */
237 #define TS_SF_SBP	(1<<13)	/* TS11: Serial 08 bus parity */
238 #define TS_SF_CAF	(1<<12)	/* TS11: Capstan Acceleration fail */
239 #define	TS_SF_TU80	(1<<11)	/* Is a TU80 */
240 #define TS_SF_WCF	(1<<10)	/* Write Clock Failure */
241 #define TS_SF_PDT	(1<< 8)	/* TS11: Parity Dead Track */
242 #define TS_SF_RL	0x00FF	/* Revision Level */
243 #define TS_SF_EFES	(1<< 7)	/* extended features enable switch */
244 #define TS_SF_BES	(1<< 6)	/* Buffering enable switch */
245 #define TS_SF_MCRL	0x003F	/* micro-code revision level */
246 #define TS_SF_UNIT	0x0003	/* unit number of selected transport */
247 
248 #define TS_XST2_BITS	"\20\20OPM\17RCE\16SBP\15CAF\13WCF\11PDT\10EFES\7BES"
249 
250 /*
251  * Extended Status register 3 (XST3))  --  seventh word
252  */
253 #define TS_SF_MDE	0xFF00	/* Micro-Diagnostics Error Code */
254 #define TS_SF_LMX	(1<< 7)	/* TS11: Tension Arm Limit Exceeded */
255 #define TS_SF_OPI	(1<< 6)	/* Operation Incomplete */
256 #define TS_SF_REV	(1<< 5)	/* Revers */
257 #define TS_SF_CRF	(1<< 4)	/* TS11: Capstan Response Failure */
258 #define TS_SF_DCK	(1<< 3)	/* Density Check */
259 #define TS_SF_NBE	(1<< 2)	/* TS11: Noise Bit during Erase */
260 #define TS_SF_LSA	(1<< 1)	/* TS11: Limit Switch Activated */
261 #define TS_SF_RIB	(1<< 0)	/* Reverse into BOT */
262 
263 #define TS_XST3_BITS	"\20\10LMX\07OPI\06REV\05CRF\04DCK\03NBE\02LSA\01RIB"
264 
265 /*
266  * Extended Status register 4 (XST4))  --  eighth word
267  */
268 #define TS_SF_HSP	(1<<15)	/* High Speed */
269 #define TS_SF_RCX	(1<<14)	/* Retry Count Exceeded */
270 #define TS_SF_WRC	0x00FF	/* Write Retry Count Statistics */
271 
272 #define TS_XST4_BITS	"\20\20HSP\17RCX"
273 
274 
275