| /freebsd/usr.sbin/bhyve/amd64/ |
| H A D | pci_lpc.h | diff 55c13f6e Wed Oct 04 16:25:19 GMT 2023 Mark Johnston <markj@FreeBSD.org> bhyve: Move legacy PCI interrupt handling under amd64/
Specifically, move IO-APIC, LPC and PIRQ routing code under amd64/.
Use ifdefs to conditionally compile related code in other files. In
particular, legacy PCI interrupt handling is now compiled only on amd64.
This is not too invasive, but suggestions for a more modular approach
would be appreciated.
I am not sure why qemu fwcfg handling is tied to LPC, and I suspect it
should be decoupled. In this commit I just apply an ifdef hammer, but
we will eventually want fwcfg on arm64 as well.
No functional change intended.
Reviewed by: corvink, jhb
MFC after: 1 week
Sponsored by: Innovate UK
Differential Revision: https://reviews.freebsd.org/D40739
55c13f6e Wed Oct 04 16:25:19 GMT 2023 Mark Johnston <markj@FreeBSD.org> bhyve: Move legacy PCI interrupt handling under amd64/
Specifically, move IO-APIC, LPC and PIRQ routing code under amd64/.
Use ifdefs to conditionally compile related code in other files. In
particular, legacy PCI interrupt handling is now compiled only on amd64.
This is not too invasive, but suggestions for a more modular approach
would be appreciated.
I am not sure why qemu fwcfg handling is tied to LPC, and I suspect it
should be decoupled. In this commit I just apply an ifdef hammer, but
we will eventually want fwcfg on arm64 as well.
No functional change intended.
Reviewed by: corvink, jhb
MFC after: 1 week
Sponsored by: Innovate UK
Differential Revision: https://reviews.freebsd.org/D40739
|
| H A D | ioapic.h | diff 55c13f6e Wed Oct 04 16:25:19 GMT 2023 Mark Johnston <markj@FreeBSD.org> bhyve: Move legacy PCI interrupt handling under amd64/
Specifically, move IO-APIC, LPC and PIRQ routing code under amd64/.
Use ifdefs to conditionally compile related code in other files. In
particular, legacy PCI interrupt handling is now compiled only on amd64.
This is not too invasive, but suggestions for a more modular approach
would be appreciated.
I am not sure why qemu fwcfg handling is tied to LPC, and I suspect it
should be decoupled. In this commit I just apply an ifdef hammer, but
we will eventually want fwcfg on arm64 as well.
No functional change intended.
Reviewed by: corvink, jhb
MFC after: 1 week
Sponsored by: Innovate UK
Differential Revision: https://reviews.freebsd.org/D40739
55c13f6e Wed Oct 04 16:25:19 GMT 2023 Mark Johnston <markj@FreeBSD.org> bhyve: Move legacy PCI interrupt handling under amd64/
Specifically, move IO-APIC, LPC and PIRQ routing code under amd64/.
Use ifdefs to conditionally compile related code in other files. In
particular, legacy PCI interrupt handling is now compiled only on amd64.
This is not too invasive, but suggestions for a more modular approach
would be appreciated.
I am not sure why qemu fwcfg handling is tied to LPC, and I suspect it
should be decoupled. In this commit I just apply an ifdef hammer, but
we will eventually want fwcfg on arm64 as well.
No functional change intended.
Reviewed by: corvink, jhb
MFC after: 1 week
Sponsored by: Innovate UK
Differential Revision: https://reviews.freebsd.org/D40739
|
| H A D | ioapic.c | diff 55c13f6e Wed Oct 04 16:25:19 GMT 2023 Mark Johnston <markj@FreeBSD.org> bhyve: Move legacy PCI interrupt handling under amd64/
Specifically, move IO-APIC, LPC and PIRQ routing code under amd64/.
Use ifdefs to conditionally compile related code in other files. In
particular, legacy PCI interrupt handling is now compiled only on amd64.
This is not too invasive, but suggestions for a more modular approach
would be appreciated.
I am not sure why qemu fwcfg handling is tied to LPC, and I suspect it
should be decoupled. In this commit I just apply an ifdef hammer, but
we will eventually want fwcfg on arm64 as well.
No functional change intended.
Reviewed by: corvink, jhb
MFC after: 1 week
Sponsored by: Innovate UK
Differential Revision: https://reviews.freebsd.org/D40739
55c13f6e Wed Oct 04 16:25:19 GMT 2023 Mark Johnston <markj@FreeBSD.org> bhyve: Move legacy PCI interrupt handling under amd64/
Specifically, move IO-APIC, LPC and PIRQ routing code under amd64/.
Use ifdefs to conditionally compile related code in other files. In
particular, legacy PCI interrupt handling is now compiled only on amd64.
This is not too invasive, but suggestions for a more modular approach
would be appreciated.
I am not sure why qemu fwcfg handling is tied to LPC, and I suspect it
should be decoupled. In this commit I just apply an ifdef hammer, but
we will eventually want fwcfg on arm64 as well.
No functional change intended.
Reviewed by: corvink, jhb
MFC after: 1 week
Sponsored by: Innovate UK
Differential Revision: https://reviews.freebsd.org/D40739
|
| H A D | pci_irq.c | diff 55c13f6e Wed Oct 04 16:25:19 GMT 2023 Mark Johnston <markj@FreeBSD.org> bhyve: Move legacy PCI interrupt handling under amd64/
Specifically, move IO-APIC, LPC and PIRQ routing code under amd64/.
Use ifdefs to conditionally compile related code in other files. In
particular, legacy PCI interrupt handling is now compiled only on amd64.
This is not too invasive, but suggestions for a more modular approach
would be appreciated.
I am not sure why qemu fwcfg handling is tied to LPC, and I suspect it
should be decoupled. In this commit I just apply an ifdef hammer, but
we will eventually want fwcfg on arm64 as well.
No functional change intended.
Reviewed by: corvink, jhb
MFC after: 1 week
Sponsored by: Innovate UK
Differential Revision: https://reviews.freebsd.org/D40739
55c13f6e Wed Oct 04 16:25:19 GMT 2023 Mark Johnston <markj@FreeBSD.org> bhyve: Move legacy PCI interrupt handling under amd64/
Specifically, move IO-APIC, LPC and PIRQ routing code under amd64/.
Use ifdefs to conditionally compile related code in other files. In
particular, legacy PCI interrupt handling is now compiled only on amd64.
This is not too invasive, but suggestions for a more modular approach
would be appreciated.
I am not sure why qemu fwcfg handling is tied to LPC, and I suspect it
should be decoupled. In this commit I just apply an ifdef hammer, but
we will eventually want fwcfg on arm64 as well.
No functional change intended.
Reviewed by: corvink, jhb
MFC after: 1 week
Sponsored by: Innovate UK
Differential Revision: https://reviews.freebsd.org/D40739
|
| H A D | pci_lpc.c | diff 55c13f6e Wed Oct 04 16:25:19 GMT 2023 Mark Johnston <markj@FreeBSD.org> bhyve: Move legacy PCI interrupt handling under amd64/
Specifically, move IO-APIC, LPC and PIRQ routing code under amd64/.
Use ifdefs to conditionally compile related code in other files. In
particular, legacy PCI interrupt handling is now compiled only on amd64.
This is not too invasive, but suggestions for a more modular approach
would be appreciated.
I am not sure why qemu fwcfg handling is tied to LPC, and I suspect it
should be decoupled. In this commit I just apply an ifdef hammer, but
we will eventually want fwcfg on arm64 as well.
No functional change intended.
Reviewed by: corvink, jhb
MFC after: 1 week
Sponsored by: Innovate UK
Differential Revision: https://reviews.freebsd.org/D40739
55c13f6e Wed Oct 04 16:25:19 GMT 2023 Mark Johnston <markj@FreeBSD.org> bhyve: Move legacy PCI interrupt handling under amd64/
Specifically, move IO-APIC, LPC and PIRQ routing code under amd64/.
Use ifdefs to conditionally compile related code in other files. In
particular, legacy PCI interrupt handling is now compiled only on amd64.
This is not too invasive, but suggestions for a more modular approach
would be appreciated.
I am not sure why qemu fwcfg handling is tied to LPC, and I suspect it
should be decoupled. In this commit I just apply an ifdef hammer, but
we will eventually want fwcfg on arm64 as well.
No functional change intended.
Reviewed by: corvink, jhb
MFC after: 1 week
Sponsored by: Innovate UK
Differential Revision: https://reviews.freebsd.org/D40739
|
| H A D | Makefile.inc | diff 55c13f6e Wed Oct 04 16:25:19 GMT 2023 Mark Johnston <markj@FreeBSD.org> bhyve: Move legacy PCI interrupt handling under amd64/
Specifically, move IO-APIC, LPC and PIRQ routing code under amd64/.
Use ifdefs to conditionally compile related code in other files. In
particular, legacy PCI interrupt handling is now compiled only on amd64.
This is not too invasive, but suggestions for a more modular approach
would be appreciated.
I am not sure why qemu fwcfg handling is tied to LPC, and I suspect it
should be decoupled. In this commit I just apply an ifdef hammer, but
we will eventually want fwcfg on arm64 as well.
No functional change intended.
Reviewed by: corvink, jhb
MFC after: 1 week
Sponsored by: Innovate UK
Differential Revision: https://reviews.freebsd.org/D40739
diff 55c13f6e Wed Oct 04 16:25:19 GMT 2023 Mark Johnston <markj@FreeBSD.org> bhyve: Move legacy PCI interrupt handling under amd64/
Specifically, move IO-APIC, LPC and PIRQ routing code under amd64/.
Use ifdefs to conditionally compile related code in other files. In
particular, legacy PCI interrupt handling is now compiled only on amd64.
This is not too invasive, but suggestions for a more modular approach
would be appreciated.
I am not sure why qemu fwcfg handling is tied to LPC, and I suspect it
should be decoupled. In this commit I just apply an ifdef hammer, but
we will eventually want fwcfg on arm64 as well.
No functional change intended.
Reviewed by: corvink, jhb
MFC after: 1 week
Sponsored by: Innovate UK
Differential Revision: https://reviews.freebsd.org/D40739
|
| /freebsd/usr.sbin/bhyve/ |
| H A D | qemu_fwcfg.c | diff 55c13f6e Wed Oct 04 16:25:19 GMT 2023 Mark Johnston <markj@FreeBSD.org> bhyve: Move legacy PCI interrupt handling under amd64/
Specifically, move IO-APIC, LPC and PIRQ routing code under amd64/.
Use ifdefs to conditionally compile related code in other files. In
particular, legacy PCI interrupt handling is now compiled only on amd64.
This is not too invasive, but suggestions for a more modular approach
would be appreciated.
I am not sure why qemu fwcfg handling is tied to LPC, and I suspect it
should be decoupled. In this commit I just apply an ifdef hammer, but
we will eventually want fwcfg on arm64 as well.
No functional change intended.
Reviewed by: corvink, jhb
MFC after: 1 week
Sponsored by: Innovate UK
Differential Revision: https://reviews.freebsd.org/D40739
diff 55c13f6e Wed Oct 04 16:25:19 GMT 2023 Mark Johnston <markj@FreeBSD.org> bhyve: Move legacy PCI interrupt handling under amd64/
Specifically, move IO-APIC, LPC and PIRQ routing code under amd64/.
Use ifdefs to conditionally compile related code in other files. In
particular, legacy PCI interrupt handling is now compiled only on amd64.
This is not too invasive, but suggestions for a more modular approach
would be appreciated.
I am not sure why qemu fwcfg handling is tied to LPC, and I suspect it
should be decoupled. In this commit I just apply an ifdef hammer, but
we will eventually want fwcfg on arm64 as well.
No functional change intended.
Reviewed by: corvink, jhb
MFC after: 1 week
Sponsored by: Innovate UK
Differential Revision: https://reviews.freebsd.org/D40739
|
| H A D | bhyverun.c | diff 55c13f6e Wed Oct 04 16:25:19 GMT 2023 Mark Johnston <markj@FreeBSD.org> bhyve: Move legacy PCI interrupt handling under amd64/
Specifically, move IO-APIC, LPC and PIRQ routing code under amd64/.
Use ifdefs to conditionally compile related code in other files. In
particular, legacy PCI interrupt handling is now compiled only on amd64.
This is not too invasive, but suggestions for a more modular approach
would be appreciated.
I am not sure why qemu fwcfg handling is tied to LPC, and I suspect it
should be decoupled. In this commit I just apply an ifdef hammer, but
we will eventually want fwcfg on arm64 as well.
No functional change intended.
Reviewed by: corvink, jhb
MFC after: 1 week
Sponsored by: Innovate UK
Differential Revision: https://reviews.freebsd.org/D40739
|
| H A D | virtio.h | diff 55c13f6e Wed Oct 04 16:25:19 GMT 2023 Mark Johnston <markj@FreeBSD.org> bhyve: Move legacy PCI interrupt handling under amd64/
Specifically, move IO-APIC, LPC and PIRQ routing code under amd64/.
Use ifdefs to conditionally compile related code in other files. In
particular, legacy PCI interrupt handling is now compiled only on amd64.
This is not too invasive, but suggestions for a more modular approach
would be appreciated.
I am not sure why qemu fwcfg handling is tied to LPC, and I suspect it
should be decoupled. In this commit I just apply an ifdef hammer, but
we will eventually want fwcfg on arm64 as well.
No functional change intended.
Reviewed by: corvink, jhb
MFC after: 1 week
Sponsored by: Innovate UK
Differential Revision: https://reviews.freebsd.org/D40739
diff 55c13f6e Wed Oct 04 16:25:19 GMT 2023 Mark Johnston <markj@FreeBSD.org> bhyve: Move legacy PCI interrupt handling under amd64/
Specifically, move IO-APIC, LPC and PIRQ routing code under amd64/.
Use ifdefs to conditionally compile related code in other files. In
particular, legacy PCI interrupt handling is now compiled only on amd64.
This is not too invasive, but suggestions for a more modular approach
would be appreciated.
I am not sure why qemu fwcfg handling is tied to LPC, and I suspect it
should be decoupled. In this commit I just apply an ifdef hammer, but
we will eventually want fwcfg on arm64 as well.
No functional change intended.
Reviewed by: corvink, jhb
MFC after: 1 week
Sponsored by: Innovate UK
Differential Revision: https://reviews.freebsd.org/D40739
|
| H A D | Makefile | diff 55c13f6e Wed Oct 04 16:25:19 GMT 2023 Mark Johnston <markj@FreeBSD.org> bhyve: Move legacy PCI interrupt handling under amd64/
Specifically, move IO-APIC, LPC and PIRQ routing code under amd64/.
Use ifdefs to conditionally compile related code in other files. In
particular, legacy PCI interrupt handling is now compiled only on amd64.
This is not too invasive, but suggestions for a more modular approach
would be appreciated.
I am not sure why qemu fwcfg handling is tied to LPC, and I suspect it
should be decoupled. In this commit I just apply an ifdef hammer, but
we will eventually want fwcfg on arm64 as well.
No functional change intended.
Reviewed by: corvink, jhb
MFC after: 1 week
Sponsored by: Innovate UK
Differential Revision: https://reviews.freebsd.org/D40739
diff 55c13f6e Wed Oct 04 16:25:19 GMT 2023 Mark Johnston <markj@FreeBSD.org> bhyve: Move legacy PCI interrupt handling under amd64/
Specifically, move IO-APIC, LPC and PIRQ routing code under amd64/.
Use ifdefs to conditionally compile related code in other files. In
particular, legacy PCI interrupt handling is now compiled only on amd64.
This is not too invasive, but suggestions for a more modular approach
would be appreciated.
I am not sure why qemu fwcfg handling is tied to LPC, and I suspect it
should be decoupled. In this commit I just apply an ifdef hammer, but
we will eventually want fwcfg on arm64 as well.
No functional change intended.
Reviewed by: corvink, jhb
MFC after: 1 week
Sponsored by: Innovate UK
Differential Revision: https://reviews.freebsd.org/D40739
|
| H A D | pci_emul.h | diff 55c13f6e Wed Oct 04 16:25:19 GMT 2023 Mark Johnston <markj@FreeBSD.org> bhyve: Move legacy PCI interrupt handling under amd64/
Specifically, move IO-APIC, LPC and PIRQ routing code under amd64/.
Use ifdefs to conditionally compile related code in other files. In
particular, legacy PCI interrupt handling is now compiled only on amd64.
This is not too invasive, but suggestions for a more modular approach
would be appreciated.
I am not sure why qemu fwcfg handling is tied to LPC, and I suspect it
should be decoupled. In this commit I just apply an ifdef hammer, but
we will eventually want fwcfg on arm64 as well.
No functional change intended.
Reviewed by: corvink, jhb
MFC after: 1 week
Sponsored by: Innovate UK
Differential Revision: https://reviews.freebsd.org/D40739
diff 55c13f6e Wed Oct 04 16:25:19 GMT 2023 Mark Johnston <markj@FreeBSD.org> bhyve: Move legacy PCI interrupt handling under amd64/
Specifically, move IO-APIC, LPC and PIRQ routing code under amd64/.
Use ifdefs to conditionally compile related code in other files. In
particular, legacy PCI interrupt handling is now compiled only on amd64.
This is not too invasive, but suggestions for a more modular approach
would be appreciated.
I am not sure why qemu fwcfg handling is tied to LPC, and I suspect it
should be decoupled. In this commit I just apply an ifdef hammer, but
we will eventually want fwcfg on arm64 as well.
No functional change intended.
Reviewed by: corvink, jhb
MFC after: 1 week
Sponsored by: Innovate UK
Differential Revision: https://reviews.freebsd.org/D40739
|
| H A D | pci_emul.c | diff 55c13f6e Wed Oct 04 16:25:19 GMT 2023 Mark Johnston <markj@FreeBSD.org> bhyve: Move legacy PCI interrupt handling under amd64/
Specifically, move IO-APIC, LPC and PIRQ routing code under amd64/.
Use ifdefs to conditionally compile related code in other files. In
particular, legacy PCI interrupt handling is now compiled only on amd64.
This is not too invasive, but suggestions for a more modular approach
would be appreciated.
I am not sure why qemu fwcfg handling is tied to LPC, and I suspect it
should be decoupled. In this commit I just apply an ifdef hammer, but
we will eventually want fwcfg on arm64 as well.
No functional change intended.
Reviewed by: corvink, jhb
MFC after: 1 week
Sponsored by: Innovate UK
Differential Revision: https://reviews.freebsd.org/D40739
diff 55c13f6e Wed Oct 04 16:25:19 GMT 2023 Mark Johnston <markj@FreeBSD.org> bhyve: Move legacy PCI interrupt handling under amd64/
Specifically, move IO-APIC, LPC and PIRQ routing code under amd64/.
Use ifdefs to conditionally compile related code in other files. In
particular, legacy PCI interrupt handling is now compiled only on amd64.
This is not too invasive, but suggestions for a more modular approach
would be appreciated.
I am not sure why qemu fwcfg handling is tied to LPC, and I suspect it
should be decoupled. In this commit I just apply an ifdef hammer, but
we will eventually want fwcfg on arm64 as well.
No functional change intended.
Reviewed by: corvink, jhb
MFC after: 1 week
Sponsored by: Innovate UK
Differential Revision: https://reviews.freebsd.org/D40739
|