| /openbsd/sys/lib/libkern/arch/amd64/ |
| H A D | memcmp.S | diff fc541c5d Wed Dec 07 18:25:32 GMT 2022 guenther <guenther@openbsd.org> Apply changes from commitid FWrfGfO9Ojnsh1mq to libkern.
From original commit message: To mitigate against spectre attacks,
AMD processors without the IBRS feature need an lfence instruction
after every near ret. See software techniques for managing speculation
on AMD processors revision 9.17.20 mitigation G-5.
ok deraadt@
|
| H A D | bcmp.S | diff fc541c5d Wed Dec 07 18:25:32 GMT 2022 guenther <guenther@openbsd.org> Apply changes from commitid FWrfGfO9Ojnsh1mq to libkern.
From original commit message: To mitigate against spectre attacks,
AMD processors without the IBRS feature need an lfence instruction
after every near ret. See software techniques for managing speculation
on AMD processors revision 9.17.20 mitigation G-5.
ok deraadt@
|
| H A D | ffs.S | diff fc541c5d Wed Dec 07 18:25:32 GMT 2022 guenther <guenther@openbsd.org> Apply changes from commitid FWrfGfO9Ojnsh1mq to libkern.
From original commit message: To mitigate against spectre attacks,
AMD processors without the IBRS feature need an lfence instruction
after every near ret. See software techniques for managing speculation
on AMD processors revision 9.17.20 mitigation G-5.
ok deraadt@
|
| H A D | memchr.S | diff fc541c5d Wed Dec 07 18:25:32 GMT 2022 guenther <guenther@openbsd.org> Apply changes from commitid FWrfGfO9Ojnsh1mq to libkern.
From original commit message: To mitigate against spectre attacks,
AMD processors without the IBRS feature need an lfence instruction
after every near ret. See software techniques for managing speculation
on AMD processors revision 9.17.20 mitigation G-5.
ok deraadt@
|
| H A D | skpc.S | diff fc541c5d Wed Dec 07 18:25:32 GMT 2022 guenther <guenther@openbsd.org> Apply changes from commitid FWrfGfO9Ojnsh1mq to libkern.
From original commit message: To mitigate against spectre attacks,
AMD processors without the IBRS feature need an lfence instruction
after every near ret. See software techniques for managing speculation
on AMD processors revision 9.17.20 mitigation G-5.
ok deraadt@
|
| H A D | bzero.S | diff fc541c5d Wed Dec 07 18:25:32 GMT 2022 guenther <guenther@openbsd.org> Apply changes from commitid FWrfGfO9Ojnsh1mq to libkern.
From original commit message: To mitigate against spectre attacks,
AMD processors without the IBRS feature need an lfence instruction
after every near ret. See software techniques for managing speculation
on AMD processors revision 9.17.20 mitigation G-5.
ok deraadt@
|
| H A D | scanc.S | diff fc541c5d Wed Dec 07 18:25:32 GMT 2022 guenther <guenther@openbsd.org> Apply changes from commitid FWrfGfO9Ojnsh1mq to libkern.
From original commit message: To mitigate against spectre attacks,
AMD processors without the IBRS feature need an lfence instruction
after every near ret. See software techniques for managing speculation
on AMD processors revision 9.17.20 mitigation G-5.
ok deraadt@
|
| H A D | strcmp.S | diff fc541c5d Wed Dec 07 18:25:32 GMT 2022 guenther <guenther@openbsd.org> Apply changes from commitid FWrfGfO9Ojnsh1mq to libkern.
From original commit message: To mitigate against spectre attacks,
AMD processors without the IBRS feature need an lfence instruction
after every near ret. See software techniques for managing speculation
on AMD processors revision 9.17.20 mitigation G-5.
ok deraadt@
|
| H A D | strrchr.S | diff fc541c5d Wed Dec 07 18:25:32 GMT 2022 guenther <guenther@openbsd.org> Apply changes from commitid FWrfGfO9Ojnsh1mq to libkern.
From original commit message: To mitigate against spectre attacks,
AMD processors without the IBRS feature need an lfence instruction
after every near ret. See software techniques for managing speculation
on AMD processors revision 9.17.20 mitigation G-5.
ok deraadt@
|
| H A D | memset.S | diff fc541c5d Wed Dec 07 18:25:32 GMT 2022 guenther <guenther@openbsd.org> Apply changes from commitid FWrfGfO9Ojnsh1mq to libkern.
From original commit message: To mitigate against spectre attacks,
AMD processors without the IBRS feature need an lfence instruction
after every near ret. See software techniques for managing speculation
on AMD processors revision 9.17.20 mitigation G-5.
ok deraadt@
|
| H A D | strlen.S | diff fc541c5d Wed Dec 07 18:25:32 GMT 2022 guenther <guenther@openbsd.org> Apply changes from commitid FWrfGfO9Ojnsh1mq to libkern.
From original commit message: To mitigate against spectre attacks,
AMD processors without the IBRS feature need an lfence instruction
after every near ret. See software techniques for managing speculation
on AMD processors revision 9.17.20 mitigation G-5.
ok deraadt@
|
| H A D | strchr.S | diff fc541c5d Wed Dec 07 18:25:32 GMT 2022 guenther <guenther@openbsd.org> Apply changes from commitid FWrfGfO9Ojnsh1mq to libkern.
From original commit message: To mitigate against spectre attacks,
AMD processors without the IBRS feature need an lfence instruction
after every near ret. See software techniques for managing speculation
on AMD processors revision 9.17.20 mitigation G-5.
ok deraadt@
|
| H A D | memmove.S | diff fc541c5d Wed Dec 07 18:25:32 GMT 2022 guenther <guenther@openbsd.org> Apply changes from commitid FWrfGfO9Ojnsh1mq to libkern.
From original commit message: To mitigate against spectre attacks,
AMD processors without the IBRS feature need an lfence instruction
after every near ret. See software techniques for managing speculation
on AMD processors revision 9.17.20 mitigation G-5.
ok deraadt@
|