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Searched refs:CLOCK_OSC_FREQ_12_0 (Results 176 – 200 of 377) sorted by relevance

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/dports/sysutils/u-boot-rpi/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c768 case CLOCK_OSC_FREQ_12_0: /* OSC is 12Mhz */ in tegra30_set_up_pllp()
/dports/sysutils/u-boot-rpi-arm64/u-boot-2021.07/arch/arm/mach-tegra/tegra20/
H A Dclock.c590 case CLOCK_OSC_FREQ_12_0: /* OSC is 12Mhz */ in clock_early_init()
/dports/sysutils/u-boot-rpi-arm64/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c768 case CLOCK_OSC_FREQ_12_0: /* OSC is 12Mhz */ in tegra30_set_up_pllp()
/dports/sysutils/u-boot-rpi2/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c768 case CLOCK_OSC_FREQ_12_0: /* OSC is 12Mhz */ in tegra30_set_up_pllp()
/dports/sysutils/u-boot-rpi2/u-boot-2021.07/arch/arm/mach-tegra/tegra20/
H A Dclock.c590 case CLOCK_OSC_FREQ_12_0: /* OSC is 12Mhz */ in clock_early_init()
/dports/sysutils/u-boot-riotboard/u-boot-2021.07/arch/arm/mach-tegra/tegra20/
H A Dclock.c590 case CLOCK_OSC_FREQ_12_0: /* OSC is 12Mhz */ in clock_early_init()
/dports/sysutils/u-boot-riotboard/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c768 case CLOCK_OSC_FREQ_12_0: /* OSC is 12Mhz */ in tegra30_set_up_pllp()
/dports/sysutils/u-boot-rpi3/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c768 case CLOCK_OSC_FREQ_12_0: /* OSC is 12Mhz */ in tegra30_set_up_pllp()
/dports/sysutils/u-boot-rpi3/u-boot-2021.07/arch/arm/mach-tegra/tegra20/
H A Dclock.c590 case CLOCK_OSC_FREQ_12_0: /* OSC is 12Mhz */ in clock_early_init()
/dports/sysutils/u-boot-rock-pi-4/u-boot-2021.07/arch/arm/mach-tegra/tegra20/
H A Dclock.c590 case CLOCK_OSC_FREQ_12_0: /* OSC is 12Mhz */ in clock_early_init()
/dports/sysutils/u-boot-rock64/u-boot-2021.07/arch/arm/mach-tegra/tegra20/
H A Dclock.c590 case CLOCK_OSC_FREQ_12_0: /* OSC is 12Mhz */ in clock_early_init()
/dports/sysutils/u-boot-rpi3-32/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c768 case CLOCK_OSC_FREQ_12_0: /* OSC is 12Mhz */ in tegra30_set_up_pllp()
/dports/sysutils/u-boot-rpi3-32/u-boot-2021.07/arch/arm/mach-tegra/tegra20/
H A Dclock.c590 case CLOCK_OSC_FREQ_12_0: /* OSC is 12Mhz */ in clock_early_init()
/dports/sysutils/u-boot-rock64/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c768 case CLOCK_OSC_FREQ_12_0: /* OSC is 12Mhz */ in tegra30_set_up_pllp()
/dports/sysutils/u-boot-rock-pi-4/u-boot-2021.07/arch/arm/mach-tegra/
H A Dclock.c768 case CLOCK_OSC_FREQ_12_0: /* OSC is 12Mhz */ in tegra30_set_up_pllp()
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/mach-tegra/tegra114/
H A Dclock.c673 case CLOCK_OSC_FREQ_12_0: /* OSC is 12Mhz */ in clock_early_init()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/mach-tegra/tegra114/
H A Dclock.c673 case CLOCK_OSC_FREQ_12_0: /* OSC is 12Mhz */ in clock_early_init()
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/mach-tegra/tegra114/
H A Dclock.c676 case CLOCK_OSC_FREQ_12_0: /* OSC is 12Mhz */ in clock_early_init()
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/mach-tegra/tegra114/
H A Dclock.c676 case CLOCK_OSC_FREQ_12_0: /* OSC is 12Mhz */ in clock_early_init()
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/mach-tegra/tegra114/
H A Dclock.c676 case CLOCK_OSC_FREQ_12_0: /* OSC is 12Mhz */ in clock_early_init()
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/mach-tegra/tegra114/
H A Dclock.c676 case CLOCK_OSC_FREQ_12_0: /* OSC is 12Mhz */ in clock_early_init()
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/arm/mach-tegra/tegra114/
H A Dclock.c676 case CLOCK_OSC_FREQ_12_0: /* OSC is 12Mhz */ in clock_early_init()
/dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/mach-tegra/tegra114/
H A Dclock.c676 case CLOCK_OSC_FREQ_12_0: /* OSC is 12Mhz */ in clock_early_init()
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/arm/mach-tegra/tegra114/
H A Dclock.c676 case CLOCK_OSC_FREQ_12_0: /* OSC is 12Mhz */ in clock_early_init()
/dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/mach-tegra/tegra114/
H A Dclock.c676 case CLOCK_OSC_FREQ_12_0: /* OSC is 12Mhz */ in clock_early_init()

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