/dports/sysutils/u-boot-bananapi/u-boot-2021.07/drivers/video/ |
H A D | ati_radeon_fb.c | 59 #define CRTC_VSYNC_STRT_WID_VAL(vsync_srtr, vsync_wid) \ macro 395 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(1025,3); in radeon_setmode_9200() 428 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(769,3); in radeon_setmode_9200() 434 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(771,6) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 459 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,3); in radeon_setmode_9200() 464 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,4); in radeon_setmode_9200() 490 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(481,3) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 496 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(491,2) | CRTC_V_SYNC_POL; in radeon_setmode_9200()
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/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/drivers/video/ |
H A D | ati_radeon_fb.c | 59 #define CRTC_VSYNC_STRT_WID_VAL(vsync_srtr, vsync_wid) \ macro 395 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(1025,3); in radeon_setmode_9200() 428 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(769,3); in radeon_setmode_9200() 434 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(771,6) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 459 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,3); in radeon_setmode_9200() 464 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,4); in radeon_setmode_9200() 490 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(481,3) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 496 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(491,2) | CRTC_V_SYNC_POL; in radeon_setmode_9200()
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/dports/sysutils/u-boot-rpi4/u-boot-2021.07/drivers/video/ |
H A D | ati_radeon_fb.c | 59 #define CRTC_VSYNC_STRT_WID_VAL(vsync_srtr, vsync_wid) \ macro 395 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(1025,3); in radeon_setmode_9200() 428 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(769,3); in radeon_setmode_9200() 434 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(771,6) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 459 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,3); in radeon_setmode_9200() 464 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,4); in radeon_setmode_9200() 490 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(481,3) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 496 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(491,2) | CRTC_V_SYNC_POL; in radeon_setmode_9200()
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/dports/sysutils/u-boot-wandboard/u-boot-2021.07/drivers/video/ |
H A D | ati_radeon_fb.c | 59 #define CRTC_VSYNC_STRT_WID_VAL(vsync_srtr, vsync_wid) \ macro 395 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(1025,3); in radeon_setmode_9200() 428 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(769,3); in radeon_setmode_9200() 434 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(771,6) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 459 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,3); in radeon_setmode_9200() 464 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,4); in radeon_setmode_9200() 490 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(481,3) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 496 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(491,2) | CRTC_V_SYNC_POL; in radeon_setmode_9200()
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/dports/sysutils/u-boot-beaglebone/u-boot-2021.07/drivers/video/ |
H A D | ati_radeon_fb.c | 59 #define CRTC_VSYNC_STRT_WID_VAL(vsync_srtr, vsync_wid) \ macro 395 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(1025,3); in radeon_setmode_9200() 428 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(769,3); in radeon_setmode_9200() 434 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(771,6) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 459 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,3); in radeon_setmode_9200() 464 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,4); in radeon_setmode_9200() 490 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(481,3) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 496 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(491,2) | CRTC_V_SYNC_POL; in radeon_setmode_9200()
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/dports/sysutils/u-boot-rpi3-32/u-boot-2021.07/drivers/video/ |
H A D | ati_radeon_fb.c | 59 #define CRTC_VSYNC_STRT_WID_VAL(vsync_srtr, vsync_wid) \ macro 395 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(1025,3); in radeon_setmode_9200() 428 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(769,3); in radeon_setmode_9200() 434 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(771,6) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 459 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,3); in radeon_setmode_9200() 464 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,4); in radeon_setmode_9200() 490 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(481,3) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 496 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(491,2) | CRTC_V_SYNC_POL; in radeon_setmode_9200()
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/dports/sysutils/u-boot-rockpro64/u-boot-2021.07/drivers/video/ |
H A D | ati_radeon_fb.c | 59 #define CRTC_VSYNC_STRT_WID_VAL(vsync_srtr, vsync_wid) \ macro 395 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(1025,3); in radeon_setmode_9200() 428 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(769,3); in radeon_setmode_9200() 434 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(771,6) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 459 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,3); in radeon_setmode_9200() 464 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,4); in radeon_setmode_9200() 490 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(481,3) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 496 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(491,2) | CRTC_V_SYNC_POL; in radeon_setmode_9200()
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/dports/sysutils/u-boot-sifive-fu540/u-boot-2021.07/drivers/video/ |
H A D | ati_radeon_fb.c | 59 #define CRTC_VSYNC_STRT_WID_VAL(vsync_srtr, vsync_wid) \ macro 395 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(1025,3); in radeon_setmode_9200() 428 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(769,3); in radeon_setmode_9200() 434 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(771,6) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 459 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,3); in radeon_setmode_9200() 464 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,4); in radeon_setmode_9200() 490 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(481,3) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 496 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(491,2) | CRTC_V_SYNC_POL; in radeon_setmode_9200()
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/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/drivers/video/ |
H A D | ati_radeon_fb.c | 57 #define CRTC_VSYNC_STRT_WID_VAL(vsync_srtr, vsync_wid) \ macro 393 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(1025,3); in radeon_setmode_9200() 426 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(769,3); in radeon_setmode_9200() 432 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(771,6) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 457 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,3); in radeon_setmode_9200() 462 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,4); in radeon_setmode_9200() 488 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(481,3) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 494 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(491,2) | CRTC_V_SYNC_POL; in radeon_setmode_9200()
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/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/drivers/video/ |
H A D | ati_radeon_fb.c | 79 #define CRTC_VSYNC_STRT_WID_VAL(vsync_srtr, vsync_wid) \ macro 415 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(1025,3); in radeon_setmode_9200() 448 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(769,3); in radeon_setmode_9200() 454 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(771,6) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 479 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,3); in radeon_setmode_9200() 484 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,4); in radeon_setmode_9200() 510 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(481,3) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 516 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(491,2) | CRTC_V_SYNC_POL; in radeon_setmode_9200()
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/dports/sysutils/u-boot-pine64-lts/u-boot-2021.07/drivers/video/ |
H A D | ati_radeon_fb.c | 59 #define CRTC_VSYNC_STRT_WID_VAL(vsync_srtr, vsync_wid) \ macro 395 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(1025,3); in radeon_setmode_9200() 428 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(769,3); in radeon_setmode_9200() 434 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(771,6) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 459 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,3); in radeon_setmode_9200() 464 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,4); in radeon_setmode_9200() 490 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(481,3) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 496 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(491,2) | CRTC_V_SYNC_POL; in radeon_setmode_9200()
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/dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/drivers/video/ |
H A D | ati_radeon_fb.c | 59 #define CRTC_VSYNC_STRT_WID_VAL(vsync_srtr, vsync_wid) \ macro 395 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(1025,3); in radeon_setmode_9200() 428 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(769,3); in radeon_setmode_9200() 434 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(771,6) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 459 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,3); in radeon_setmode_9200() 464 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,4); in radeon_setmode_9200() 490 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(481,3) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 496 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(491,2) | CRTC_V_SYNC_POL; in radeon_setmode_9200()
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/dports/sysutils/u-boot-qemu-arm/u-boot-2021.07/drivers/video/ |
H A D | ati_radeon_fb.c | 59 #define CRTC_VSYNC_STRT_WID_VAL(vsync_srtr, vsync_wid) \ macro 395 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(1025,3); in radeon_setmode_9200() 428 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(769,3); in radeon_setmode_9200() 434 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(771,6) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 459 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,3); in radeon_setmode_9200() 464 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,4); in radeon_setmode_9200() 490 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(481,3) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 496 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(491,2) | CRTC_V_SYNC_POL; in radeon_setmode_9200()
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/dports/sysutils/u-boot-qemu-riscv64/u-boot-2021.07/drivers/video/ |
H A D | ati_radeon_fb.c | 59 #define CRTC_VSYNC_STRT_WID_VAL(vsync_srtr, vsync_wid) \ macro 395 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(1025,3); in radeon_setmode_9200() 428 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(769,3); in radeon_setmode_9200() 434 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(771,6) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 459 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,3); in radeon_setmode_9200() 464 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,4); in radeon_setmode_9200() 490 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(481,3) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 496 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(491,2) | CRTC_V_SYNC_POL; in radeon_setmode_9200()
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/dports/sysutils/u-boot-riotboard/u-boot-2021.07/drivers/video/ |
H A D | ati_radeon_fb.c | 59 #define CRTC_VSYNC_STRT_WID_VAL(vsync_srtr, vsync_wid) \ macro 395 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(1025,3); in radeon_setmode_9200() 428 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(769,3); in radeon_setmode_9200() 434 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(771,6) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 459 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,3); in radeon_setmode_9200() 464 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,4); in radeon_setmode_9200() 490 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(481,3) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 496 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(491,2) | CRTC_V_SYNC_POL; in radeon_setmode_9200()
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/dports/sysutils/u-boot-rpi-arm64/u-boot-2021.07/drivers/video/ |
H A D | ati_radeon_fb.c | 59 #define CRTC_VSYNC_STRT_WID_VAL(vsync_srtr, vsync_wid) \ macro 395 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(1025,3); in radeon_setmode_9200() 428 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(769,3); in radeon_setmode_9200() 434 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(771,6) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 459 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,3); in radeon_setmode_9200() 464 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,4); in radeon_setmode_9200() 490 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(481,3) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 496 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(491,2) | CRTC_V_SYNC_POL; in radeon_setmode_9200()
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/dports/sysutils/u-boot-rock-pi-4/u-boot-2021.07/drivers/video/ |
H A D | ati_radeon_fb.c | 59 #define CRTC_VSYNC_STRT_WID_VAL(vsync_srtr, vsync_wid) \ macro 395 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(1025,3); in radeon_setmode_9200() 428 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(769,3); in radeon_setmode_9200() 434 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(771,6) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 459 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,3); in radeon_setmode_9200() 464 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,4); in radeon_setmode_9200() 490 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(481,3) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 496 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(491,2) | CRTC_V_SYNC_POL; in radeon_setmode_9200()
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/dports/sysutils/u-boot-rpi2/u-boot-2021.07/drivers/video/ |
H A D | ati_radeon_fb.c | 59 #define CRTC_VSYNC_STRT_WID_VAL(vsync_srtr, vsync_wid) \ macro 395 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(1025,3); in radeon_setmode_9200() 428 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(769,3); in radeon_setmode_9200() 434 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(771,6) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 459 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,3); in radeon_setmode_9200() 464 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,4); in radeon_setmode_9200() 490 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(481,3) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 496 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(491,2) | CRTC_V_SYNC_POL; in radeon_setmode_9200()
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/dports/sysutils/u-boot-rpi3/u-boot-2021.07/drivers/video/ |
H A D | ati_radeon_fb.c | 59 #define CRTC_VSYNC_STRT_WID_VAL(vsync_srtr, vsync_wid) \ macro 395 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(1025,3); in radeon_setmode_9200() 428 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(769,3); in radeon_setmode_9200() 434 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(771,6) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 459 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,3); in radeon_setmode_9200() 464 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,4); in radeon_setmode_9200() 490 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(481,3) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 496 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(491,2) | CRTC_V_SYNC_POL; in radeon_setmode_9200()
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/dports/sysutils/u-boot-rock64/u-boot-2021.07/drivers/video/ |
H A D | ati_radeon_fb.c | 59 #define CRTC_VSYNC_STRT_WID_VAL(vsync_srtr, vsync_wid) \ macro 395 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(1025,3); in radeon_setmode_9200() 428 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(769,3); in radeon_setmode_9200() 434 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(771,6) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 459 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,3); in radeon_setmode_9200() 464 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(601,4); in radeon_setmode_9200() 490 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(481,3) | CRTC_V_SYNC_POL; in radeon_setmode_9200() 496 mode->crtc_v_sync_strt_wid = CRTC_VSYNC_STRT_WID_VAL(491,2) | CRTC_V_SYNC_POL; in radeon_setmode_9200()
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