Home
last modified time | relevance | path

Searched refs:F32 (Results 126 – 150 of 6779) sorted by relevance

12345678910>>...272

/dports/devel/riscv32-unknown-elf-gcc/gcc-8.4.0/gcc/testsuite/gcc.target/aarch64/
H A Dvect-fmax-fmin.c38 TEST##N (fname, F32); \
41 typedef float F32; typedef
44 DEFN_SETV (F32)
47 DEFN_CHECKV (F32) in DEFN_SETV()
53 F32 aF32[16]; in DEFN_SETV()
54 F32 bF32[16]; in DEFN_SETV()
55 F32 cF32[16]; in DEFN_SETV()
63 F32 max_F32_vector[] = { 15.0, 14.0, 13.0, 12.0, 11.0, 10.0, 9.0, 8.0, in DEFN_SETV()
69 F32 min_F32_vector[] = { 0.0, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, in DEFN_SETV()
75 F32 minv_F32_value = 0.0f; in DEFN_SETV()
[all …]
/dports/lang/gcc11-devel/gcc-11-20211009/gcc/testsuite/gcc.target/aarch64/
H A Dvect-fmax-fmin.c38 TEST##N (fname, F32); \
41 typedef float F32; typedef
44 DEFN_SETV (F32)
47 DEFN_CHECKV (F32) in DEFN_SETV()
53 F32 aF32[16]; in DEFN_SETV()
54 F32 bF32[16]; in DEFN_SETV()
55 F32 cF32[16]; in DEFN_SETV()
63 F32 max_F32_vector[] = { 15.0, 14.0, 13.0, 12.0, 11.0, 10.0, 9.0, 8.0, in DEFN_SETV()
69 F32 min_F32_vector[] = { 0.0, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, in DEFN_SETV()
75 F32 minv_F32_value = 0.0f; in DEFN_SETV()
[all …]
/dports/devel/avr-gcc/gcc-10.2.0/gcc/testsuite/gcc.target/aarch64/
H A Dvect-fmax-fmin.c38 TEST##N (fname, F32); \
41 typedef float F32; typedef
44 DEFN_SETV (F32)
47 DEFN_CHECKV (F32) in DEFN_SETV()
53 F32 aF32[16]; in DEFN_SETV()
54 F32 bF32[16]; in DEFN_SETV()
55 F32 cF32[16]; in DEFN_SETV()
63 F32 max_F32_vector[] = { 15.0, 14.0, 13.0, 12.0, 11.0, 10.0, 9.0, 8.0, in DEFN_SETV()
69 F32 min_F32_vector[] = { 0.0, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, in DEFN_SETV()
75 F32 minv_F32_value = 0.0f; in DEFN_SETV()
[all …]
/dports/lang/gnat_util/gcc-6-20180516/gcc/testsuite/gcc.target/aarch64/
H A Dvect-fmax-fmin.c38 TEST##N (fname, F32); \
41 typedef float F32; typedef
44 DEFN_SETV (F32)
47 DEFN_CHECKV (F32) in DEFN_SETV()
53 F32 aF32[16]; in DEFN_SETV()
54 F32 bF32[16]; in DEFN_SETV()
55 F32 cF32[16]; in DEFN_SETV()
63 F32 max_F32_vector[] = { 15.0, 14.0, 13.0, 12.0, 11.0, 10.0, 9.0, 8.0, in DEFN_SETV()
69 F32 min_F32_vector[] = { 0.0, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, in DEFN_SETV()
75 F32 minv_F32_value = 0.0f; in DEFN_SETV()
[all …]
/dports/devel/riscv64-gcc/gcc-8.3.0/gcc/testsuite/gcc.target/aarch64/
H A Dvect-fmax-fmin.c38 TEST##N (fname, F32); \
41 typedef float F32; typedef
44 DEFN_SETV (F32)
47 DEFN_CHECKV (F32) in DEFN_SETV()
53 F32 aF32[16]; in DEFN_SETV()
54 F32 bF32[16]; in DEFN_SETV()
55 F32 cF32[16]; in DEFN_SETV()
63 F32 max_F32_vector[] = { 15.0, 14.0, 13.0, 12.0, 11.0, 10.0, 9.0, 8.0, in DEFN_SETV()
69 F32 min_F32_vector[] = { 0.0, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, in DEFN_SETV()
75 F32 minv_F32_value = 0.0f; in DEFN_SETV()
[all …]
/dports/lang/gcc11/gcc-11.2.0/gcc/testsuite/gcc.target/aarch64/
H A Dvect-fmax-fmin.c38 TEST##N (fname, F32); \
41 typedef float F32; typedef
44 DEFN_SETV (F32)
47 DEFN_CHECKV (F32) in DEFN_SETV()
53 F32 aF32[16]; in DEFN_SETV()
54 F32 bF32[16]; in DEFN_SETV()
55 F32 cF32[16]; in DEFN_SETV()
63 F32 max_F32_vector[] = { 15.0, 14.0, 13.0, 12.0, 11.0, 10.0, 9.0, 8.0, in DEFN_SETV()
69 F32 min_F32_vector[] = { 0.0, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, in DEFN_SETV()
75 F32 minv_F32_value = 0.0f; in DEFN_SETV()
[all …]
/dports/lang/gcc9/gcc-9.4.0/gcc/testsuite/gcc.target/aarch64/
H A Dvect-fmax-fmin.c38 TEST##N (fname, F32); \
41 typedef float F32; typedef
44 DEFN_SETV (F32)
47 DEFN_CHECKV (F32) in DEFN_SETV()
53 F32 aF32[16]; in DEFN_SETV()
54 F32 bF32[16]; in DEFN_SETV()
55 F32 cF32[16]; in DEFN_SETV()
63 F32 max_F32_vector[] = { 15.0, 14.0, 13.0, 12.0, 11.0, 10.0, 9.0, 8.0, in DEFN_SETV()
69 F32 min_F32_vector[] = { 0.0, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, in DEFN_SETV()
75 F32 minv_F32_value = 0.0f; in DEFN_SETV()
[all …]
/dports/misc/cxx_atomics_pic/gcc-11.2.0/gcc/testsuite/gcc.target/aarch64/
H A Dvect-fmax-fmin.c38 TEST##N (fname, F32); \
41 typedef float F32; typedef
44 DEFN_SETV (F32)
47 DEFN_CHECKV (F32) in DEFN_SETV()
53 F32 aF32[16]; in DEFN_SETV()
54 F32 bF32[16]; in DEFN_SETV()
55 F32 cF32[16]; in DEFN_SETV()
63 F32 max_F32_vector[] = { 15.0, 14.0, 13.0, 12.0, 11.0, 10.0, 9.0, 8.0, in DEFN_SETV()
69 F32 min_F32_vector[] = { 0.0, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, in DEFN_SETV()
75 F32 minv_F32_value = 0.0f; in DEFN_SETV()
[all …]
/dports/lang/gcc10-devel/gcc-10-20211008/gcc/testsuite/gcc.target/aarch64/
H A Dvect-fmax-fmin.c38 TEST##N (fname, F32); \
41 typedef float F32; typedef
44 DEFN_SETV (F32)
47 DEFN_CHECKV (F32) in DEFN_SETV()
53 F32 aF32[16]; in DEFN_SETV()
54 F32 bF32[16]; in DEFN_SETV()
55 F32 cF32[16]; in DEFN_SETV()
63 F32 max_F32_vector[] = { 15.0, 14.0, 13.0, 12.0, 11.0, 10.0, 9.0, 8.0, in DEFN_SETV()
69 F32 min_F32_vector[] = { 0.0, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, in DEFN_SETV()
75 F32 minv_F32_value = 0.0f; in DEFN_SETV()
[all …]
/dports/lang/gcc9-aux/gcc-9.1.0/gcc/testsuite/gcc.target/aarch64/
H A Dvect-fmax-fmin.c38 TEST##N (fname, F32); \
41 typedef float F32; typedef
44 DEFN_SETV (F32)
47 DEFN_CHECKV (F32) in DEFN_SETV()
53 F32 aF32[16]; in DEFN_SETV()
54 F32 bF32[16]; in DEFN_SETV()
55 F32 cF32[16]; in DEFN_SETV()
63 F32 max_F32_vector[] = { 15.0, 14.0, 13.0, 12.0, 11.0, 10.0, 9.0, 8.0, in DEFN_SETV()
69 F32 min_F32_vector[] = { 0.0, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, in DEFN_SETV()
75 F32 minv_F32_value = 0.0f; in DEFN_SETV()
[all …]
/dports/devel/mingw32-gcc/gcc-4.8.1/gcc/testsuite/gcc.target/aarch64/
H A Dvect-fmax-fmin.c38 TEST##N (fname, F32); \
41 typedef float F32; typedef
44 DEFN_SETV (F32)
47 DEFN_CHECKV (F32) in DEFN_SETV()
53 F32 aF32[16]; in DEFN_SETV()
54 F32 bF32[16]; in DEFN_SETV()
55 F32 cF32[16]; in DEFN_SETV()
63 F32 max_F32_vector[] = { 15.0, 14.0, 13.0, 12.0, 11.0, 10.0, 9.0, 8.0, in DEFN_SETV()
69 F32 min_F32_vector[] = { 0.0, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, in DEFN_SETV()
75 F32 minv_F32_value = 0.0f; in DEFN_SETV()
[all …]
/dports/lang/gcc12-devel/gcc-12-20211205/gcc/testsuite/gcc.target/aarch64/
H A Dvect-fmax-fmin.c38 TEST##N (fname, F32); \
41 typedef float F32; typedef
44 DEFN_SETV (F32)
47 DEFN_CHECKV (F32) in DEFN_SETV()
53 F32 aF32[16]; in DEFN_SETV()
54 F32 bF32[16]; in DEFN_SETV()
55 F32 cF32[16]; in DEFN_SETV()
63 F32 max_F32_vector[] = { 15.0, 14.0, 13.0, 12.0, 11.0, 10.0, 9.0, 8.0, in DEFN_SETV()
69 F32 min_F32_vector[] = { 0.0, 1.0, 2.0, 3.0, 4.0, 5.0, 6.0, 7.0, in DEFN_SETV()
75 F32 minv_F32_value = 0.0f; in DEFN_SETV()
[all …]
/dports/math/stanmath/math-4.2.0/test/unit/math/prim/fun/
H A DF32_test.cpp6 EXPECT_NEAR(2.5, stan::math::F32(1.0, 1.0, 1.0, 1.0, 1.0, 0.6, 1e-10), 1e-8); in TEST()
11 stan::math::F32(1.0, 31.0, -27.0, 19.0, -41.0, .99999, 1e-10), in TEST()
17 stan::math::F32(1.0, 12.0, -1.0, 10.0, 1.0, .9), 1e-8); in TEST()
21 EXPECT_THROW(stan::math::F32(1.0, 12.0, -1.0, 10.0, -1.0, 1.0), in TEST()
27 stan::math::F32(1.0, -.5, 2.0, 10.0, 1.0, 0.3, 1e-10), 1e-8); in TEST()
32 EXPECT_THROW(stan::math::F32(1.0, 12.0, 1.0, 10.0, 1.0, 1.1), in TEST()
38 stan::math::F32(1.0, -.5, -2.5, 10.0, 1.0, 0.3, 1e-10), 1e-8); in TEST()
40 stan::math::F32(1.0, -.5, -4.5, 10.0, 1.0, 0.3, 1e-10), 1e-8); in TEST()
/dports/misc/lastools/LAStools-8ff2694/LASlib/inc/
H A Dlasreader.hpp79 virtual BOOL inside_tile(const F32 ll_x, const F32 ll_y, const F32 size);
132 F32 t_ll_x, t_ll_y, t_size, t_ur_x, t_ur_y;
176 void set_buffer_size(const F32 buffer_size);
177 F32 get_buffer_size() const;
206 void set_inside_tile(const F32 ll_x, const F32 ll_y, const F32 size);
240 F32 buffer_size;
255 F32 translate_intensity;
256 F32 scale_intensity;
257 F32 translate_scan_angle;
258 F32 scale_scan_angle;
[all …]
/dports/www/firefox-esr/firefox-91.8.0/gfx/skia/skia/src/core/
H A DSkVM.h343 F32 add(F32 x, F32 y);
344 F32 sub(F32 x, F32 y);
345 F32 mul(F32 x, F32 y);
346 F32 div(F32 x, F32 y);
347 F32 mad(F32 x, F32 y, F32 z); // x*y+z, often an FMA
349 I32 eq (F32 x, F32 y);
350 I32 neq(F32 x, F32 y);
351 I32 lt (F32 x, F32 y);
352 I32 lte(F32 x, F32 y);
353 I32 gt (F32 x, F32 y);
[all …]
/dports/www/firefox/firefox-99.0/gfx/skia/skia/src/core/
H A DSkVM.h343 F32 add(F32 x, F32 y);
344 F32 sub(F32 x, F32 y);
345 F32 mul(F32 x, F32 y);
346 F32 div(F32 x, F32 y);
347 F32 mad(F32 x, F32 y, F32 z); // x*y+z, often an FMA
349 I32 eq (F32 x, F32 y);
350 I32 neq(F32 x, F32 y);
351 I32 lt (F32 x, F32 y);
352 I32 lte(F32 x, F32 y);
353 I32 gt (F32 x, F32 y);
[all …]
/dports/mail/thunderbird/thunderbird-91.8.0/gfx/skia/skia/src/core/
H A DSkVM.h343 F32 add(F32 x, F32 y);
344 F32 sub(F32 x, F32 y);
345 F32 mul(F32 x, F32 y);
346 F32 div(F32 x, F32 y);
347 F32 mad(F32 x, F32 y, F32 z); // x*y+z, often an FMA
349 I32 eq (F32 x, F32 y);
350 I32 neq(F32 x, F32 y);
351 I32 lt (F32 x, F32 y);
352 I32 lte(F32 x, F32 y);
353 I32 gt (F32 x, F32 y);
[all …]
/dports/lang/spidermonkey78/firefox-78.9.0/gfx/skia/skia/src/core/
H A DSkVM.h343 F32 add(F32 x, F32 y);
344 F32 sub(F32 x, F32 y);
345 F32 mul(F32 x, F32 y);
346 F32 div(F32 x, F32 y);
347 F32 mad(F32 x, F32 y, F32 z); // x*y+z, often an FMA
349 I32 eq (F32 x, F32 y);
350 I32 neq(F32 x, F32 y);
351 I32 lt (F32 x, F32 y);
352 I32 lte(F32 x, F32 y);
353 I32 gt (F32 x, F32 y);
[all …]
/dports/sysutils/vector/vector-0.10.0/cargo-crates/wabt-0.9.2/src/script/
H A Dmod.rs179 F32(F32), enumerator
186 impl<F32: FromBits<u32>, F64: FromBits<u64>> Value<F32, F64> {
188 Value::F32(F32::from_bits(val)) in decode_f32()
207 args: Vec<Value<F32, F64>>,
221 ) -> Result<Value<F32, F64>, Error> { in parse_value() argument
335 action: Action<F32, F64>,
342 action: Action<F32, F64>,
347 action: Action<F32, F64>,
352 action: Action<F32, F64>,
380 action: Action<F32, F64>,
[all …]
/dports/devel/llvm70/llvm-7.0.1.src/lib/Target/WebAssembly/
H A DWebAssemblyInstrConv.td66 [(set I32:$dst, (fp_to_sint F32:$src))],
71 [(set I32:$dst, (fp_to_uint F32:$src))],
76 [(set I64:$dst, (fp_to_sint F32:$src))],
81 [(set I64:$dst, (fp_to_uint F32:$src))],
164 [(set F32:$dst, (sint_to_fp I32:$src))],
168 [(set F32:$dst, (uint_to_fp I32:$src))],
180 [(set F32:$dst, (sint_to_fp I64:$src))],
184 [(set F32:$dst, (uint_to_fp I64:$src))],
197 [(set F64:$dst, (fpextend F32:$src))],
201 [(set F32:$dst, (fpround F64:$src))],
[all …]
/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/CodeGen/ARM/
H A Dinlineasm-error-t-toofewregs.ll6 …F32 $0, $9, $10\0A\09vadd.F32 $1, $9, $10\0A\09vadd.F32 $2, $9, $10\0A\09vadd.F32 $3, $9, $10\0A\0…
/dports/devel/llvm-cheri/llvm-project-37c49ff00e3eadce5d8703fdc4497f28458c64a8/llvm/test/CodeGen/ARM/
H A Dinlineasm-error-t-toofewregs.ll6 …F32 $0, $9, $10\0A\09vadd.F32 $1, $9, $10\0A\09vadd.F32 $2, $9, $10\0A\09vadd.F32 $3, $9, $10\0A\0…
/dports/devel/llvm11/llvm-11.0.1.src/test/CodeGen/ARM/
H A Dinlineasm-error-t-toofewregs.ll6 …F32 $0, $9, $10\0A\09vadd.F32 $1, $9, $10\0A\09vadd.F32 $2, $9, $10\0A\09vadd.F32 $3, $9, $10\0A\0…
/dports/devel/llvm10/llvm-10.0.1.src/test/CodeGen/ARM/
H A Dinlineasm-error-t-toofewregs.ll6 …F32 $0, $9, $10\0A\09vadd.F32 $1, $9, $10\0A\09vadd.F32 $2, $9, $10\0A\09vadd.F32 $3, $9, $10\0A\0…
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/CodeGen/ARM/
H A Dinlineasm-error-t-toofewregs.ll6 …F32 $0, $9, $10\0A\09vadd.F32 $1, $9, $10\0A\09vadd.F32 $2, $9, $10\0A\09vadd.F32 $3, $9, $10\0A\0…

12345678910>>...272