| /dports/sysutils/u-boot-rock64/u-boot-2021.07/drivers/gpio/ |
| H A D | msm_gpio.c | 23 #define GPIO_OE_ENABLE (0x1 << 9) macro
66 clrsetbits_le32(reg, GPIO_OE_MASK, GPIO_OE_ENABLE); in msm_gpio_direction_output()
82 if (readl(priv->base + GPIO_CONFIG_OFF(offset)) & GPIO_OE_ENABLE) in msm_gpio_get_function()
|
| /dports/sysutils/u-boot-rpi3-32/u-boot-2021.07/drivers/gpio/ |
| H A D | msm_gpio.c | 23 #define GPIO_OE_ENABLE (0x1 << 9) macro
66 clrsetbits_le32(reg, GPIO_OE_MASK, GPIO_OE_ENABLE); in msm_gpio_direction_output()
82 if (readl(priv->base + GPIO_CONFIG_OFF(offset)) & GPIO_OE_ENABLE) in msm_gpio_get_function()
|
| /dports/sysutils/u-boot-rpi4/u-boot-2021.07/drivers/gpio/ |
| H A D | msm_gpio.c | 23 #define GPIO_OE_ENABLE (0x1 << 9) macro
66 clrsetbits_le32(reg, GPIO_OE_MASK, GPIO_OE_ENABLE); in msm_gpio_direction_output()
82 if (readl(priv->base + GPIO_CONFIG_OFF(offset)) & GPIO_OE_ENABLE) in msm_gpio_get_function()
|
| /dports/sysutils/u-boot-sifive-fu540/u-boot-2021.07/drivers/gpio/ |
| H A D | msm_gpio.c | 23 #define GPIO_OE_ENABLE (0x1 << 9) macro
66 clrsetbits_le32(reg, GPIO_OE_MASK, GPIO_OE_ENABLE); in msm_gpio_direction_output()
82 if (readl(priv->base + GPIO_CONFIG_OFF(offset)) & GPIO_OE_ENABLE) in msm_gpio_get_function()
|
| /dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/drivers/gpio/ |
| H A D | msm_gpio.c | 22 #define GPIO_OE_ENABLE (0x1 << 9) macro
65 clrsetbits_le32(reg, GPIO_OE_MASK, GPIO_OE_ENABLE); in msm_gpio_direction_output()
81 if (readl(priv->base + GPIO_CONFIG_OFF(offset)) & GPIO_OE_ENABLE) in msm_gpio_get_function()
|
| /dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/drivers/gpio/ |
| H A D | msm_gpio.c | 23 #define GPIO_OE_ENABLE (0x1 << 9) macro
66 clrsetbits_le32(reg, GPIO_OE_MASK, GPIO_OE_ENABLE); in msm_gpio_direction_output()
82 if (readl(priv->base + GPIO_CONFIG_OFF(offset)) & GPIO_OE_ENABLE) in msm_gpio_get_function()
|
| /dports/sysutils/u-boot-qemu-arm/u-boot-2021.07/drivers/gpio/ |
| H A D | msm_gpio.c | 23 #define GPIO_OE_ENABLE (0x1 << 9) macro
66 clrsetbits_le32(reg, GPIO_OE_MASK, GPIO_OE_ENABLE); in msm_gpio_direction_output()
82 if (readl(priv->base + GPIO_CONFIG_OFF(offset)) & GPIO_OE_ENABLE) in msm_gpio_get_function()
|
| /dports/sysutils/u-boot-qemu-riscv64/u-boot-2021.07/drivers/gpio/ |
| H A D | msm_gpio.c | 23 #define GPIO_OE_ENABLE (0x1 << 9) macro
66 clrsetbits_le32(reg, GPIO_OE_MASK, GPIO_OE_ENABLE); in msm_gpio_direction_output()
82 if (readl(priv->base + GPIO_CONFIG_OFF(offset)) & GPIO_OE_ENABLE) in msm_gpio_get_function()
|
| /dports/sysutils/u-boot-riotboard/u-boot-2021.07/drivers/gpio/ |
| H A D | msm_gpio.c | 23 #define GPIO_OE_ENABLE (0x1 << 9) macro
66 clrsetbits_le32(reg, GPIO_OE_MASK, GPIO_OE_ENABLE); in msm_gpio_direction_output()
82 if (readl(priv->base + GPIO_CONFIG_OFF(offset)) & GPIO_OE_ENABLE) in msm_gpio_get_function()
|
| /dports/sysutils/u-boot-rpi-arm64/u-boot-2021.07/drivers/gpio/ |
| H A D | msm_gpio.c | 23 #define GPIO_OE_ENABLE (0x1 << 9) macro
66 clrsetbits_le32(reg, GPIO_OE_MASK, GPIO_OE_ENABLE); in msm_gpio_direction_output()
82 if (readl(priv->base + GPIO_CONFIG_OFF(offset)) & GPIO_OE_ENABLE) in msm_gpio_get_function()
|
| /dports/sysutils/u-boot-rock-pi-4/u-boot-2021.07/drivers/gpio/ |
| H A D | msm_gpio.c | 23 #define GPIO_OE_ENABLE (0x1 << 9) macro
66 clrsetbits_le32(reg, GPIO_OE_MASK, GPIO_OE_ENABLE); in msm_gpio_direction_output()
82 if (readl(priv->base + GPIO_CONFIG_OFF(offset)) & GPIO_OE_ENABLE) in msm_gpio_get_function()
|
| /dports/sysutils/u-boot-rpi2/u-boot-2021.07/drivers/gpio/ |
| H A D | msm_gpio.c | 23 #define GPIO_OE_ENABLE (0x1 << 9) macro
66 clrsetbits_le32(reg, GPIO_OE_MASK, GPIO_OE_ENABLE); in msm_gpio_direction_output()
82 if (readl(priv->base + GPIO_CONFIG_OFF(offset)) & GPIO_OE_ENABLE) in msm_gpio_get_function()
|
| /dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/arm/include/asm/arch-am33xx/ |
| H A D | gpio.h | 24 #define GPIO_OE_ENABLE(x) (1 << x) macro
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/include/asm/arch-am33xx/ |
| H A D | gpio.h | 26 #define GPIO_OE_ENABLE(x) (1 << x) macro
|
| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/include/asm/arch-am33xx/ |
| H A D | gpio.h | 26 #define GPIO_OE_ENABLE(x) (1 << x) macro
|
| /dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/include/asm/arch-am33xx/ |
| H A D | gpio.h | 26 #define GPIO_OE_ENABLE(x) (1 << x) macro
|
| /dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/include/asm/arch-am33xx/ |
| H A D | gpio.h | 26 #define GPIO_OE_ENABLE(x) (1 << x) macro
|
| /dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/include/asm/arch-am33xx/ |
| H A D | gpio.h | 26 #define GPIO_OE_ENABLE(x) (1 << x) macro
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/include/asm/arch-am33xx/ |
| H A D | gpio.h | 26 #define GPIO_OE_ENABLE(x) (1 << x) macro
|
| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/arm/include/asm/arch-am33xx/ |
| H A D | gpio.h | 26 #define GPIO_OE_ENABLE(x) (1 << x) macro
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/include/asm/arch-am33xx/ |
| H A D | gpio.h | 26 #define GPIO_OE_ENABLE(x) (1 << x) macro
|
| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/include/asm/arch-am33xx/ |
| H A D | gpio.h | 26 #define GPIO_OE_ENABLE(x) (1 << x) macro
|
| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/arm/include/asm/arch-am33xx/ |
| H A D | gpio.h | 26 #define GPIO_OE_ENABLE(x) (1 << x) macro
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/include/asm/arch-am33xx/ |
| H A D | gpio.h | 26 #define GPIO_OE_ENABLE(x) (1 << x) macro
|
| /dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/include/asm/arch-am33xx/ |
| H A D | gpio.h | 26 #define GPIO_OE_ENABLE(x) (1 << x) macro
|