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Searched refs:HI6220_PLL0_BBP_GATE (Results 51 – 68 of 68) sorted by relevance

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/dports/sysutils/u-boot-beaglebone/u-boot-2021.07/include/dt-bindings/clock/
H A Dhi6220-clock.h166 #define HI6220_PLL0_BBP_GATE 5 macro
/dports/sysutils/u-boot-rock64/u-boot-2021.07/include/dt-bindings/clock/
H A Dhi6220-clock.h166 #define HI6220_PLL0_BBP_GATE 5 macro
/dports/sysutils/u-boot-sifive-fu540/u-boot-2021.07/include/dt-bindings/clock/
H A Dhi6220-clock.h166 #define HI6220_PLL0_BBP_GATE 5 macro
/dports/sysutils/u-boot-rpi3-32/u-boot-2021.07/include/dt-bindings/clock/
H A Dhi6220-clock.h166 #define HI6220_PLL0_BBP_GATE 5 macro
/dports/sysutils/u-boot-rpi4/u-boot-2021.07/include/dt-bindings/clock/
H A Dhi6220-clock.h166 #define HI6220_PLL0_BBP_GATE 5 macro
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/include/dt-bindings/clock/
H A Dhi6220-clock.h166 #define HI6220_PLL0_BBP_GATE 5 macro
/dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/include/dt-bindings/clock/
H A Dhi6220-clock.h166 #define HI6220_PLL0_BBP_GATE 5 macro
/dports/sysutils/u-boot-rockpro64/u-boot-2021.07/include/dt-bindings/clock/
H A Dhi6220-clock.h166 #define HI6220_PLL0_BBP_GATE 5 macro
/dports/sysutils/u-boot-qemu-arm/u-boot-2021.07/include/dt-bindings/clock/
H A Dhi6220-clock.h166 #define HI6220_PLL0_BBP_GATE 5 macro
/dports/sysutils/u-boot-qemu-riscv64/u-boot-2021.07/include/dt-bindings/clock/
H A Dhi6220-clock.h166 #define HI6220_PLL0_BBP_GATE 5 macro
/dports/sysutils/u-boot-rpi-arm64/u-boot-2021.07/include/dt-bindings/clock/
H A Dhi6220-clock.h166 #define HI6220_PLL0_BBP_GATE 5 macro
/dports/sysutils/u-boot-riotboard/u-boot-2021.07/include/dt-bindings/clock/
H A Dhi6220-clock.h166 #define HI6220_PLL0_BBP_GATE 5 macro
/dports/sysutils/u-boot-rock-pi-4/u-boot-2021.07/include/dt-bindings/clock/
H A Dhi6220-clock.h166 #define HI6220_PLL0_BBP_GATE 5 macro
/dports/sysutils/u-boot-rpi2/u-boot-2021.07/include/dt-bindings/clock/
H A Dhi6220-clock.h166 #define HI6220_PLL0_BBP_GATE 5 macro
/dports/sysutils/u-boot-rpi3/u-boot-2021.07/include/dt-bindings/clock/
H A Dhi6220-clock.h166 #define HI6220_PLL0_BBP_GATE 5 macro
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/clk/hisilicon/
H A Dclk-hi6220.c263 …{ HI6220_PLL0_BBP_GATE, "pll0_bbp_gate", "bbppll0", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x4…
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/clk/hisilicon/
H A Dclk-hi6220.c263 …{ HI6220_PLL0_BBP_GATE, "pll0_bbp_gate", "bbppll0", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x4…
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/clk/hisilicon/
H A Dclk-hi6220.c263 …{ HI6220_PLL0_BBP_GATE, "pll0_bbp_gate", "bbppll0", CLK_SET_RATE_PARENT|CLK_IGNORE_UNUSED, 0x4…

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