| /dports/math/teyjus/teyjus-2.1-7-ge63f40a/source/test/compiler_tests/test10/ |
| H A D | expected | 5 LABEL INSTRUCTION OPERANDS
|
| H A D | cutgoal.dis | 5 LABEL INSTRUCTION OPERANDS
|
| /dports/math/teyjus/teyjus-2.1-7-ge63f40a/source/test/compiler_tests/test14/ |
| H A D | existentialvars.dis | 5 LABEL INSTRUCTION OPERANDS
|
| /dports/math/teyjus/teyjus-2.1-7-ge63f40a/source/test/compiler_tests/test17/ |
| H A D | linkonly.dis | 5 LABEL INSTRUCTION OPERANDS
|
| /dports/math/teyjus/teyjus-2.1-7-ge63f40a/source/test/compiler_tests/test20/ |
| H A D | localconsts.dis | 5 LABEL INSTRUCTION OPERANDS
|
| H A D | expected | 5 LABEL INSTRUCTION OPERANDS
|
| /dports/math/teyjus/teyjus-2.1-7-ge63f40a/source/test/compiler_tests/test30/ |
| H A D | expected | 5 LABEL INSTRUCTION OPERANDS
|
| /dports/net-mgmt/aircrack-ng/aircrack-ng-1.5.2/build/m4/ |
| H A D | ax_gcc_x86_cpu_supports.m4 | 7 # AX_GCC_X86_CPU_SUPPORTS(X86-INSTRUCTION-SET,
12 # Checks if the host cpu supports X86-INSTRUCTION-SET. The instruction set
|
| /dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/parasites/stmlib/third_party/STM/STM32F4xx_StdPeriph_Driver/inc/ |
| H A D | stm32f4xx_qspi.h | 353 #define IS_QSPI_INSTRUCTION(INSTRUCTION) ((INSTRUCTION) <= 0xFF) argument
|
| /dports/audio/lenticular-lv2/lenticular_lv2-0.5.0-14-g14d8075/eurorack/stmlib/third_party/STM/STM32F4xx_StdPeriph_Driver/inc/ |
| H A D | stm32f4xx_qspi.h | 353 #define IS_QSPI_INSTRUCTION(INSTRUCTION) ((INSTRUCTION) <= 0xFF) argument
|
| /dports/editors/fte/fte/config/ |
| H A D | m_mvsasm.fte | 28 h_trans { 3, '-S', ' ', 'Normal' } # word at non-bol is INSTRUCTION
|
| /dports/math/teyjus/teyjus-2.1-7-ge63f40a/source/test/compiler_tests/test18/ |
| H A D | expected | 5 LABEL INSTRUCTION OPERANDS
|
| /dports/math/teyjus/teyjus-2.1-7-ge63f40a/source/test/compiler_tests/test32/ |
| H A D | expected | 5 LABEL INSTRUCTION OPERANDS
|
| H A D | typeset.dis | 5 LABEL INSTRUCTION OPERANDS
|
| /dports/math/teyjus/teyjus-2.1-7-ge63f40a/source/test/compiler_tests/test4/ |
| H A D | expected | 5 LABEL INSTRUCTION OPERANDS
|
| H A D | clauses.dis | 5 LABEL INSTRUCTION OPERANDS
|
| /dports/math/teyjus/teyjus-2.1-7-ge63f40a/source/test/compiler_tests/test5/ |
| H A D | genericgoal.dis | 5 LABEL INSTRUCTION OPERANDS
|
| H A D | expected | 5 LABEL INSTRUCTION OPERANDS
|
| /dports/math/teyjus/teyjus-2.1-7-ge63f40a/source/test/compiler_tests/test16/ |
| H A D | renaming.dis | 5 LABEL INSTRUCTION OPERANDS
|
| /dports/misc/p5-Business-EDI/atz-Business-EDI-327e01f/lib/Business/EDI/data/edifact/untdid/ |
| H A D | EDCD.d93a.csv | 80 C522;INSTRUCTION;010;4403;M;an..3;020;4401;C;an..3;030;1131;C;an..3;040;3055;C;an..3;050;4400;C;an.…
90 C534;PAYMENT INSTRUCTION DETAILS;010;4439;C;an..3;020;4431;C;an..3;030;4461;C;an..3;040;1131;C;an..…
107 C849;PARTIES TO INSTRUCTION;010;3301;M;an..17;020;3285;C;an..17;
108 C850;STATUS OF INSTRUCTION;010;4405;M;an..3;020;3036;C;an..35;
|
| H A D | EDCD.d94a.csv | 83 C522;INSTRUCTION;010;4403;M;an..3;020;4401;C;an..3;030;1131;C;an..3;040;3055;C;an..3;050;4400;C;an.…
93 C534;PAYMENT INSTRUCTION DETAILS;010;4439;C;an..3;020;4431;C;an..3;030;4461;C;an..3;040;1131;C;an..…
110 C849;PARTIES TO INSTRUCTION;010;3301;M;an..17;020;3285;C;an..17;
111 C850;STATUS OF INSTRUCTION;010;4405;M;an..3;020;3036;C;an..35;
|
| H A D | EDCD.d94b.csv | 84 C522;INSTRUCTION;010;4403;M;an..3;020;4401;C;an..3;030;1131;C;an..3;040;3055;C;an..3;050;4400;C;an.…
94 C534;PAYMENT INSTRUCTION DETAILS;010;4439;C;an..3;020;4431;C;an..3;030;4461;C;an..3;040;1131;C;an..…
111 C849;PARTIES TO INSTRUCTION;010;3301;M;an..17;020;3285;C;an..17;
112 C850;STATUS OF INSTRUCTION;010;4405;M;an..3;020;3036;C;an..35;
|
| H A D | EDCD.1921.csv | 80 C522;INSTRUCTION;010;4403;M;an..3;020;4401;C;an..3;030;1131;C;an..3;040;3055;C;an..3;050;4400;C;an.…
90 C534;PAYMENT INSTRUCTION DETAILS;010;4439;C;an..3;020;4431;C;an..3;030;4461;C;an..3;040;1131;C;an..…
107 C849;PARTIES TO INSTRUCTION;010;3301;M;an..17;020;3285;C;an..17;
108 C850;STATUS OF INSTRUCTION;010;4405;M;an..3;020;3036;C;an..35;
|
| H A D | EDCD.s93a.csv | 80 C522;INSTRUCTION;010;4403;M;an..3;020;4401;C;an..3;030;1131;C;an..3;040;3055;C;an..3;050;4400;C;an.…
90 C534;PAYMENT INSTRUCTION DETAILS;010;4439;C;an..3;020;4431;C;an..3;030;4461;C;an..3;040;1131;C;an..…
107 C849;PARTIES TO INSTRUCTION;010;3301;M;an..17;020;3285;C;an..17;
108 C850;STATUS OF INSTRUCTION;010;4405;M;an..3;020;3036;C;an..35;
|
| /dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/lib/IR/ |
| H A D | IntrinsicInst.cpp | 255 #define INSTRUCTION(NAME, NARG, ROUND_MODE, INTRINSIC) \ in isUnaryOp() macro
266 #define INSTRUCTION(NAME, NARG, ROUND_MODE, INTRINSIC) \ in isTernaryOp() macro
275 #define INSTRUCTION(NAME, NARGS, ROUND_MODE, INTRINSIC) \ in classof() macro
|