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Searched refs:L2X0_DYNAMIC_CLK_GATING_EN (Results 51 – 75 of 127) sorted by relevance

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/dports/sysutils/u-boot-tools/u-boot-2020.07/arch/arm/mach-imx/
H A Dcache.c138 val |= L2X0_DYNAMIC_CLK_GATING_EN; in v7_outer_cache_enable()
/dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/arm/mach-imx/
H A Dcache.c138 val |= L2X0_DYNAMIC_CLK_GATING_EN; in v7_outer_cache_enable()
/dports/sysutils/u-boot-beaglebone/u-boot-2021.07/arch/arm/mach-imx/
H A Dcache.c138 val |= L2X0_DYNAMIC_CLK_GATING_EN; in v7_outer_cache_enable()
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/arch/arm/mach-imx/
H A Dcache.c138 val |= L2X0_DYNAMIC_CLK_GATING_EN; in v7_outer_cache_enable()
/dports/sysutils/u-boot-chip/u-boot-2021.07/arch/arm/mach-imx/
H A Dcache.c138 val |= L2X0_DYNAMIC_CLK_GATING_EN; in v7_outer_cache_enable()
/dports/sysutils/u-boot-sifive-fu540/u-boot-2021.07/arch/arm/mach-imx/
H A Dcache.c138 val |= L2X0_DYNAMIC_CLK_GATING_EN; in v7_outer_cache_enable()
/dports/sysutils/u-boot-rpi4/u-boot-2021.07/arch/arm/mach-imx/
H A Dcache.c138 val |= L2X0_DYNAMIC_CLK_GATING_EN; in v7_outer_cache_enable()
/dports/sysutils/u-boot-rockpro64/u-boot-2021.07/arch/arm/mach-imx/
H A Dcache.c138 val |= L2X0_DYNAMIC_CLK_GATING_EN; in v7_outer_cache_enable()
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/arch/arm/include/asm/
H A Dpl310.h14 #define L2X0_DYNAMIC_CLK_GATING_EN (1 << 1) macro
/dports/sysutils/u-boot-qemu-riscv64/u-boot-2021.07/arch/arm/mach-imx/
H A Dcache.c138 val |= L2X0_DYNAMIC_CLK_GATING_EN; in v7_outer_cache_enable()
/dports/sysutils/u-boot-qemu-arm/u-boot-2021.07/arch/arm/mach-imx/
H A Dcache.c138 val |= L2X0_DYNAMIC_CLK_GATING_EN; in v7_outer_cache_enable()
/dports/sysutils/u-boot-rpi/u-boot-2021.07/arch/arm/mach-imx/
H A Dcache.c138 val |= L2X0_DYNAMIC_CLK_GATING_EN; in v7_outer_cache_enable()
/dports/sysutils/u-boot-rpi-arm64/u-boot-2021.07/arch/arm/mach-imx/
H A Dcache.c138 val |= L2X0_DYNAMIC_CLK_GATING_EN; in v7_outer_cache_enable()
/dports/sysutils/u-boot-rpi2/u-boot-2021.07/arch/arm/mach-imx/
H A Dcache.c138 val |= L2X0_DYNAMIC_CLK_GATING_EN; in v7_outer_cache_enable()
/dports/sysutils/u-boot-riotboard/u-boot-2021.07/arch/arm/mach-imx/
H A Dcache.c138 val |= L2X0_DYNAMIC_CLK_GATING_EN; in v7_outer_cache_enable()
/dports/sysutils/u-boot-rock-pi-4/u-boot-2021.07/arch/arm/mach-imx/
H A Dcache.c138 val |= L2X0_DYNAMIC_CLK_GATING_EN; in v7_outer_cache_enable()
/dports/sysutils/u-boot-rpi3/u-boot-2021.07/arch/arm/mach-imx/
H A Dcache.c138 val |= L2X0_DYNAMIC_CLK_GATING_EN; in v7_outer_cache_enable()
/dports/sysutils/u-boot-rock64/u-boot-2021.07/arch/arm/mach-imx/
H A Dcache.c138 val |= L2X0_DYNAMIC_CLK_GATING_EN; in v7_outer_cache_enable()
/dports/sysutils/u-boot-rpi3-32/u-boot-2021.07/arch/arm/mach-imx/
H A Dcache.c138 val |= L2X0_DYNAMIC_CLK_GATING_EN; in v7_outer_cache_enable()
/dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/include/asm/
H A Dpl310.h14 #define L2X0_DYNAMIC_CLK_GATING_EN (1 << 1) macro
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/include/asm/
H A Dpl310.h14 #define L2X0_DYNAMIC_CLK_GATING_EN (1 << 1) macro
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/include/asm/
H A Dpl310.h14 #define L2X0_DYNAMIC_CLK_GATING_EN (1 << 1) macro
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/arch/arm/include/asm/
H A Dpl310.h14 #define L2X0_DYNAMIC_CLK_GATING_EN (1 << 1) macro
/dports/sysutils/u-boot-chip/u-boot-2021.07/arch/arm/include/asm/
H A Dpl310.h14 #define L2X0_DYNAMIC_CLK_GATING_EN (1 << 1) macro
/dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/include/asm/
H A Dpl310.h14 #define L2X0_DYNAMIC_CLK_GATING_EN (1 << 1) macro

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