| /dports/sysutils/u-boot-orangepi-pc-plus/u-boot-2021.07/arch/arm/mach-imx/ |
| H A D | mmdc_size.c | 9 #define MEMCTL_BASE MMDC_P0_BASE_ADDR
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| /dports/sysutils/u-boot-bananapim2/u-boot-2021.07/arch/arm/mach-imx/ |
| H A D | mmdc_size.c | 9 #define MEMCTL_BASE MMDC_P0_BASE_ADDR
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| /dports/sysutils/u-boot-bananapi/u-boot-2021.07/arch/arm/mach-imx/ |
| H A D | mmdc_size.c | 9 #define MEMCTL_BASE MMDC_P0_BASE_ADDR
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| /dports/sysutils/u-boot-tools/u-boot-2020.07/arch/arm/mach-imx/ |
| H A D | mmdc_size.c | 9 #define MEMCTL_BASE MMDC_P0_BASE_ADDR
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| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/arm/mach-imx/ |
| H A D | mmdc_size.c | 9 #define MEMCTL_BASE MMDC_P0_BASE_ADDR
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| /dports/sysutils/u-boot-beaglebone/u-boot-2021.07/arch/arm/mach-imx/ |
| H A D | mmdc_size.c | 9 #define MEMCTL_BASE MMDC_P0_BASE_ADDR
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| /dports/sysutils/u-boot-sifive-fu540/u-boot-2021.07/arch/arm/mach-imx/ |
| H A D | mmdc_size.c | 9 #define MEMCTL_BASE MMDC_P0_BASE_ADDR
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| /dports/sysutils/u-boot-rpi4/u-boot-2021.07/arch/arm/mach-imx/ |
| H A D | mmdc_size.c | 9 #define MEMCTL_BASE MMDC_P0_BASE_ADDR
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| /dports/sysutils/u-boot-rockpro64/u-boot-2021.07/arch/arm/mach-imx/ |
| H A D | mmdc_size.c | 9 #define MEMCTL_BASE MMDC_P0_BASE_ADDR
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| /dports/sysutils/u-boot-qemu-riscv64/u-boot-2021.07/arch/arm/mach-imx/ |
| H A D | mmdc_size.c | 9 #define MEMCTL_BASE MMDC_P0_BASE_ADDR
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| /dports/sysutils/u-boot-qemu-arm/u-boot-2021.07/arch/arm/mach-imx/ |
| H A D | mmdc_size.c | 9 #define MEMCTL_BASE MMDC_P0_BASE_ADDR
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| /dports/sysutils/u-boot-rpi/u-boot-2021.07/arch/arm/mach-imx/ |
| H A D | mmdc_size.c | 9 #define MEMCTL_BASE MMDC_P0_BASE_ADDR
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| /dports/sysutils/u-boot-rpi-arm64/u-boot-2021.07/arch/arm/mach-imx/ |
| H A D | mmdc_size.c | 9 #define MEMCTL_BASE MMDC_P0_BASE_ADDR
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| /dports/sysutils/u-boot-rpi2/u-boot-2021.07/arch/arm/mach-imx/ |
| H A D | mmdc_size.c | 9 #define MEMCTL_BASE MMDC_P0_BASE_ADDR
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| /dports/sysutils/u-boot-riotboard/u-boot-2021.07/arch/arm/mach-imx/ |
| H A D | mmdc_size.c | 9 #define MEMCTL_BASE MMDC_P0_BASE_ADDR
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| /dports/sysutils/u-boot-rock-pi-4/u-boot-2021.07/arch/arm/mach-imx/ |
| H A D | mmdc_size.c | 9 #define MEMCTL_BASE MMDC_P0_BASE_ADDR
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| /dports/sysutils/u-boot-rpi3/u-boot-2021.07/arch/arm/mach-imx/ |
| H A D | mmdc_size.c | 9 #define MEMCTL_BASE MMDC_P0_BASE_ADDR
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| /dports/sysutils/u-boot-rock64/u-boot-2021.07/arch/arm/mach-imx/ |
| H A D | mmdc_size.c | 9 #define MEMCTL_BASE MMDC_P0_BASE_ADDR
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| /dports/sysutils/u-boot-rpi3-32/u-boot-2021.07/arch/arm/mach-imx/ |
| H A D | mmdc_size.c | 9 #define MEMCTL_BASE MMDC_P0_BASE_ADDR
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| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/mach-imx/mx6/ |
| H A D | ddr.c | 19 struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in reset_read_data_fifos()
31 struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in precharge_all()
52 struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in force_delay_measurement()
106 struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in mmdc_do_write_level_calibration()
250 struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in mmdc_do_dqs_calibration()
1012 mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in mx6_lpddr2_cfg()
1240 mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in mx6_ddr3_cfg()
1529 struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in mmdc_read_calibration()
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| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/mach-imx/mx6/ |
| H A D | ddr.c | 19 struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in reset_read_data_fifos()
31 struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in precharge_all()
52 struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in force_delay_measurement()
106 struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in mmdc_do_write_level_calibration()
250 struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in mmdc_do_dqs_calibration()
1012 mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in mx6_lpddr2_cfg()
1240 mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in mx6_ddr3_cfg()
1529 struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in mmdc_read_calibration()
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| /dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot/arch/arm/mach-imx/mx6/ |
| H A D | ddr.c | 19 struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in reset_read_data_fifos()
31 struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in precharge_all()
52 struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in force_delay_measurement()
106 struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in mmdc_do_write_level_calibration()
250 struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in mmdc_do_dqs_calibration()
1012 mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in mx6_lpddr2_cfg()
1240 mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in mx6_ddr3_cfg()
1529 struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in mmdc_read_calibration()
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| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/arch/arm/mach-imx/mx6/ |
| H A D | ddr.c | 19 struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR;
31 struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR;
52 struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR;
106 struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR;
250 struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR;
1012 mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR;
1240 mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR;
1529 struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR;
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| /dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/arch/arm/mach-imx/mx6/ |
| H A D | ddr.c | 19 struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in reset_read_data_fifos()
31 struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in precharge_all()
52 struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in force_delay_measurement()
106 struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in mmdc_do_write_level_calibration()
250 struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in mmdc_do_dqs_calibration()
1012 mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in mx6_lpddr2_cfg()
1240 mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in mx6_ddr3_cfg()
1529 struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in mmdc_read_calibration()
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| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/mach-imx/mx6/ |
| H A D | ddr.c | 22 struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in reset_read_data_fifos()
34 struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in precharge_all()
55 struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in force_delay_measurement()
109 struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in mmdc_do_write_level_calibration()
293 struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in mmdc_do_dqs_calibration()
1060 mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in mx6_lpddr2_cfg()
1290 mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in mx6_ddr3_cfg()
1652 struct mmdc_p_regs *mmdc0 = (struct mmdc_p_regs *)MMDC_P0_BASE_ADDR; in mmdc_read_calibration()
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