/dports/sysutils/u-boot-rpi4/u-boot-2021.07/drivers/net/phy/ |
H A D | mscc.c | 127 #define MSCC_DW8051_CNTL_STATUS 0 macro 349 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, enable); in vsc8584_micro_deassert_reset() 351 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, release); in vsc8584_micro_deassert_reset() 384 reg = bus->read(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS); in vsc8584_micro_assert_reset() 386 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, reg); in vsc8584_micro_assert_reset() 601 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, in vsc8584_patch_fw() 647 reg = bus->read(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS); in vsc8574_is_serdes_init()
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/dports/sysutils/u-boot-rpi3-32/u-boot-2021.07/drivers/net/phy/ |
H A D | mscc.c | 127 #define MSCC_DW8051_CNTL_STATUS 0 macro 349 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, enable); in vsc8584_micro_deassert_reset() 351 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, release); in vsc8584_micro_deassert_reset() 384 reg = bus->read(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS); in vsc8584_micro_assert_reset() 386 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, reg); in vsc8584_micro_assert_reset() 601 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, in vsc8584_patch_fw() 647 reg = bus->read(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS); in vsc8574_is_serdes_init()
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/dports/sysutils/u-boot-sifive-fu540/u-boot-2021.07/drivers/net/phy/ |
H A D | mscc.c | 127 #define MSCC_DW8051_CNTL_STATUS 0 macro 349 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, enable); in vsc8584_micro_deassert_reset() 351 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, release); in vsc8584_micro_deassert_reset() 384 reg = bus->read(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS); in vsc8584_micro_assert_reset() 386 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, reg); in vsc8584_micro_assert_reset() 601 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, in vsc8584_patch_fw() 647 reg = bus->read(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS); in vsc8574_is_serdes_init()
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/dports/sysutils/u-boot-qemu-arm/u-boot-2021.07/drivers/net/phy/ |
H A D | mscc.c | 127 #define MSCC_DW8051_CNTL_STATUS 0 macro 349 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, enable); in vsc8584_micro_deassert_reset() 351 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, release); in vsc8584_micro_deassert_reset() 384 reg = bus->read(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS); in vsc8584_micro_assert_reset() 386 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, reg); in vsc8584_micro_assert_reset() 601 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, in vsc8584_patch_fw() 647 reg = bus->read(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS); in vsc8574_is_serdes_init()
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/dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/drivers/net/phy/ |
H A D | mscc.c | 127 #define MSCC_DW8051_CNTL_STATUS 0 macro 349 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, enable); in vsc8584_micro_deassert_reset() 351 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, release); in vsc8584_micro_deassert_reset() 384 reg = bus->read(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS); in vsc8584_micro_assert_reset() 386 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, reg); in vsc8584_micro_assert_reset() 601 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, in vsc8584_patch_fw() 647 reg = bus->read(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS); in vsc8574_is_serdes_init()
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/dports/sysutils/u-boot-pinebookpro/u-boot-2021.07/drivers/net/phy/ |
H A D | mscc.c | 127 #define MSCC_DW8051_CNTL_STATUS 0 macro 349 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, enable); in vsc8584_micro_deassert_reset() 351 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, release); in vsc8584_micro_deassert_reset() 384 reg = bus->read(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS); in vsc8584_micro_assert_reset() 386 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, reg); in vsc8584_micro_assert_reset() 601 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, in vsc8584_patch_fw() 647 reg = bus->read(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS); in vsc8574_is_serdes_init()
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/dports/sysutils/u-boot-qemu-riscv64/u-boot-2021.07/drivers/net/phy/ |
H A D | mscc.c | 127 #define MSCC_DW8051_CNTL_STATUS 0 macro 349 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, enable); in vsc8584_micro_deassert_reset() 351 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, release); in vsc8584_micro_deassert_reset() 384 reg = bus->read(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS); in vsc8584_micro_assert_reset() 386 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, reg); in vsc8584_micro_assert_reset() 601 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, in vsc8584_patch_fw() 647 reg = bus->read(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS); in vsc8574_is_serdes_init()
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/dports/sysutils/u-boot-riotboard/u-boot-2021.07/drivers/net/phy/ |
H A D | mscc.c | 127 #define MSCC_DW8051_CNTL_STATUS 0 macro 349 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, enable); in vsc8584_micro_deassert_reset() 351 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, release); in vsc8584_micro_deassert_reset() 384 reg = bus->read(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS); in vsc8584_micro_assert_reset() 386 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, reg); in vsc8584_micro_assert_reset() 601 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, in vsc8584_patch_fw() 647 reg = bus->read(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS); in vsc8574_is_serdes_init()
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/dports/sysutils/u-boot-rpi-arm64/u-boot-2021.07/drivers/net/phy/ |
H A D | mscc.c | 127 #define MSCC_DW8051_CNTL_STATUS 0 macro 349 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, enable); in vsc8584_micro_deassert_reset() 351 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, release); in vsc8584_micro_deassert_reset() 384 reg = bus->read(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS); in vsc8584_micro_assert_reset() 386 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, reg); in vsc8584_micro_assert_reset() 601 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, in vsc8584_patch_fw() 647 reg = bus->read(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS); in vsc8574_is_serdes_init()
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/dports/sysutils/u-boot-rock-pi-4/u-boot-2021.07/drivers/net/phy/ |
H A D | mscc.c | 127 #define MSCC_DW8051_CNTL_STATUS 0 macro 349 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, enable); in vsc8584_micro_deassert_reset() 351 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, release); in vsc8584_micro_deassert_reset() 384 reg = bus->read(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS); in vsc8584_micro_assert_reset() 386 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, reg); in vsc8584_micro_assert_reset() 601 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, in vsc8584_patch_fw() 647 reg = bus->read(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS); in vsc8574_is_serdes_init()
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/dports/sysutils/u-boot-rpi3/u-boot-2021.07/drivers/net/phy/ |
H A D | mscc.c | 127 #define MSCC_DW8051_CNTL_STATUS 0 macro 349 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, enable); in vsc8584_micro_deassert_reset() 351 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, release); in vsc8584_micro_deassert_reset() 384 reg = bus->read(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS); in vsc8584_micro_assert_reset() 386 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, reg); in vsc8584_micro_assert_reset() 601 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, in vsc8584_patch_fw() 647 reg = bus->read(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS); in vsc8574_is_serdes_init()
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/dports/sysutils/u-boot-rpi2/u-boot-2021.07/drivers/net/phy/ |
H A D | mscc.c | 127 #define MSCC_DW8051_CNTL_STATUS 0 macro 349 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, enable); in vsc8584_micro_deassert_reset() 351 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, release); in vsc8584_micro_deassert_reset() 384 reg = bus->read(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS); in vsc8584_micro_assert_reset() 386 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, reg); in vsc8584_micro_assert_reset() 601 bus->write(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS, in vsc8584_patch_fw() 647 reg = bus->read(bus, phy, MDIO_DEVAD_NONE, MSCC_DW8051_CNTL_STATUS); in vsc8574_is_serdes_init()
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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/net/phy/mscc/ |
H A D | mscc_main.c | 881 phy_base_write(phydev, MSCC_DW8051_CNTL_STATUS, enable); in vsc8584_micro_deassert_reset() 883 phy_base_write(phydev, MSCC_DW8051_CNTL_STATUS, release); in vsc8584_micro_deassert_reset() 916 reg = phy_base_read(phydev, MSCC_DW8051_CNTL_STATUS); in vsc8584_micro_assert_reset() 918 phy_base_write(phydev, MSCC_DW8051_CNTL_STATUS, reg); in vsc8584_micro_assert_reset() 978 phy_base_write(phydev, MSCC_DW8051_CNTL_STATUS, RUN_FROM_INT_ROM | in vsc8584_patch_fw() 1024 reg = phy_base_read(phydev, MSCC_DW8051_CNTL_STATUS); in vsc8574_is_serdes_init()
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H A D | mscc.h | 204 #define MSCC_DW8051_CNTL_STATUS 0 macro
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/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/net/phy/mscc/ |
H A D | mscc_main.c | 881 phy_base_write(phydev, MSCC_DW8051_CNTL_STATUS, enable); in vsc8584_micro_deassert_reset() 883 phy_base_write(phydev, MSCC_DW8051_CNTL_STATUS, release); in vsc8584_micro_deassert_reset() 916 reg = phy_base_read(phydev, MSCC_DW8051_CNTL_STATUS); in vsc8584_micro_assert_reset() 918 phy_base_write(phydev, MSCC_DW8051_CNTL_STATUS, reg); in vsc8584_micro_assert_reset() 978 phy_base_write(phydev, MSCC_DW8051_CNTL_STATUS, RUN_FROM_INT_ROM | in vsc8584_patch_fw() 1024 reg = phy_base_read(phydev, MSCC_DW8051_CNTL_STATUS); in vsc8574_is_serdes_init()
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H A D | mscc.h | 204 #define MSCC_DW8051_CNTL_STATUS 0 macro
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/dports/multimedia/libv4l/linux-5.13-rc2/drivers/net/phy/mscc/ |
H A D | mscc_main.c | 881 phy_base_write(phydev, MSCC_DW8051_CNTL_STATUS, enable); in vsc8584_micro_deassert_reset() 883 phy_base_write(phydev, MSCC_DW8051_CNTL_STATUS, release); in vsc8584_micro_deassert_reset() 916 reg = phy_base_read(phydev, MSCC_DW8051_CNTL_STATUS); in vsc8584_micro_assert_reset() 918 phy_base_write(phydev, MSCC_DW8051_CNTL_STATUS, reg); in vsc8584_micro_assert_reset() 978 phy_base_write(phydev, MSCC_DW8051_CNTL_STATUS, RUN_FROM_INT_ROM | in vsc8584_patch_fw() 1024 reg = phy_base_read(phydev, MSCC_DW8051_CNTL_STATUS); in vsc8574_is_serdes_init()
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H A D | mscc.h | 204 #define MSCC_DW8051_CNTL_STATUS 0 macro
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