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Searched refs:MSTATUS_MPV (Results 51 – 67 of 67) sorted by relevance

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/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/riscv/
H A Dcpu_helper.c965 env->mstatush = set_field(env->mstatush, MSTATUS_MPV, in riscv_cpu_do_interrupt()
970 env->mstatus = set_field(env->mstatus, MSTATUS_MPV, in riscv_cpu_do_interrupt()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/opensbi/include/sbi/
H A Driscv_encoding.h46 #define MSTATUS_MPV 0x0000008000000000 macro
/dports/emulators/qemu42/qemu-4.2.1/roms/opensbi/include/sbi/
H A Driscv_encoding.h46 #define MSTATUS_MPV 0x0000008000000000 macro
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/riscv/
H A Dcpu_helper.c783 if (riscv_has_ext(env, RVH) && get_field(env->mstatus, MSTATUS_MPV)) { in riscv_cpu_tlb_fill()
1061 env->mstatus = set_field(env->mstatus, MSTATUS_MPV, in riscv_cpu_do_interrupt()
/dports/emulators/qemu60/qemu-6.0.0/target/riscv/
H A Dcpu_helper.c760 if (riscv_has_ext(env, RVH) && get_field(env->mstatus, MSTATUS_MPV)) { in riscv_cpu_tlb_fill()
1037 env->mstatus = set_field(env->mstatus, MSTATUS_MPV, in riscv_cpu_do_interrupt()
/dports/emulators/qemu5/qemu-5.2.0/roms/opensbi/include/sbi/
H A Driscv_encoding.h41 #define MSTATUS_MPV _ULL(0x0000008000000000) macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/opensbi/include/sbi/
H A Driscv_encoding.h40 #define MSTATUS_MPV _ULL(0x0000008000000000) macro
/dports/emulators/qemu/qemu-6.2.0/target/riscv/
H A Dcpu_helper.c847 if (riscv_has_ext(env, RVH) && get_field(env->mstatus, MSTATUS_MPV)) { in riscv_cpu_tlb_fill()
1103 env->mstatus = set_field(env->mstatus, MSTATUS_MPV, in riscv_cpu_do_interrupt()
/dports/emulators/qemu60/qemu-6.0.0/roms/opensbi/include/sbi/
H A Driscv_encoding.h41 #define MSTATUS_MPV _ULL(0x0000008000000000) macro
/dports/sysutils/opensbi/opensbi-0.9/include/sbi/
H A Driscv_encoding.h41 #define MSTATUS_MPV _ULL(0x0000008000000000) macro
/dports/emulators/qemu/qemu-6.2.0/roms/opensbi/include/sbi/
H A Driscv_encoding.h41 #define MSTATUS_MPV _ULL(0x0000008000000000) macro
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/riscv/
H A Dcpu_helper.c1096 env->mstatush = set_field(env->mstatush, MSTATUS_MPV, in riscv_cpu_do_interrupt()
1101 env->mstatus = set_field(env->mstatus, MSTATUS_MPV, in riscv_cpu_do_interrupt()
/dports/emulators/riscv-isa-sim/riscv-isa-sim-4f12984/riscv/
H A Dcsrs.cc443 | (has_mpv ? MSTATUS_MPV : 0); in unlogged_write()
534 state->mstatus->write(state->mstatus->read() & ~(MSTATUS_GVA | MSTATUS_MPV)); in unlogged_write()
H A Dmmu.cc62 if (get_field(proc->state.mstatus->read(), MSTATUS_MPV) && mode != PRV_M) in translate()
H A Dprocessor.cc929 s = set_field(s, MSTATUS_MPV, curr_virt); in take_trap()
H A Dencoding.h36 #define MSTATUS_MPV 0x0000008000000000 macro
/dports/devel/openocd/openocd-0.11.0/src/target/riscv/
H A Dencoding.h34 #define MSTATUS_MPV 0x0000008000000000 macro

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