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Searched refs:MSTATUS_XS (Results 76 – 89 of 89) sorted by relevance

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/dports/emulators/qemu5/qemu-5.2.0/target/riscv/
H A Dcpu_bits.h375 #define MSTATUS_XS 0x00018000 macro
H A Dcsr.c473 ((mstatus & MSTATUS_XS) == MSTATUS_XS); in write_mstatus()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/target/riscv/
H A Dcpu_bits.h357 #define MSTATUS_XS 0x00018000 macro
H A Dcsr.c393 ((mstatus & MSTATUS_XS) == MSTATUS_XS); in write_mstatus()
/dports/emulators/qemu-cheri/qemu-0a323821042c36e21ea80e58b9545dfc3b0cb8ef/target/riscv/
H A Dcpu_bits.h363 #define MSTATUS_XS 0x00018000 macro
H A Dcsr.c404 ((mstatus & MSTATUS_XS) == MSTATUS_XS); in write_mstatus()
/dports/emulators/qemu/qemu-6.2.0/target/riscv/
H A Dcpu_bits.h380 #define MSTATUS_XS 0x00018000 macro
/dports/emulators/qemu60/qemu-6.0.0/target/riscv/
H A Dcpu_bits.h376 #define MSTATUS_XS 0x00018000 macro
H A Dcsr.c494 ((mstatus & MSTATUS_XS) == MSTATUS_XS); in write_mstatus()
/dports/emulators/qemu-utils/qemu-4.2.1/roms/opensbi/include/sbi/
H A Driscv_encoding.h33 #define MSTATUS_XS 0x00018000 macro
/dports/emulators/qemu42/qemu-4.2.1/roms/opensbi/include/sbi/
H A Driscv_encoding.h33 #define MSTATUS_XS 0x00018000 macro
/dports/emulators/qemu-devel/qemu-de8ed1055c2ce18c95f597eb10df360dcb534f99/target/riscv/
H A Dcsr.c524 ((mstatus & MSTATUS_XS) == MSTATUS_XS); in write_mstatus()
/dports/devel/openocd/openocd-0.11.0/src/target/riscv/
H A Dencoding.h23 #define MSTATUS_XS 0x00018000 macro
/dports/emulators/riscv-isa-sim/riscv-isa-sim-4f12984/riscv/
H A Dencoding.h23 #define MSTATUS_XS 0x00018000 macro

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