Home
last modified time | relevance | path

Searched refs:MUL11 (Results 76 – 83 of 83) sorted by relevance

1234

/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/Transforms/Attributor/
H A Dvalue-simplify-pointer-info.ll138 ; IS__TUNIT_OPM-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1
174 ; IS__TUNIT_NPM-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1
210 ; IS__CGSCC_OPM-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1
246 ; IS__CGSCC_NPM-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1
1654 ; IS__TUNIT_OPM-NEXT: [[MUL11:%.*]] = shl nsw i32 [[I8]], 1
1656 ; IS__TUNIT_OPM-NEXT: store i32 [[MUL11]], i32* [[I212]], align 4, !tbaa [[TBAA13]]
1704 ; IS__TUNIT_NPM-NEXT: [[MUL11:%.*]] = shl nsw i32 [[I8]], 1
1706 ; IS__TUNIT_NPM-NEXT: store i32 [[MUL11]], i32* [[I212]], align 4, !tbaa [[TBAA13]]
1754 ; IS__CGSCC_OPM-NEXT: [[MUL11:%.*]] = shl nsw i32 [[I8]], 1
1756 ; IS__CGSCC_OPM-NEXT: store i32 [[MUL11]], i32* [[I212]], align 4, !tbaa [[TBAA13]]
[all …]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/Transforms/Attributor/
H A Dvalue-simplify-pointer-info.ll136 ; IS__TUNIT_OPM-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1
172 ; IS__TUNIT_NPM-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1
208 ; IS__CGSCC_OPM-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1
244 ; IS__CGSCC_NPM-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1
1652 ; IS__TUNIT_OPM-NEXT: [[MUL11:%.*]] = shl nsw i32 [[I8]], 1
1654 ; IS__TUNIT_OPM-NEXT: store i32 [[MUL11]], i32* [[I212]], align 4, !tbaa [[TBAA13]]
1702 ; IS__TUNIT_NPM-NEXT: [[MUL11:%.*]] = shl nsw i32 [[I8]], 1
1704 ; IS__TUNIT_NPM-NEXT: store i32 [[MUL11]], i32* [[I212]], align 4, !tbaa [[TBAA13]]
1752 ; IS__CGSCC_OPM-NEXT: [[MUL11:%.*]] = shl nsw i32 [[I8]], 1
1754 ; IS__CGSCC_OPM-NEXT: store i32 [[MUL11]], i32* [[I212]], align 4, !tbaa [[TBAA13]]
[all …]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/Transforms/Attributor/
H A Dvalue-simplify-pointer-info.ll136 ; IS__TUNIT_OPM-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1
172 ; IS__TUNIT_NPM-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1
208 ; IS__CGSCC_OPM-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1
244 ; IS__CGSCC_NPM-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1
1652 ; IS__TUNIT_OPM-NEXT: [[MUL11:%.*]] = shl nsw i32 [[I8]], 1
1654 ; IS__TUNIT_OPM-NEXT: store i32 [[MUL11]], i32* [[I212]], align 4, !tbaa [[TBAA13]]
1702 ; IS__TUNIT_NPM-NEXT: [[MUL11:%.*]] = shl nsw i32 [[I8]], 1
1704 ; IS__TUNIT_NPM-NEXT: store i32 [[MUL11]], i32* [[I212]], align 4, !tbaa [[TBAA13]]
1752 ; IS__CGSCC_OPM-NEXT: [[MUL11:%.*]] = shl nsw i32 [[I8]], 1
1754 ; IS__CGSCC_OPM-NEXT: store i32 [[MUL11]], i32* [[I212]], align 4, !tbaa [[TBAA13]]
[all …]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/Transforms/Attributor/
H A Dvalue-simplify-pointer-info.ll136 ; IS__TUNIT_OPM-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1
172 ; IS__TUNIT_NPM-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1
208 ; IS__CGSCC_OPM-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1
244 ; IS__CGSCC_NPM-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1
1652 ; IS__TUNIT_OPM-NEXT: [[MUL11:%.*]] = shl nsw i32 [[I8]], 1
1654 ; IS__TUNIT_OPM-NEXT: store i32 [[MUL11]], i32* [[I212]], align 4, !tbaa [[TBAA13]]
1702 ; IS__TUNIT_NPM-NEXT: [[MUL11:%.*]] = shl nsw i32 [[I8]], 1
1704 ; IS__TUNIT_NPM-NEXT: store i32 [[MUL11]], i32* [[I212]], align 4, !tbaa [[TBAA13]]
1752 ; IS__CGSCC_OPM-NEXT: [[MUL11:%.*]] = shl nsw i32 [[I8]], 1
1754 ; IS__CGSCC_OPM-NEXT: store i32 [[MUL11]], i32* [[I212]], align 4, !tbaa [[TBAA13]]
[all …]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/Transforms/Attributor/
H A Dvalue-simplify-pointer-info.ll136 ; IS__TUNIT_OPM-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1
172 ; IS__TUNIT_NPM-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1
208 ; IS__CGSCC_OPM-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1
244 ; IS__CGSCC_NPM-NEXT: [[MUL11:%.*]] = shl nsw i32 2, 1
1652 ; IS__TUNIT_OPM-NEXT: [[MUL11:%.*]] = shl nsw i32 [[I8]], 1
1654 ; IS__TUNIT_OPM-NEXT: store i32 [[MUL11]], i32* [[I212]], align 4, !tbaa [[TBAA13]]
1702 ; IS__TUNIT_NPM-NEXT: [[MUL11:%.*]] = shl nsw i32 [[I8]], 1
1704 ; IS__TUNIT_NPM-NEXT: store i32 [[MUL11]], i32* [[I212]], align 4, !tbaa [[TBAA13]]
1752 ; IS__CGSCC_OPM-NEXT: [[MUL11:%.*]] = shl nsw i32 [[I8]], 1
1754 ; IS__CGSCC_OPM-NEXT: store i32 [[MUL11]], i32* [[I212]], align 4, !tbaa [[TBAA13]]
[all …]
/dports/lang/sdcc/sdcc-4.0.0/device/include/hc08/
H A Dmc68hc908gp32.h425 #define MUL11 ((struct __hc08_bits *)(&PMSH))->bit3 macro
H A Dmc68hc908apxx.h383 #define MUL11 ((struct __hc08_bits *)(&PMSH))->bit3 macro
/dports/devel/asl/asl-current/tests/t_bas52/
H A Dbas52.fp1487 MUL11: ANL A,#0FH ;MASK OFF HIGH ORDER BITS

1234