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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/ffmpeg/libavresample/arm/
H A Dresample_neon.S48 MUL4
95 .purgem MUL4
125 .macro MUL4 macro
165 .macro MUL4 macro
208 .macro MUL4 macro
249 MUL4
296 .purgem MUL4
332 .macro MUL4 macro
/dports/multimedia/handbrake/ffmpeg-4.4/libavresample/arm/
H A Dresample_neon.S48 MUL4
95 .purgem MUL4
125 .macro MUL4 macro
165 .macro MUL4 macro
208 .macro MUL4 macro
249 MUL4
296 .purgem MUL4
332 .macro MUL4 macro
/dports/math/openblas/OpenBLAS-0.3.18/kernel/mips/
H A Dsscal_msa.c216 MUL4(x0, da_vec, x1, da_vec, x2, da_vec, x3, da_vec, x0, x1, x2, x3); in CNAME()
217 MUL4(x4, da_vec, x5, da_vec, x6, da_vec, x7, da_vec, x4, x5, x6, x7); in CNAME()
224 MUL4(x0, da_vec, x1, da_vec, x2, da_vec, x3, da_vec, x0, x1, x2, x3); in CNAME()
238 MUL4(f0, da, f1, da, f2, da, f3, da, f0, f1, f2, f3); in CNAME()
275 MUL4(f0, da, f1, da, f2, da, f3, da, f0, f1, f2, f3); in CNAME()
316 MUL4(f0, da, f1, da, f2, da, f3, da, f0, f1, f2, f3); in CNAME()
353 MUL4(f0, da, f1, da, f2, da, f3, da, f0, f1, f2, f3); in CNAME()
354 MUL4(f4, da, f5, da, f6, da, f7, da, f4, f5, f6, f7); in CNAME()
361 MUL4(f0, da, f1, da, f2, da, f3, da, f0, f1, f2, f3); in CNAME()
H A Ddscal_msa.c208 MUL4(x0, da_vec, x1, da_vec, x2, da_vec, x3, da_vec, x0, x1, x2, x3); in CNAME()
209 MUL4(x4, da_vec, x5, da_vec, x6, da_vec, x7, da_vec, x4, x5, x6, x7); in CNAME()
216 MUL4(x0, da_vec, x1, da_vec, x2, da_vec, x3, da_vec, x0, x1, x2, x3); in CNAME()
260 MUL4(f0, da, f1, da, f2, da, f3, da, f0, f1, f2, f3); in CNAME()
301 MUL4(f0, da, f1, da, f2, da, f3, da, f0, f1, f2, f3); in CNAME()
338 MUL4(f0, da, f1, da, f2, da, f3, da, f0, f1, f2, f3); in CNAME()
339 MUL4(f4, da, f5, da, f6, da, f7, da, f4, f5, f6, f7); in CNAME()
346 MUL4(f0, da, f1, da, f2, da, f3, da, f0, f1, f2, f3); in CNAME()
/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/Transforms/SLPVectorizer/AArch64/
H A Dmul.ll50 ; CHECK-NEXT: [[MUL4:%.*]] = mul nsw i64 [[TMP3]], [[TMP2]]
51 ; CHECK-NEXT: store i64 [[MUL4]], i64* [[ARRAYIDX3]], align 8
87 ; CHECK-NEXT: [[MUL4:%.*]] = mul nsw i64 [[TMP3]], [[TMP2]]
90 ; CHECK-NEXT: [[ADD9:%.*]] = add nsw i64 [[MUL4]], [[TMP2]]
/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/Transforms/SLPVectorizer/AArch64/
H A Dmul.ll50 ; CHECK-NEXT: [[MUL4:%.*]] = mul nsw i64 [[TMP3]], [[TMP2]]
51 ; CHECK-NEXT: store i64 [[MUL4]], i64* [[ARRAYIDX3]], align 8
87 ; CHECK-NEXT: [[MUL4:%.*]] = mul nsw i64 [[TMP3]], [[TMP2]]
90 ; CHECK-NEXT: [[ADD9:%.*]] = add nsw i64 [[MUL4]], [[TMP2]]
/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/Transforms/SLPVectorizer/AArch64/
H A Dmul.ll50 ; CHECK-NEXT: [[MUL4:%.*]] = mul nsw i64 [[TMP3]], [[TMP2]]
51 ; CHECK-NEXT: store i64 [[MUL4]], i64* [[ARRAYIDX3]], align 8
87 ; CHECK-NEXT: [[MUL4:%.*]] = mul nsw i64 [[TMP3]], [[TMP2]]
90 ; CHECK-NEXT: [[ADD9:%.*]] = add nsw i64 [[MUL4]], [[TMP2]]
/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/Transforms/SLPVectorizer/AArch64/
H A Dmul.ll50 ; CHECK-NEXT: [[MUL4:%.*]] = mul nsw i64 [[TMP3]], [[TMP2]]
51 ; CHECK-NEXT: store i64 [[MUL4]], i64* [[ARRAYIDX3]], align 8
87 ; CHECK-NEXT: [[MUL4:%.*]] = mul nsw i64 [[TMP3]], [[TMP2]]
90 ; CHECK-NEXT: [[ADD9:%.*]] = add nsw i64 [[MUL4]], [[TMP2]]
/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/Transforms/SLPVectorizer/AArch64/
H A Dmul.ll50 ; CHECK-NEXT: [[MUL4:%.*]] = mul nsw i64 [[TMP3]], [[TMP2]]
51 ; CHECK-NEXT: store i64 [[MUL4]], i64* [[ARRAYIDX3]], align 8
87 ; CHECK-NEXT: [[MUL4:%.*]] = mul nsw i64 [[TMP3]], [[TMP2]]
90 ; CHECK-NEXT: [[ADD9:%.*]] = add nsw i64 [[MUL4]], [[TMP2]]
/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/Transforms/SLPVectorizer/AArch64/
H A Dmul.ll50 ; CHECK-NEXT: [[MUL4:%.*]] = mul nsw i64 [[TMP3]], [[TMP2]]
51 ; CHECK-NEXT: store i64 [[MUL4]], i64* [[ARRAYIDX3]], align 8
87 ; CHECK-NEXT: [[MUL4:%.*]] = mul nsw i64 [[TMP3]], [[TMP2]]
90 ; CHECK-NEXT: [[ADD9:%.*]] = add nsw i64 [[MUL4]], [[TMP2]]
/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/Transforms/SLPVectorizer/AArch64/
H A Dmul.ll50 ; CHECK-NEXT: [[MUL4:%.*]] = mul nsw i64 [[TMP3]], [[TMP2]]
51 ; CHECK-NEXT: store i64 [[MUL4]], i64* [[ARRAYIDX3]], align 8
87 ; CHECK-NEXT: [[MUL4:%.*]] = mul nsw i64 [[TMP3]], [[TMP2]]
90 ; CHECK-NEXT: [[ADD9:%.*]] = add nsw i64 [[MUL4]], [[TMP2]]
/dports/devel/aarch64-none-elf-gcc/gcc-8.4.0/gcc/testsuite/ada/acats/tests/c4/
H A Dc49022a.ada48 MUL4 : CONSTANT := (-1) * (-1); constant
104 IF MUL1 /= 1 OR MUL2 /= -1 OR MUL3 /= -1 OR MUL4 /= 1 THEN
H A Dc49022c.ada48 MUL4 : CONSTANT := (-2.5) * (-1.5); constant
111 MUL3 /= -3.75 OR MUL4 /= 3.75 THEN
/dports/lang/gcc6-aux/gcc-6-20180516/gcc/testsuite/ada/acats/tests/c4/
H A Dc49022a.ada48 MUL4 : CONSTANT := (-1) * (-1); constant
104 IF MUL1 /= 1 OR MUL2 /= -1 OR MUL3 /= -1 OR MUL4 /= 1 THEN
H A Dc49022c.ada48 MUL4 : CONSTANT := (-2.5) * (-1.5); constant
111 MUL3 /= -3.75 OR MUL4 /= 3.75 THEN
/dports/lang/gcc12-devel/gcc-12-20211205/gcc/testsuite/ada/acats/tests/c4/
H A Dc49022a.ada48 MUL4 : CONSTANT := (-1) * (-1); constant
104 IF MUL1 /= 1 OR MUL2 /= -1 OR MUL3 /= -1 OR MUL4 /= 1 THEN
H A Dc49022c.ada48 MUL4 : CONSTANT := (-2.5) * (-1.5); constant
111 MUL3 /= -3.75 OR MUL4 /= 3.75 THEN
/dports/lang/gcc9/gcc-9.4.0/gcc/testsuite/ada/acats/tests/c4/
H A Dc49022a.ada48 MUL4 : CONSTANT := (-1) * (-1); constant
104 IF MUL1 /= 1 OR MUL2 /= -1 OR MUL3 /= -1 OR MUL4 /= 1 THEN
H A Dc49022c.ada48 MUL4 : CONSTANT := (-2.5) * (-1.5); constant
111 MUL3 /= -3.75 OR MUL4 /= 3.75 THEN
/dports/devel/arm-none-eabi-gcc/gcc-8.4.0/gcc/testsuite/ada/acats/tests/c4/
H A Dc49022c.ada48 MUL4 : CONSTANT := (-2.5) * (-1.5); constant
111 MUL3 /= -3.75 OR MUL4 /= 3.75 THEN
/dports/devel/riscv64-gcc/gcc-8.3.0/gcc/testsuite/ada/acats/tests/c4/
H A Dc49022a.ada48 MUL4 : CONSTANT := (-1) * (-1); constant
104 IF MUL1 /= 1 OR MUL2 /= -1 OR MUL3 /= -1 OR MUL4 /= 1 THEN
H A Dc49022c.ada48 MUL4 : CONSTANT := (-2.5) * (-1.5); constant
111 MUL3 /= -3.75 OR MUL4 /= 3.75 THEN
/dports/devel/avr-gcc/gcc-10.2.0/gcc/testsuite/ada/acats/tests/c4/
H A Dc49022a.ada48 MUL4 : CONSTANT := (-1) * (-1); constant
104 IF MUL1 /= 1 OR MUL2 /= -1 OR MUL3 /= -1 OR MUL4 /= 1 THEN
H A Dc49022c.ada48 MUL4 : CONSTANT := (-2.5) * (-1.5); constant
111 MUL3 /= -3.75 OR MUL4 /= 3.75 THEN
/dports/lang/gnat_util/gcc-6-20180516/gcc/testsuite/ada/acats/tests/c4/
H A Dc49022a.ada48 MUL4 : CONSTANT := (-1) * (-1); constant
104 IF MUL1 /= 1 OR MUL2 /= -1 OR MUL3 /= -1 OR MUL4 /= 1 THEN

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