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Searched refs:OR_SCY_15_CLK (Results 51 – 75 of 102) sorted by relevance

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/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/include/
H A Dmpc8xx.h251 #define OR_SCY_15_CLK 0x000000F0 /* 15 clock cycles wait states */ macro
/dports/sysutils/u-boot-clearfog/u-boot-2021.07/include/
H A Dmpc8xx.h251 #define OR_SCY_15_CLK 0x000000F0 /* 15 clock cycles wait states */ macro
/dports/sysutils/u-boot-orangepi-zero-plus/u-boot-2021.07/include/
H A Dmpc8xx.h251 #define OR_SCY_15_CLK 0x000000F0 /* 15 clock cycles wait states */ macro
/dports/sysutils/u-boot-orangepi-zero/u-boot-2021.07/include/
H A Dmpc8xx.h251 #define OR_SCY_15_CLK 0x000000F0 /* 15 clock cycles wait states */ macro
/dports/sysutils/u-boot-pandaboard/u-boot-2021.07/include/
H A Dmpc8xx.h251 #define OR_SCY_15_CLK 0x000000F0 /* 15 clock cycles wait states */ macro
/dports/sysutils/u-boot-orangepi-r1/u-boot-2021.07/include/
H A Dmpc8xx.h251 #define OR_SCY_15_CLK 0x000000F0 /* 15 clock cycles wait states */ macro
/dports/sysutils/u-boot-pine-h64/u-boot-2021.07/include/
H A Dmpc8xx.h251 #define OR_SCY_15_CLK 0x000000F0 /* 15 clock cycles wait states */
/dports/sysutils/u-boot-pcduino3/u-boot-2021.07/include/
H A Dmpc8xx.h251 #define OR_SCY_15_CLK 0x000000F0 /* 15 clock cycles wait states */ macro
/dports/sysutils/u-boot-pine64-lts/u-boot-2021.07/include/
H A Dmpc8xx.h251 #define OR_SCY_15_CLK 0x000000F0 /* 15 clock cycles wait states */ macro
/dports/sysutils/u-boot-pinebook/u-boot-2021.07/include/
H A Dmpc8xx.h251 #define OR_SCY_15_CLK 0x000000F0 /* 15 clock cycles wait states */ macro
/dports/sysutils/u-boot-pine64/u-boot-2021.07/include/
H A Dmpc8xx.h251 #define OR_SCY_15_CLK 0x000000F0 /* 15 clock cycles wait states */ macro
/dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/include/
H A Dmpc8xx.h251 #define OR_SCY_15_CLK 0x000000F0 /* 15 clock cycles wait states */ macro
/dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/include/
H A Dmpc8xx.h251 #define OR_SCY_15_CLK 0x000000F0 /* 15 clock cycles wait states */ macro
/dports/sysutils/u-boot-nanopi-a64/u-boot-2021.07/include/
H A Dmpc8xx.h251 #define OR_SCY_15_CLK 0x000000F0 /* 15 clock cycles wait states */ macro
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot/include/
H A Dmpc8xx.h251 #define OR_SCY_15_CLK 0x000000F0 /* 15 clock cycles wait states */ macro
/dports/sysutils/u-boot-orangepi-pc2/u-boot-2021.07/include/
H A Dmpc8xx.h251 #define OR_SCY_15_CLK 0x000000F0 /* 15 clock cycles wait states */ macro
/dports/sysutils/u-boot-orangepi-plus-2e/u-boot-2021.07/include/
H A Dmpc8xx.h251 #define OR_SCY_15_CLK 0x000000F0 /* 15 clock cycles wait states */ macro
/dports/sysutils/u-boot-orangepi-pc/u-boot-2021.07/include/
H A Dmpc8xx.h251 #define OR_SCY_15_CLK 0x000000F0 /* 15 clock cycles wait states */ macro
/dports/sysutils/u-boot-orangepi-one/u-boot-2021.07/include/
H A Dmpc8xx.h251 #define OR_SCY_15_CLK 0x000000F0 /* 15 clock cycles wait states */ macro
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/include/
H A Dmpc8xx.h251 #define OR_SCY_15_CLK 0x000000F0 /* 15 clock cycles wait states */ macro
/dports/sysutils/u-boot-orangepi-pc-plus/u-boot-2021.07/include/
H A Dmpc8xx.h251 #define OR_SCY_15_CLK 0x000000F0 /* 15 clock cycles wait states */ macro
/dports/sysutils/u-boot-bananapim2/u-boot-2021.07/include/
H A Dmpc8xx.h251 #define OR_SCY_15_CLK 0x000000F0 /* 15 clock cycles wait states */ macro
/dports/sysutils/u-boot-tools/u-boot-2020.07/include/
H A Dmpc8xx.h251 #define OR_SCY_15_CLK 0x000000F0 /* 15 clock cycles wait states */ macro
/dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/include/
H A Dmpc8xx.h251 #define OR_SCY_15_CLK 0x000000F0 /* 15 clock cycles wait states */ macro
/dports/sysutils/u-boot-bananapi/u-boot-2021.07/include/
H A Dmpc8xx.h251 #define OR_SCY_15_CLK 0x000000F0 /* 15 clock cycles wait states */ macro

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