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Searched refs:PCLK_PWM (Results 126 – 150 of 950) sorted by relevance

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/dports/sysutils/u-boot-rock-pi-4/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3128.c359 case PCLK_PWM: in rk3128_peri_get_pclk()
383 case PCLK_PWM: in rk3128_peri_set_pclk()
496 case PCLK_PWM: in rk3128_clk_get_rate()
532 case PCLK_PWM: in rk3128_clk_set_rate()
/dports/sysutils/u-boot-rpi3/u-boot-2021.07/arch/arm/dts/
H A Drk3036.dtsi155 clocks = <&cru PCLK_PWM>;
166 clocks = <&cru PCLK_PWM>;
177 clocks = <&cru PCLK_PWM>;
188 clocks = <&cru PCLK_PWM>;
/dports/sysutils/u-boot-rock-pi-4/u-boot-2021.07/arch/arm/dts/
H A Drk3036.dtsi155 clocks = <&cru PCLK_PWM>;
166 clocks = <&cru PCLK_PWM>;
177 clocks = <&cru PCLK_PWM>;
188 clocks = <&cru PCLK_PWM>;
/dports/sysutils/u-boot-rock64/u-boot-2021.07/drivers/clk/rockchip/
H A Dclk_rk3128.c359 case PCLK_PWM: in rk3128_peri_get_pclk()
383 case PCLK_PWM: in rk3128_peri_set_pclk()
496 case PCLK_PWM: in rk3128_clk_get_rate()
532 case PCLK_PWM: in rk3128_clk_set_rate()
/dports/sysutils/u-boot-rpi3-32/u-boot-2021.07/arch/arm/dts/
H A Drk3036.dtsi155 clocks = <&cru PCLK_PWM>;
166 clocks = <&cru PCLK_PWM>;
177 clocks = <&cru PCLK_PWM>;
188 clocks = <&cru PCLK_PWM>;
/dports/multimedia/v4l_compat/linux-5.13-rc2/include/dt-bindings/clock/
H A Ds3c2443.h78 #define PCLK_PWM 82 macro
H A Dsamsung,s3c64xx-clock.h82 #define PCLK_PWM 67 macro
/dports/multimedia/v4l-utils/linux-5.13-rc2/include/dt-bindings/clock/
H A Ds3c2443.h78 #define PCLK_PWM 82 macro
H A Dsamsung,s3c64xx-clock.h82 #define PCLK_PWM 67 macro
/dports/multimedia/libv4l/linux-5.13-rc2/include/dt-bindings/clock/
H A Ds3c2443.h78 #define PCLK_PWM 82 macro
H A Dsamsung,s3c64xx-clock.h82 #define PCLK_PWM 67 macro
/dports/multimedia/libv4l/linux-5.13-rc2/drivers/clk/samsung/
H A Dclk-s3c2412.c117 GATE(PCLK_PWM, "pwm", "pclk", CLKCON, 17, 0, 0),
147 ALIAS(PCLK_PWM, NULL, "timers"),
/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/clk/samsung/
H A Dclk-s3c2412.c117 GATE(PCLK_PWM, "pwm", "pclk", CLKCON, 17, 0, 0),
147 ALIAS(PCLK_PWM, NULL, "timers"),
/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/clk/samsung/
H A Dclk-s3c2412.c117 GATE(PCLK_PWM, "pwm", "pclk", CLKCON, 17, 0, 0),
147 ALIAS(PCLK_PWM, NULL, "timers"),
/dports/sysutils/u-boot-chip/u-boot-2021.07/include/dt-bindings/clock/
H A Drk3036-cru.h72 #define PCLK_PWM 350 macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/include/dt-bindings/clock/
H A Drk3128-cru.h75 #define PCLK_PWM 350 macro
H A Drk3036-cru.h72 #define PCLK_PWM 350 macro
/dports/sysutils/u-boot-nanopi-neo2/u-boot-2021.07/include/dt-bindings/clock/
H A Drk3128-cru.h75 #define PCLK_PWM 350 macro
/dports/sysutils/u-boot-olinuxino-lime2/u-boot-2021.07/include/dt-bindings/clock/
H A Drk3036-cru.h72 #define PCLK_PWM 350 macro
H A Drk3128-cru.h75 #define PCLK_PWM 350 macro
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/include/dt-bindings/clock/
H A Drk3128-cru.h75 #define PCLK_PWM 350 macro
H A Drk3036-cru.h72 #define PCLK_PWM 350 macro
/dports/sysutils/u-boot-wandboard/u-boot-2021.07/include/dt-bindings/clock/
H A Drk3036-cru.h72 #define PCLK_PWM 350 macro
H A Drk3128-cru.h75 #define PCLK_PWM 350 macro
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot/include/dt-bindings/clock/
H A Drk3036-cru.h72 #define PCLK_PWM 350 macro

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