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/dports/lang/parrot/parrot-8.1.0/t/compilers/tge/
H A DNoneGrammar.tg6 transform past (ROOT) :language('PIR') {
15 transform past (op) :language('PIR') {
25 transform past (val) :language('PIR') {
/dports/lang/parrot/parrot-8.1.0/examples/shootout/
H A DREADME.pod7 examples/shootout/README.pod - Readme file for PIR programs for the Computer
12 This README sets out information about the PIR programs for the Computer
27 If you want your PIR program (F<toto.pir>) to be automatically tested (by
/dports/emulators/qemu-utils/qemu-4.2.1/roms/u-boot-sam460ex/drivers/net/
H A Dsh_eth.c55 outl(pir, PIR(port)); in sh_eth_mii_write_phy_bits()
59 outl(pir, PIR(port)); in sh_eth_mii_write_phy_bits()
63 outl(pir, PIR(port)); in sh_eth_mii_write_phy_bits()
71 outl(0, PIR(port)); in sh_eth_mii_bus_release()
74 outl(1, PIR(port)); in sh_eth_mii_bus_release()
77 outl(0, PIR(port)); in sh_eth_mii_bus_release()
84 outl(0, PIR(port)); in sh_eth_mii_ind_bus_release()
96 outl(1, PIR(port)); in sh_eth_mii_read_phy_bits()
99 pir = inl(PIR(port)); in sh_eth_mii_read_phy_bits()
102 outl(0, PIR(port)); in sh_eth_mii_read_phy_bits()
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot-sam460ex/drivers/net/
H A Dsh_eth.c55 outl(pir, PIR(port)); in sh_eth_mii_write_phy_bits()
59 outl(pir, PIR(port)); in sh_eth_mii_write_phy_bits()
63 outl(pir, PIR(port)); in sh_eth_mii_write_phy_bits()
71 outl(0, PIR(port)); in sh_eth_mii_bus_release()
74 outl(1, PIR(port)); in sh_eth_mii_bus_release()
77 outl(0, PIR(port)); in sh_eth_mii_bus_release()
84 outl(0, PIR(port)); in sh_eth_mii_ind_bus_release()
96 outl(1, PIR(port)); in sh_eth_mii_read_phy_bits()
99 pir = inl(PIR(port)); in sh_eth_mii_read_phy_bits()
102 outl(0, PIR(port)); in sh_eth_mii_read_phy_bits()
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/drivers/net/
H A Dsh_eth.c55 outl(pir, PIR(port)); in sh_eth_mii_write_phy_bits()
59 outl(pir, PIR(port)); in sh_eth_mii_write_phy_bits()
63 outl(pir, PIR(port)); in sh_eth_mii_write_phy_bits()
71 outl(0, PIR(port)); in sh_eth_mii_bus_release()
74 outl(1, PIR(port)); in sh_eth_mii_bus_release()
77 outl(0, PIR(port)); in sh_eth_mii_bus_release()
84 outl(0, PIR(port)); in sh_eth_mii_ind_bus_release()
96 outl(1, PIR(port)); in sh_eth_mii_read_phy_bits()
99 pir = inl(PIR(port)); in sh_eth_mii_read_phy_bits()
102 outl(0, PIR(port)); in sh_eth_mii_read_phy_bits()
/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/drivers/net/
H A Dsh_eth.c55 outl(pir, PIR(port)); in sh_eth_mii_write_phy_bits()
59 outl(pir, PIR(port)); in sh_eth_mii_write_phy_bits()
63 outl(pir, PIR(port)); in sh_eth_mii_write_phy_bits()
71 outl(0, PIR(port)); in sh_eth_mii_bus_release()
74 outl(1, PIR(port)); in sh_eth_mii_bus_release()
77 outl(0, PIR(port)); in sh_eth_mii_bus_release()
84 outl(0, PIR(port)); in sh_eth_mii_ind_bus_release()
96 outl(1, PIR(port)); in sh_eth_mii_read_phy_bits()
99 pir = inl(PIR(port)); in sh_eth_mii_read_phy_bits()
102 outl(0, PIR(port)); in sh_eth_mii_read_phy_bits()
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/drivers/net/
H A Dsh_eth.c55 outl(pir, PIR(port)); in sh_eth_mii_write_phy_bits()
59 outl(pir, PIR(port)); in sh_eth_mii_write_phy_bits()
63 outl(pir, PIR(port)); in sh_eth_mii_write_phy_bits()
71 outl(0, PIR(port)); in sh_eth_mii_bus_release()
74 outl(1, PIR(port)); in sh_eth_mii_bus_release()
77 outl(0, PIR(port)); in sh_eth_mii_bus_release()
84 outl(0, PIR(port)); in sh_eth_mii_ind_bus_release()
96 outl(1, PIR(port)); in sh_eth_mii_read_phy_bits()
99 pir = inl(PIR(port)); in sh_eth_mii_read_phy_bits()
102 outl(0, PIR(port)); in sh_eth_mii_read_phy_bits()
/dports/emulators/qemu/qemu-6.2.0/roms/u-boot-sam460ex/drivers/net/
H A Dsh_eth.c55 outl(pir, PIR(port)); in sh_eth_mii_write_phy_bits()
59 outl(pir, PIR(port)); in sh_eth_mii_write_phy_bits()
63 outl(pir, PIR(port)); in sh_eth_mii_write_phy_bits()
71 outl(0, PIR(port)); in sh_eth_mii_bus_release()
74 outl(1, PIR(port)); in sh_eth_mii_bus_release()
77 outl(0, PIR(port)); in sh_eth_mii_bus_release()
84 outl(0, PIR(port)); in sh_eth_mii_ind_bus_release()
96 outl(1, PIR(port)); in sh_eth_mii_read_phy_bits()
99 pir = inl(PIR(port)); in sh_eth_mii_read_phy_bits()
102 outl(0, PIR(port)); in sh_eth_mii_read_phy_bits()
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot-sam460ex/drivers/net/
H A Dsh_eth.c55 outl(pir, PIR(port)); in sh_eth_mii_write_phy_bits()
59 outl(pir, PIR(port)); in sh_eth_mii_write_phy_bits()
63 outl(pir, PIR(port)); in sh_eth_mii_write_phy_bits()
71 outl(0, PIR(port)); in sh_eth_mii_bus_release()
74 outl(1, PIR(port)); in sh_eth_mii_bus_release()
77 outl(0, PIR(port)); in sh_eth_mii_bus_release()
84 outl(0, PIR(port)); in sh_eth_mii_ind_bus_release()
96 outl(1, PIR(port)); in sh_eth_mii_read_phy_bits()
99 pir = inl(PIR(port)); in sh_eth_mii_read_phy_bits()
102 outl(0, PIR(port)); in sh_eth_mii_read_phy_bits()
/dports/misc/gpsim/gpsim-0.31.0/src/
H A Dp16f8x.h99 virtual PIR *get_pir1() in get_pir1()
103 virtual PIR *get_pir2() in get_pir2()
170 virtual PIR *get_pir1() in get_pir1()
174 virtual PIR *get_pir2() in get_pir2()
H A Dp16f88x.h73 PIR *pir1;
75 PIR *pir2;
161 virtual PIR *get_pir1() in get_pir1()
165 virtual PIR *get_pir2() in get_pir2()
295 PIR *pir1;
296 PIR *pir2;
324 virtual PIR *get_pir2() in get_pir2()
328 virtual PIR *get_pir1() in get_pir1()
/dports/devel/p5-Path-Iterator-Rule/Path-Iterator-Rule-1.008/examples/
H A Dmodules-in-inc.pl6 use PIR;
8 my $rule = PIR->new->skip_dirs('.')->perl_module;
/dports/lang/parrot/parrot-8.1.0/ext/nqp-rx/t/nqp/
H A D19-inline.t7 Q:PIR { say 'ok 1' };
8 my $x := Q:PIR { %r = box 'ok 2' };
/dports/lang/parrot/parrot-8.1.0/docs/user/pir/
H A Dobjects.pod50 =begin PIR
64 =end PIR
93 =begin PIR
101 =end PIR
122 =begin PIR
160 =end PIR
196 =begin PIR
222 =end PIR
249 =begin PIR
281 =end PIR
[all …]
/dports/lang/parrot/parrot-8.1.0/docs/pdds/draft/
H A Dpdd29_compiler_tools.pod24 =begin PIR
41 =end PIR
162 high-level language as an alternative for PIR.
184 =item * POST to PIR
194 Perl 6 Rules compiler. This results in a generated PIR file that
213 {{ How do we say that this is not obligatory; you could also use PIR,
223 a HLL program, a POST is much closer to PIR code.
225 =head4 POST to PIR
227 The last transformation generates PIR code from the POST.
229 The generated PIR is then fed into the Parrot executable, and processed
[all …]
/dports/lang/parrot/parrot-8.1.0/docs/book/pct/
H A Dch05_nqp.pod31 written in NQP, although it is possible for them to be written in PIR N<In
33 PIR case here because it's uncommon and needlessly difficult. NQP is the
82 Or you could write a new function in PIR to create a new array from a variadic
87 ... which calls the PIR function:
89 =begin PIR
98 =end PIR
184 =head3 Inline PIR
195 In a PGE rule, the C<{{ }}> double curly brackets demarcate inline-PIR mode.
196 PGE will execute any PIR code in those brackets. You can access C<$/> directly
213 successfully and returns, PCT optimizes and converts that tree into PIR and PBC
/dports/emulators/qemu60/qemu-6.0.0/roms/skiboot/doc/release-notes/
H A Dskiboot-6.0.9.rst39 [ 285.046347408,7] OPAL: Start CPU 0x0843 (PIR 0x0843) -> 0x000000000000a83c
40 [ 285.051160609,7] OPAL: Start CPU 0x0844 (PIR 0x0844) -> 0x000000000000a83c
55 [ 259.401719351,7] OPAL: Start CPU 0x0841 (PIR 0x0841) -> 0x000000000000a83c
56 [ 259.406259572,7] OPAL: Start CPU 0x0842 (PIR 0x0842) -> 0x000000000000a83c
57 [ 259.410615534,7] OPAL: Start CPU 0x0843 (PIR 0x0843) -> 0x000000000000a83c
58 [ 259.415444519,7] OPAL: Start CPU 0x0844 (PIR 0x0844) -> 0x000000000000a83c
70 [ 259.425109779,7] OPAL: Start CPU 0x0845 (PIR 0x0845) -> 0x000000000000a83c
71 [ 259.429870681,7] OPAL: Start CPU 0x0846 (PIR 0x0846) -> 0x000000000000a83c
72 [ 259.434549250,7] OPAL: Start CPU 0x0847 (PIR 0x0847) -> 0x000000000000a83c
/dports/emulators/qemu5/qemu-5.2.0/roms/skiboot/doc/release-notes/
H A Dskiboot-6.0.9.rst39 [ 285.046347408,7] OPAL: Start CPU 0x0843 (PIR 0x0843) -> 0x000000000000a83c
40 [ 285.051160609,7] OPAL: Start CPU 0x0844 (PIR 0x0844) -> 0x000000000000a83c
55 [ 259.401719351,7] OPAL: Start CPU 0x0841 (PIR 0x0841) -> 0x000000000000a83c
56 [ 259.406259572,7] OPAL: Start CPU 0x0842 (PIR 0x0842) -> 0x000000000000a83c
57 [ 259.410615534,7] OPAL: Start CPU 0x0843 (PIR 0x0843) -> 0x000000000000a83c
58 [ 259.415444519,7] OPAL: Start CPU 0x0844 (PIR 0x0844) -> 0x000000000000a83c
70 [ 259.425109779,7] OPAL: Start CPU 0x0845 (PIR 0x0845) -> 0x000000000000a83c
71 [ 259.429870681,7] OPAL: Start CPU 0x0846 (PIR 0x0846) -> 0x000000000000a83c
72 [ 259.434549250,7] OPAL: Start CPU 0x0847 (PIR 0x0847) -> 0x000000000000a83c
/dports/emulators/qemu42/qemu-4.2.1/roms/skiboot/doc/release-notes/
H A Dskiboot-6.0.9.rst39 [ 285.046347408,7] OPAL: Start CPU 0x0843 (PIR 0x0843) -> 0x000000000000a83c
40 [ 285.051160609,7] OPAL: Start CPU 0x0844 (PIR 0x0844) -> 0x000000000000a83c
55 [ 259.401719351,7] OPAL: Start CPU 0x0841 (PIR 0x0841) -> 0x000000000000a83c
56 [ 259.406259572,7] OPAL: Start CPU 0x0842 (PIR 0x0842) -> 0x000000000000a83c
57 [ 259.410615534,7] OPAL: Start CPU 0x0843 (PIR 0x0843) -> 0x000000000000a83c
58 [ 259.415444519,7] OPAL: Start CPU 0x0844 (PIR 0x0844) -> 0x000000000000a83c
70 [ 259.425109779,7] OPAL: Start CPU 0x0845 (PIR 0x0845) -> 0x000000000000a83c
71 [ 259.429870681,7] OPAL: Start CPU 0x0846 (PIR 0x0846) -> 0x000000000000a83c
72 [ 259.434549250,7] OPAL: Start CPU 0x0847 (PIR 0x0847) -> 0x000000000000a83c
/dports/emulators/qemu-utils/qemu-4.2.1/roms/skiboot/doc/release-notes/
H A Dskiboot-6.0.9.rst39 [ 285.046347408,7] OPAL: Start CPU 0x0843 (PIR 0x0843) -> 0x000000000000a83c
40 [ 285.051160609,7] OPAL: Start CPU 0x0844 (PIR 0x0844) -> 0x000000000000a83c
55 [ 259.401719351,7] OPAL: Start CPU 0x0841 (PIR 0x0841) -> 0x000000000000a83c
56 [ 259.406259572,7] OPAL: Start CPU 0x0842 (PIR 0x0842) -> 0x000000000000a83c
57 [ 259.410615534,7] OPAL: Start CPU 0x0843 (PIR 0x0843) -> 0x000000000000a83c
58 [ 259.415444519,7] OPAL: Start CPU 0x0844 (PIR 0x0844) -> 0x000000000000a83c
70 [ 259.425109779,7] OPAL: Start CPU 0x0845 (PIR 0x0845) -> 0x000000000000a83c
71 [ 259.429870681,7] OPAL: Start CPU 0x0846 (PIR 0x0846) -> 0x000000000000a83c
72 [ 259.434549250,7] OPAL: Start CPU 0x0847 (PIR 0x0847) -> 0x000000000000a83c
/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/skiboot/doc/release-notes/
H A Dskiboot-6.0.9.rst39 [ 285.046347408,7] OPAL: Start CPU 0x0843 (PIR 0x0843) -> 0x000000000000a83c
40 [ 285.051160609,7] OPAL: Start CPU 0x0844 (PIR 0x0844) -> 0x000000000000a83c
55 [ 259.401719351,7] OPAL: Start CPU 0x0841 (PIR 0x0841) -> 0x000000000000a83c
56 [ 259.406259572,7] OPAL: Start CPU 0x0842 (PIR 0x0842) -> 0x000000000000a83c
57 [ 259.410615534,7] OPAL: Start CPU 0x0843 (PIR 0x0843) -> 0x000000000000a83c
58 [ 259.415444519,7] OPAL: Start CPU 0x0844 (PIR 0x0844) -> 0x000000000000a83c
70 [ 259.425109779,7] OPAL: Start CPU 0x0845 (PIR 0x0845) -> 0x000000000000a83c
71 [ 259.429870681,7] OPAL: Start CPU 0x0846 (PIR 0x0846) -> 0x000000000000a83c
72 [ 259.434549250,7] OPAL: Start CPU 0x0847 (PIR 0x0847) -> 0x000000000000a83c
/dports/emulators/qemu/qemu-6.2.0/roms/skiboot/doc/release-notes/
H A Dskiboot-6.0.9.rst39 [ 285.046347408,7] OPAL: Start CPU 0x0843 (PIR 0x0843) -> 0x000000000000a83c
40 [ 285.051160609,7] OPAL: Start CPU 0x0844 (PIR 0x0844) -> 0x000000000000a83c
55 [ 259.401719351,7] OPAL: Start CPU 0x0841 (PIR 0x0841) -> 0x000000000000a83c
56 [ 259.406259572,7] OPAL: Start CPU 0x0842 (PIR 0x0842) -> 0x000000000000a83c
57 [ 259.410615534,7] OPAL: Start CPU 0x0843 (PIR 0x0843) -> 0x000000000000a83c
58 [ 259.415444519,7] OPAL: Start CPU 0x0844 (PIR 0x0844) -> 0x000000000000a83c
70 [ 259.425109779,7] OPAL: Start CPU 0x0845 (PIR 0x0845) -> 0x000000000000a83c
71 [ 259.429870681,7] OPAL: Start CPU 0x0846 (PIR 0x0846) -> 0x000000000000a83c
72 [ 259.434549250,7] OPAL: Start CPU 0x0847 (PIR 0x0847) -> 0x000000000000a83c
/dports/lang/parrot/parrot-8.1.0/examples/tutorial/
H A D00_README.pod7 examples/tutorial/00_README.pod - A PIR tutorial.
11 Each of the files in this directory contains valid PIR code and POD
23 always know that they are valid PIR code. You can execute all the tests
/dports/lang/parrot/parrot-8.1.0/docs/book/draft/
H A DchXX_library.pod5 =head1 PIR Standard Library
7 PIR and PASM are both very low-level languages by any programming
9 high-level dynamic languages,and PIR has some symbolic syntax features.
12 tasks easier. Libraries written in PIR or PASM can be easily included
15 PIR/PASM code generators like PCT.
30 mechanism. The C<.loadlib> PIR directive causes the library file to be loaded
62 provides the NCI interface to work with these libraries directly. PIR or
/dports/cad/qelectrotech/qet-0.7.0/elements/10_electric/11_singlepole/500_home_installation/30_architectural/
H A Ddm_pir_us.elmt3 <name lang="en">PIR ultrasonic detector</name>
4 <name lang="fr">Détecteur PIR ultrasons</name>
5 <name lang="it">Sensore PIR + ultrasuoni</name>
7 <name lang="de">PIR-Ulltraschallmelder</name>

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