/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/Transforms/Attributor/IPConstantProp/ |
H A D | openmp_parallel_for.ll | 94 ; IS________OPM-NEXT: [[Q_ADDR:%.*]] = alloca i64, align 8 99 ; IS________OPM-NEXT: store i64 4617315517961601024, i64* [[Q_ADDR]], align 8 100 ; IS________OPM-NEXT: [[CONV:%.*]] = bitcast i64* [[Q_ADDR]] to double* 155 ; IS________NPM-NEXT: [[Q_ADDR:%.*]] = alloca i64, align 8 160 ; IS________NPM-NEXT: store i64 4617315517961601024, i64* [[Q_ADDR]], align 8 161 ; IS________NPM-NEXT: [[CONV:%.*]] = bitcast i64* [[Q_ADDR]] to double*
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/Transforms/Attributor/IPConstantProp/ |
H A D | openmp_parallel_for.ll | 89 ; IS________OPM-NEXT: [[Q_ADDR:%.*]] = alloca i64, align 8 94 ; IS________OPM-NEXT: store i64 4617315517961601024, i64* [[Q_ADDR]], align 8 95 ; IS________OPM-NEXT: [[CONV:%.*]] = bitcast i64* [[Q_ADDR]] to double* 150 ; IS________NPM-NEXT: [[Q_ADDR:%.*]] = alloca i64, align 8 155 ; IS________NPM-NEXT: store i64 4617315517961601024, i64* [[Q_ADDR]], align 8 156 ; IS________NPM-NEXT: [[CONV:%.*]] = bitcast i64* [[Q_ADDR]] to double*
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/Transforms/Attributor/IPConstantProp/ |
H A D | openmp_parallel_for.ll | 94 ; IS________OPM-NEXT: [[Q_ADDR:%.*]] = alloca i64, align 8 99 ; IS________OPM-NEXT: store i64 4617315517961601024, i64* [[Q_ADDR]], align 8 100 ; IS________OPM-NEXT: [[CONV:%.*]] = bitcast i64* [[Q_ADDR]] to double* 155 ; IS________NPM-NEXT: [[Q_ADDR:%.*]] = alloca i64, align 8 160 ; IS________NPM-NEXT: store i64 4617315517961601024, i64* [[Q_ADDR]], align 8 161 ; IS________NPM-NEXT: [[CONV:%.*]] = bitcast i64* [[Q_ADDR]] to double*
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/Transforms/Attributor/IPConstantProp/ |
H A D | openmp_parallel_for.ll | 89 ; IS________OPM-NEXT: [[Q_ADDR:%.*]] = alloca i64, align 8 94 ; IS________OPM-NEXT: store i64 4617315517961601024, i64* [[Q_ADDR]], align 8 95 ; IS________OPM-NEXT: [[CONV:%.*]] = bitcast i64* [[Q_ADDR]] to double* 150 ; IS________NPM-NEXT: [[Q_ADDR:%.*]] = alloca i64, align 8 155 ; IS________NPM-NEXT: store i64 4617315517961601024, i64* [[Q_ADDR]], align 8 156 ; IS________NPM-NEXT: [[CONV:%.*]] = bitcast i64* [[Q_ADDR]] to double*
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/Transforms/Attributor/IPConstantProp/ |
H A D | openmp_parallel_for.ll | 94 ; IS________OPM-NEXT: [[Q_ADDR:%.*]] = alloca i64, align 8 99 ; IS________OPM-NEXT: store i64 4617315517961601024, i64* [[Q_ADDR]], align 8 100 ; IS________OPM-NEXT: [[CONV:%.*]] = bitcast i64* [[Q_ADDR]] to double* 155 ; IS________NPM-NEXT: [[Q_ADDR:%.*]] = alloca i64, align 8 160 ; IS________NPM-NEXT: store i64 4617315517961601024, i64* [[Q_ADDR]], align 8 161 ; IS________NPM-NEXT: [[CONV:%.*]] = bitcast i64* [[Q_ADDR]] to double*
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/Transforms/Attributor/IPConstantProp/ |
H A D | openmp_parallel_for.ll | 94 ; IS________OPM-NEXT: [[Q_ADDR:%.*]] = alloca i64, align 8 99 ; IS________OPM-NEXT: store i64 4617315517961601024, i64* [[Q_ADDR]], align 8 100 ; IS________OPM-NEXT: [[CONV:%.*]] = bitcast i64* [[Q_ADDR]] to double* 155 ; IS________NPM-NEXT: [[Q_ADDR:%.*]] = alloca i64, align 8 160 ; IS________NPM-NEXT: store i64 4617315517961601024, i64* [[Q_ADDR]], align 8 161 ; IS________NPM-NEXT: [[CONV:%.*]] = bitcast i64* [[Q_ADDR]] to double*
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/dports/devel/llvm-devel/llvm-project-f05c95f10fc1d8171071735af8ad3a9e87633120/llvm/test/Transforms/SCCP/ |
H A D | openmp_parallel_for.ll | 51 ; CHECK-NEXT: [[Q_ADDR:%.*]] = alloca i64, align 8 56 ; CHECK-NEXT: store i64 [[Q:%.*]], i64* [[Q_ADDR]], align 8 57 ; CHECK-NEXT: [[CONV:%.*]] = bitcast i64* [[Q_ADDR]] to double*
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/dports/devel/wasi-compiler-rt13/llvm-project-13.0.1.src/llvm/test/Transforms/SCCP/ |
H A D | openmp_parallel_for.ll | 51 ; CHECK-NEXT: [[Q_ADDR:%.*]] = alloca i64, align 8 56 ; CHECK-NEXT: store i64 [[Q:%.*]], i64* [[Q_ADDR]], align 8 57 ; CHECK-NEXT: [[CONV:%.*]] = bitcast i64* [[Q_ADDR]] to double*
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/dports/www/chromium-legacy/chromium-88.0.4324.182/third_party/llvm/llvm/test/Transforms/SCCP/ |
H A D | openmp_parallel_for.ll | 51 ; CHECK-NEXT: [[Q_ADDR:%.*]] = alloca i64, align 8 56 ; CHECK-NEXT: store i64 [[Q:%.*]], i64* [[Q_ADDR]], align 8 57 ; CHECK-NEXT: [[CONV:%.*]] = bitcast i64* [[Q_ADDR]] to double*
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/dports/devel/wasi-compiler-rt12/llvm-project-12.0.1.src/llvm/test/Transforms/SCCP/ |
H A D | openmp_parallel_for.ll | 51 ; CHECK-NEXT: [[Q_ADDR:%.*]] = alloca i64, align 8 56 ; CHECK-NEXT: store i64 [[Q:%.*]], i64* [[Q_ADDR]], align 8 57 ; CHECK-NEXT: [[CONV:%.*]] = bitcast i64* [[Q_ADDR]] to double*
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/dports/devel/wasi-libcxx/llvm-project-13.0.1.src/llvm/test/Transforms/SCCP/ |
H A D | openmp_parallel_for.ll | 51 ; CHECK-NEXT: [[Q_ADDR:%.*]] = alloca i64, align 8 56 ; CHECK-NEXT: store i64 [[Q:%.*]], i64* [[Q_ADDR]], align 8 57 ; CHECK-NEXT: [[CONV:%.*]] = bitcast i64* [[Q_ADDR]] to double*
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/dports/devel/llvm12/llvm-project-12.0.1.src/llvm/test/Transforms/SCCP/ |
H A D | openmp_parallel_for.ll | 51 ; CHECK-NEXT: [[Q_ADDR:%.*]] = alloca i64, align 8 56 ; CHECK-NEXT: store i64 [[Q:%.*]], i64* [[Q_ADDR]], align 8 57 ; CHECK-NEXT: [[CONV:%.*]] = bitcast i64* [[Q_ADDR]] to double*
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/dports/graphics/llvm-mesa/llvm-13.0.1.src/test/Transforms/SCCP/ |
H A D | openmp_parallel_for.ll | 51 ; CHECK-NEXT: [[Q_ADDR:%.*]] = alloca i64, align 8 56 ; CHECK-NEXT: store i64 [[Q:%.*]], i64* [[Q_ADDR]], align 8 57 ; CHECK-NEXT: [[CONV:%.*]] = bitcast i64* [[Q_ADDR]] to double*
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/dports/devel/llvm13/llvm-project-13.0.1.src/llvm/test/Transforms/SCCP/ |
H A D | openmp_parallel_for.ll | 51 ; CHECK-NEXT: [[Q_ADDR:%.*]] = alloca i64, align 8 56 ; CHECK-NEXT: store i64 [[Q:%.*]], i64* [[Q_ADDR]], align 8 57 ; CHECK-NEXT: [[CONV:%.*]] = bitcast i64* [[Q_ADDR]] to double*
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/dports/multimedia/v4l_compat/linux-5.13-rc2/drivers/net/ethernet/marvell/ |
H A D | skge.c | 2521 skge_write32(hw, Q_ADDR(q, Q_CSR), CSR_CLR_RESET); in skge_qset() 2522 skge_write32(hw, Q_ADDR(q, Q_F), watermark); in skge_qset() 2523 skge_write32(hw, Q_ADDR(q, Q_DA_H), (u32)(base >> 32)); in skge_qset() 2524 skge_write32(hw, Q_ADDR(q, Q_DA_L), (u32)base); in skge_qset() 2639 skge_write8(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_STOP); in skge_rx_stop() 2642 skge_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_SET_RESET); in skge_rx_stop() 2680 skge_write8(hw, Q_ADDR(txqaddr[port], Q_CSR), CSR_STOP); in skge_down() 2694 skge_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), CSR_SET_RESET); in skge_down() 2818 skge_write8(hw, Q_ADDR(txqaddr[skge->port], Q_CSR), CSR_START); in skge_xmit_frame() 3201 skge_write8(hw, Q_ADDR(rxqaddr[skge->port], Q_CSR), CSR_IRQ_CL_F); in skge_poll() [all …]
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/dports/multimedia/v4l-utils/linux-5.13-rc2/drivers/net/ethernet/marvell/ |
H A D | skge.c | 2521 skge_write32(hw, Q_ADDR(q, Q_CSR), CSR_CLR_RESET); in skge_qset() 2522 skge_write32(hw, Q_ADDR(q, Q_F), watermark); in skge_qset() 2523 skge_write32(hw, Q_ADDR(q, Q_DA_H), (u32)(base >> 32)); in skge_qset() 2524 skge_write32(hw, Q_ADDR(q, Q_DA_L), (u32)base); in skge_qset() 2639 skge_write8(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_STOP); in skge_rx_stop() 2642 skge_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_SET_RESET); in skge_rx_stop() 2680 skge_write8(hw, Q_ADDR(txqaddr[port], Q_CSR), CSR_STOP); in skge_down() 2694 skge_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), CSR_SET_RESET); in skge_down() 2818 skge_write8(hw, Q_ADDR(txqaddr[skge->port], Q_CSR), CSR_START); in skge_xmit_frame() 3201 skge_write8(hw, Q_ADDR(rxqaddr[skge->port], Q_CSR), CSR_IRQ_CL_F); in skge_poll() [all …]
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/dports/multimedia/libv4l/linux-5.13-rc2/drivers/net/ethernet/marvell/ |
H A D | skge.c | 2521 skge_write32(hw, Q_ADDR(q, Q_CSR), CSR_CLR_RESET); in skge_qset() 2522 skge_write32(hw, Q_ADDR(q, Q_F), watermark); in skge_qset() 2523 skge_write32(hw, Q_ADDR(q, Q_DA_H), (u32)(base >> 32)); in skge_qset() 2524 skge_write32(hw, Q_ADDR(q, Q_DA_L), (u32)base); in skge_qset() 2639 skge_write8(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_STOP); in skge_rx_stop() 2642 skge_write32(hw, Q_ADDR(rxqaddr[port], Q_CSR), CSR_SET_RESET); in skge_rx_stop() 2680 skge_write8(hw, Q_ADDR(txqaddr[port], Q_CSR), CSR_STOP); in skge_down() 2694 skge_write32(hw, Q_ADDR(txqaddr[port], Q_CSR), CSR_SET_RESET); in skge_down() 2818 skge_write8(hw, Q_ADDR(txqaddr[skge->port], Q_CSR), CSR_START); in skge_xmit_frame() 3201 skge_write8(hw, Q_ADDR(rxqaddr[skge->port], Q_CSR), CSR_IRQ_CL_F); in skge_poll() [all …]
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/dports/emulators/qemu60/qemu-6.0.0/roms/ipxe/src/drivers/net/ |
H A D | sky2.h | 648 #define Q_ADDR(reg, offs) (B8_Q_REGS + (reg) + (offs)) macro
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/dports/emulators/qemu42/qemu-4.2.1/roms/ipxe/src/drivers/net/ |
H A D | sky2.h | 648 #define Q_ADDR(reg, offs) (B8_Q_REGS + (reg) + (offs)) macro
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/dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/ipxe/src/drivers/net/ |
H A D | sky2.h | 648 #define Q_ADDR(reg, offs) (B8_Q_REGS + (reg) + (offs)) macro
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/dports/emulators/qemu-utils/qemu-4.2.1/roms/ipxe/src/drivers/net/ |
H A D | sky2.h | 648 #define Q_ADDR(reg, offs) (B8_Q_REGS + (reg) + (offs)) macro
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/dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/ipxe/src/drivers/net/ |
H A D | sky2.h | 648 #define Q_ADDR(reg, offs) (B8_Q_REGS + (reg) + (offs)) macro
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/dports/sysutils/syslinux/syslinux-6.03/gpxe/src/drivers/net/ |
H A D | sky2.h | 648 #define Q_ADDR(reg, offs) (B8_Q_REGS + (reg) + (offs)) macro
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/dports/emulators/qemu5/qemu-5.2.0/roms/ipxe/src/drivers/net/ |
H A D | sky2.h | 648 #define Q_ADDR(reg, offs) (B8_Q_REGS + (reg) + (offs)) macro
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/dports/net/ipxe/ipxe-2265a65/src/drivers/net/ |
H A D | sky2.h | 648 #define Q_ADDR(reg, offs) (B8_Q_REGS + (reg) + (offs)) macro
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