Home
last modified time | relevance | path

Searched refs:REG_R0 (Results 251 – 275 of 443) sorted by relevance

1...<<1112131415161718

/dports/devel/avr-gcc/gcc-10.2.0/gcc/config/bfin/
H A Dbfin.c274 for (i = REG_R7 + 1; i-- != REG_R0;) in n_dregs_to_save()
398 for (dregno = REG_R0; ndregs != ndregs_consec; dregno++) in expand_prologue_reg_save()
982 rtx r0reg = gen_rtx_REG (SImode, REG_R0); in expand_interrupt_handler_prologue()
3049 first_dreg_to_save = lastdreg = regno - REG_R0; in analyze_push_multiple_operation()
3069 else if (regno != REG_R0 + lastdreg + 1) in analyze_push_multiple_operation()
3133 if (regno != REG_R0 + lastdreg - 1) in analyze_pop_multiple_operation()
4967 rtx this_rtx = gen_rtx_REG (Pmode, REG_R0); in bfin_output_mi_thunk()
/dports/lang/gcc11-devel/gcc-11-20211009/gcc/config/bfin/
H A Dbfin.c274 for (i = REG_R7 + 1; i-- != REG_R0;) in n_dregs_to_save()
398 for (dregno = REG_R0; ndregs != ndregs_consec; dregno++) in expand_prologue_reg_save()
982 rtx r0reg = gen_rtx_REG (SImode, REG_R0); in expand_interrupt_handler_prologue()
3049 first_dreg_to_save = lastdreg = regno - REG_R0; in analyze_push_multiple_operation()
3069 else if (regno != REG_R0 + lastdreg + 1) in analyze_push_multiple_operation()
3133 if (regno != REG_R0 + lastdreg - 1) in analyze_pop_multiple_operation()
4967 rtx this_rtx = gen_rtx_REG (Pmode, REG_R0); in bfin_output_mi_thunk()
/dports/lang/gcc48/gcc-4.8.5/gcc/config/bfin/
H A Dbfin.c274 for (i = REG_R7 + 1; i-- != REG_R0;) in n_dregs_to_save()
400 for (dregno = REG_R0; ndregs != ndregs_consec; dregno++) in expand_prologue_reg_save()
984 rtx r0reg = gen_rtx_REG (SImode, REG_R0); in expand_interrupt_handler_prologue()
3026 first_dreg_to_save = lastdreg = regno - REG_R0; in push_multiple_operation()
3046 else if (regno != REG_R0 + lastdreg + 1) in push_multiple_operation()
3110 if (regno != REG_R0 + lastdreg - 1) in pop_multiple_operation()
4909 rtx this_rtx = gen_rtx_REG (Pmode, REG_R0); in bfin_output_mi_thunk()
/dports/lang/gcc10-devel/gcc-10-20211008/gcc/config/bfin/
H A Dbfin.c274 for (i = REG_R7 + 1; i-- != REG_R0;) in n_dregs_to_save()
398 for (dregno = REG_R0; ndregs != ndregs_consec; dregno++) in expand_prologue_reg_save()
982 rtx r0reg = gen_rtx_REG (SImode, REG_R0); in expand_interrupt_handler_prologue()
3049 first_dreg_to_save = lastdreg = regno - REG_R0; in analyze_push_multiple_operation()
3069 else if (regno != REG_R0 + lastdreg + 1) in analyze_push_multiple_operation()
3133 if (regno != REG_R0 + lastdreg - 1) in analyze_pop_multiple_operation()
4967 rtx this_rtx = gen_rtx_REG (Pmode, REG_R0); in bfin_output_mi_thunk()
/dports/lang/gcc12-devel/gcc-12-20211205/gcc/config/bfin/
H A Dbfin.c275 for (i = REG_R7 + 1; i-- != REG_R0;) in n_dregs_to_save()
399 for (dregno = REG_R0; ndregs != ndregs_consec; dregno++) in expand_prologue_reg_save()
983 rtx r0reg = gen_rtx_REG (SImode, REG_R0); in expand_interrupt_handler_prologue()
3050 first_dreg_to_save = lastdreg = regno - REG_R0; in analyze_push_multiple_operation()
3070 else if (regno != REG_R0 + lastdreg + 1) in analyze_push_multiple_operation()
3134 if (regno != REG_R0 + lastdreg - 1) in analyze_pop_multiple_operation()
4968 rtx this_rtx = gen_rtx_REG (Pmode, REG_R0); in bfin_output_mi_thunk()
/dports/devel/mingw32-gcc/gcc-4.8.1/gcc/config/bfin/
H A Dbfin.c274 for (i = REG_R7 + 1; i-- != REG_R0;) in n_dregs_to_save()
400 for (dregno = REG_R0; ndregs != ndregs_consec; dregno++) in expand_prologue_reg_save()
984 rtx r0reg = gen_rtx_REG (SImode, REG_R0); in expand_interrupt_handler_prologue()
3026 first_dreg_to_save = lastdreg = regno - REG_R0; in push_multiple_operation()
3046 else if (regno != REG_R0 + lastdreg + 1) in push_multiple_operation()
3110 if (regno != REG_R0 + lastdreg - 1) in pop_multiple_operation()
4909 rtx this_rtx = gen_rtx_REG (Pmode, REG_R0); in bfin_output_mi_thunk()
/dports/devel/riscv32-unknown-elf-gcc/gcc-8.4.0/gcc/config/bfin/
H A Dbfin.c274 for (i = REG_R7 + 1; i-- != REG_R0;) in n_dregs_to_save()
398 for (dregno = REG_R0; ndregs != ndregs_consec; dregno++) in expand_prologue_reg_save()
983 rtx r0reg = gen_rtx_REG (SImode, REG_R0); in expand_interrupt_handler_prologue()
3061 first_dreg_to_save = lastdreg = regno - REG_R0; in analyze_push_multiple_operation()
3081 else if (regno != REG_R0 + lastdreg + 1) in analyze_push_multiple_operation()
3145 if (regno != REG_R0 + lastdreg - 1) in analyze_pop_multiple_operation()
4978 rtx this_rtx = gen_rtx_REG (Pmode, REG_R0); in bfin_output_mi_thunk()
/dports/lang/gcc11/gcc-11.2.0/gcc/config/bfin/
H A Dbfin.c274 for (i = REG_R7 + 1; i-- != REG_R0;)
398 for (dregno = REG_R0; ndregs != ndregs_consec; dregno++)
982 rtx r0reg = gen_rtx_REG (SImode, REG_R0);
3049 first_dreg_to_save = lastdreg = regno - REG_R0;
3069 else if (regno != REG_R0 + lastdreg + 1)
3133 if (regno != REG_R0 + lastdreg - 1)
4967 rtx this_rtx = gen_rtx_REG (Pmode, REG_R0);
/dports/devel/arm-none-eabi-gcc492/gcc-4.9.2/gcc/config/bfin/
H A Dbfin.c277 for (i = REG_R7 + 1; i-- != REG_R0;) in n_dregs_to_save()
403 for (dregno = REG_R0; ndregs != ndregs_consec; dregno++) in expand_prologue_reg_save()
987 rtx r0reg = gen_rtx_REG (SImode, REG_R0); in expand_interrupt_handler_prologue()
3029 first_dreg_to_save = lastdreg = regno - REG_R0; in analyze_push_multiple_operation()
3049 else if (regno != REG_R0 + lastdreg + 1) in analyze_push_multiple_operation()
3113 if (regno != REG_R0 + lastdreg - 1) in analyze_pop_multiple_operation()
4935 rtx this_rtx = gen_rtx_REG (Pmode, REG_R0); in bfin_output_mi_thunk()
/dports/devel/riscv64-none-elf-gcc/gcc-8.4.0/gcc/config/bfin/
H A Dbfin.c274 for (i = REG_R7 + 1; i-- != REG_R0;) in n_dregs_to_save()
398 for (dregno = REG_R0; ndregs != ndregs_consec; dregno++) in expand_prologue_reg_save()
983 rtx r0reg = gen_rtx_REG (SImode, REG_R0); in expand_interrupt_handler_prologue()
3061 first_dreg_to_save = lastdreg = regno - REG_R0; in analyze_push_multiple_operation()
3081 else if (regno != REG_R0 + lastdreg + 1) in analyze_push_multiple_operation()
3145 if (regno != REG_R0 + lastdreg - 1) in analyze_pop_multiple_operation()
4978 rtx this_rtx = gen_rtx_REG (Pmode, REG_R0); in bfin_output_mi_thunk()
/dports/devel/riscv64-gcc/gcc-8.3.0/gcc/config/bfin/
H A Dbfin.c274 for (i = REG_R7 + 1; i-- != REG_R0;) in n_dregs_to_save()
398 for (dregno = REG_R0; ndregs != ndregs_consec; dregno++) in expand_prologue_reg_save()
983 rtx r0reg = gen_rtx_REG (SImode, REG_R0); in expand_interrupt_handler_prologue()
3061 first_dreg_to_save = lastdreg = regno - REG_R0; in analyze_push_multiple_operation()
3081 else if (regno != REG_R0 + lastdreg + 1) in analyze_push_multiple_operation()
3145 if (regno != REG_R0 + lastdreg - 1) in analyze_pop_multiple_operation()
4978 rtx this_rtx = gen_rtx_REG (Pmode, REG_R0); in bfin_output_mi_thunk()
/dports/misc/cxx_atomics_pic/gcc-11.2.0/gcc/config/bfin/
H A Dbfin.c274 for (i = REG_R7 + 1; i-- != REG_R0;) in n_dregs_to_save()
398 for (dregno = REG_R0; ndregs != ndregs_consec; dregno++) in expand_prologue_reg_save()
982 rtx r0reg = gen_rtx_REG (SImode, REG_R0); in expand_interrupt_handler_prologue()
3049 first_dreg_to_save = lastdreg = regno - REG_R0; in analyze_push_multiple_operation()
3069 else if (regno != REG_R0 + lastdreg + 1) in analyze_push_multiple_operation()
3133 if (regno != REG_R0 + lastdreg - 1) in analyze_pop_multiple_operation()
4967 rtx this_rtx = gen_rtx_REG (Pmode, REG_R0); in bfin_output_mi_thunk()
/dports/lang/gcc9-aux/gcc-9.1.0/gcc/config/bfin/
H A Dbfin.c274 for (i = REG_R7 + 1; i-- != REG_R0;) in n_dregs_to_save()
398 for (dregno = REG_R0; ndregs != ndregs_consec; dregno++) in expand_prologue_reg_save()
983 rtx r0reg = gen_rtx_REG (SImode, REG_R0); in expand_interrupt_handler_prologue()
3064 first_dreg_to_save = lastdreg = regno - REG_R0; in analyze_push_multiple_operation()
3084 else if (regno != REG_R0 + lastdreg + 1) in analyze_push_multiple_operation()
3148 if (regno != REG_R0 + lastdreg - 1) in analyze_pop_multiple_operation()
4981 rtx this_rtx = gen_rtx_REG (Pmode, REG_R0); in bfin_output_mi_thunk()
/dports/lang/gcc10/gcc-10.3.0/gcc/config/bfin/
H A Dbfin.c274 for (i = REG_R7 + 1; i-- != REG_R0;) in n_dregs_to_save()
398 for (dregno = REG_R0; ndregs != ndregs_consec; dregno++) in expand_prologue_reg_save()
982 rtx r0reg = gen_rtx_REG (SImode, REG_R0); in expand_interrupt_handler_prologue()
3049 first_dreg_to_save = lastdreg = regno - REG_R0; in analyze_push_multiple_operation()
3069 else if (regno != REG_R0 + lastdreg + 1) in analyze_push_multiple_operation()
3133 if (regno != REG_R0 + lastdreg - 1) in analyze_pop_multiple_operation()
4967 rtx this_rtx = gen_rtx_REG (Pmode, REG_R0); in bfin_output_mi_thunk()
/dports/lang/gcc8/gcc-8.5.0/gcc/config/bfin/
H A Dbfin.c274 for (i = REG_R7 + 1; i-- != REG_R0;) in n_dregs_to_save()
398 for (dregno = REG_R0; ndregs != ndregs_consec; dregno++) in expand_prologue_reg_save()
983 rtx r0reg = gen_rtx_REG (SImode, REG_R0); in expand_interrupt_handler_prologue()
3061 first_dreg_to_save = lastdreg = regno - REG_R0; in analyze_push_multiple_operation()
3081 else if (regno != REG_R0 + lastdreg + 1) in analyze_push_multiple_operation()
3145 if (regno != REG_R0 + lastdreg - 1) in analyze_pop_multiple_operation()
4978 rtx this_rtx = gen_rtx_REG (Pmode, REG_R0); in bfin_output_mi_thunk()
/dports/lang/gcc9-devel/gcc-9-20211007/gcc/config/bfin/
H A Dbfin.c274 for (i = REG_R7 + 1; i-- != REG_R0;) in n_dregs_to_save()
398 for (dregno = REG_R0; ndregs != ndregs_consec; dregno++) in expand_prologue_reg_save()
983 rtx r0reg = gen_rtx_REG (SImode, REG_R0); in expand_interrupt_handler_prologue()
3064 first_dreg_to_save = lastdreg = regno - REG_R0; in analyze_push_multiple_operation()
3084 else if (regno != REG_R0 + lastdreg + 1) in analyze_push_multiple_operation()
3148 if (regno != REG_R0 + lastdreg - 1) in analyze_pop_multiple_operation()
4981 rtx this_rtx = gen_rtx_REG (Pmode, REG_R0); in bfin_output_mi_thunk()
/dports/lang/gcc6-aux/gcc-6-20180516/gcc/config/bfin/
H A Dbfin.c269 for (i = REG_R7 + 1; i-- != REG_R0;) in n_dregs_to_save()
393 for (dregno = REG_R0; ndregs != ndregs_consec; dregno++) in expand_prologue_reg_save()
978 rtx r0reg = gen_rtx_REG (SImode, REG_R0); in expand_interrupt_handler_prologue()
3027 first_dreg_to_save = lastdreg = regno - REG_R0; in analyze_push_multiple_operation()
3047 else if (regno != REG_R0 + lastdreg + 1) in analyze_push_multiple_operation()
3111 if (regno != REG_R0 + lastdreg - 1) in analyze_pop_multiple_operation()
4944 rtx this_rtx = gen_rtx_REG (Pmode, REG_R0); in bfin_output_mi_thunk()
/dports/devel/cargo-c/cargo-c-0.9.6+cargo-0.58/cargo-crates/libc-0.2.111/src/unix/linux_like/android/b32/
H A Darm.rs506 pub const REG_R0: ::c_int = 0; const
/dports/misc/broot/broot-1.7.0/cargo-crates/libc-0.2.98/src/unix/linux_like/android/b32/
H A Darm.rs506 pub const REG_R0: ::c_int = 0; const
/dports/devel/stylua/StyLua-0.11.0/cargo-crates/libc-0.2.102/src/unix/linux_like/android/b32/
H A Darm.rs506 pub const REG_R0: ::c_int = 0; const
/dports/multimedia/gstreamer1-plugins-rust/gst-plugins-rs-d0466b3eee114207f851b37cae0015c0e718f021/cargo-crates/libc-0.2.101/src/unix/linux_like/android/b32/
H A Darm.rs506 pub const REG_R0: ::c_int = 0; const
/dports/devel/rust-bindgen/bindgen-0.59.2/cargo-crates/libc-0.2.98/src/unix/linux_like/android/b32/
H A Darm.rs506 pub const REG_R0: ::c_int = 0; const
/dports/security/vaultwarden/vaultwarden-1.23.1/cargo-crates/libc-0.2.108/src/unix/linux_like/android/b32/
H A Darm.rs506 pub const REG_R0: ::c_int = 0; const
/dports/devel/rust-analyzer/rust-analyzer-2021-12-20/cargo-crates/libc-0.2.112/src/unix/linux_like/android/b32/
H A Darm.rs506 pub const REG_R0: ::c_int = 0; const
/dports/lang/gleam/gleam-0.18.2/cargo-crates/libc-0.2.111/src/unix/linux_like/android/b32/
H A Darm.rs506 pub const REG_R0: ::c_int = 0; const

1...<<1112131415161718