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Searched refs:SRDS_PLLCR0_RFCK_SEL_161_13 (Results 176 – 200 of 328) sorted by relevance

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/dports/sysutils/u-boot-utilite/u-boot-2015.07/board/freescale/t4qds/
H A Dt4240qds.c667 actual[i] = SRDS_PLLCR0_RFCK_SEL_161_13; in misc_init_r()
/dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/powerpc/cpu/mpc85xx/
H A Dfsl_corenet_serdes.c882 case SRDS_PLLCR0_RFCK_SEL_161_13: in serdes_clock_to_string()
/dports/sysutils/u-boot-beaglebone/u-boot-2021.07/arch/powerpc/cpu/mpc85xx/
H A Dfsl_corenet_serdes.c882 case SRDS_PLLCR0_RFCK_SEL_161_13: in serdes_clock_to_string()
/dports/sysutils/u-boot-tools/u-boot-2020.07/arch/powerpc/cpu/mpc85xx/
H A Dfsl_corenet_serdes.c882 case SRDS_PLLCR0_RFCK_SEL_161_13: in serdes_clock_to_string()
/dports/sysutils/u-boot-bananapim2/u-boot-2021.07/arch/powerpc/cpu/mpc85xx/
H A Dfsl_corenet_serdes.c882 case SRDS_PLLCR0_RFCK_SEL_161_13: in serdes_clock_to_string()
/dports/sysutils/u-boot-rockpro64/u-boot-2021.07/arch/powerpc/cpu/mpc85xx/
H A Dfsl_corenet_serdes.c882 case SRDS_PLLCR0_RFCK_SEL_161_13: in serdes_clock_to_string()
/dports/sysutils/u-boot-sifive-fu540/u-boot-2021.07/arch/powerpc/cpu/mpc85xx/
H A Dfsl_corenet_serdes.c882 case SRDS_PLLCR0_RFCK_SEL_161_13: in serdes_clock_to_string()
/dports/sysutils/u-boot-rpi4/u-boot-2021.07/arch/powerpc/cpu/mpc85xx/
H A Dfsl_corenet_serdes.c882 case SRDS_PLLCR0_RFCK_SEL_161_13: in serdes_clock_to_string()
/dports/sysutils/u-boot-rpi3-32/u-boot-2021.07/arch/powerpc/cpu/mpc85xx/
H A Dfsl_corenet_serdes.c882 case SRDS_PLLCR0_RFCK_SEL_161_13: in serdes_clock_to_string()
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/board/freescale/t4qds/
H A Dt4240qds.c660 actual[i] = SRDS_PLLCR0_RFCK_SEL_161_13; in misc_init_r()
/dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/arch/powerpc/cpu/mpc85xx/
H A Dfsl_corenet_serdes.c878 case SRDS_PLLCR0_RFCK_SEL_161_13: in serdes_clock_to_string()
/dports/sysutils/u-boot-qemu-riscv64/u-boot-2021.07/arch/powerpc/cpu/mpc85xx/
H A Dfsl_corenet_serdes.c882 case SRDS_PLLCR0_RFCK_SEL_161_13: in serdes_clock_to_string()
/dports/sysutils/u-boot-qemu-arm/u-boot-2021.07/arch/powerpc/cpu/mpc85xx/
H A Dfsl_corenet_serdes.c882 case SRDS_PLLCR0_RFCK_SEL_161_13: in serdes_clock_to_string()
/dports/sysutils/u-boot-rpi/u-boot-2021.07/arch/powerpc/cpu/mpc85xx/
H A Dfsl_corenet_serdes.c882 case SRDS_PLLCR0_RFCK_SEL_161_13: in serdes_clock_to_string()
/dports/sysutils/u-boot-rpi-arm64/u-boot-2021.07/arch/powerpc/cpu/mpc85xx/
H A Dfsl_corenet_serdes.c882 case SRDS_PLLCR0_RFCK_SEL_161_13: in serdes_clock_to_string()
/dports/sysutils/u-boot-rpi2/u-boot-2021.07/arch/powerpc/cpu/mpc85xx/
H A Dfsl_corenet_serdes.c882 case SRDS_PLLCR0_RFCK_SEL_161_13: in serdes_clock_to_string()
/dports/sysutils/u-boot-riotboard/u-boot-2021.07/arch/powerpc/cpu/mpc85xx/
H A Dfsl_corenet_serdes.c882 case SRDS_PLLCR0_RFCK_SEL_161_13: in serdes_clock_to_string()
/dports/sysutils/u-boot-rpi3/u-boot-2021.07/arch/powerpc/cpu/mpc85xx/
H A Dfsl_corenet_serdes.c882 case SRDS_PLLCR0_RFCK_SEL_161_13: in serdes_clock_to_string()
/dports/sysutils/u-boot-rock-pi-4/u-boot-2021.07/arch/powerpc/cpu/mpc85xx/
H A Dfsl_corenet_serdes.c882 case SRDS_PLLCR0_RFCK_SEL_161_13: in serdes_clock_to_string()
/dports/sysutils/u-boot-rock64/u-boot-2021.07/arch/powerpc/cpu/mpc85xx/
H A Dfsl_corenet_serdes.c882 case SRDS_PLLCR0_RFCK_SEL_161_13: in serdes_clock_to_string()
/dports/sysutils/u-boot-tools/u-boot-2020.07/board/freescale/t4qds/
H A Dt4240qds.c700 actual[i] = SRDS_PLLCR0_RFCK_SEL_161_13; in misc_init_r()
/dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
H A Dimmap_lsch2.h570 #define SRDS_PLLCR0_RFCK_SEL_161_13 0x40000000 macro
/dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/include/asm/arch-fsl-layerscape/
H A Dimmap_lsch2.h570 #define SRDS_PLLCR0_RFCK_SEL_161_13 0x40000000 macro
/dports/sysutils/u-boot-olinuxino-lime/u-boot-2021.07/arch/arm/include/asm/arch-fsl-layerscape/
H A Dimmap_lsch2.h580 #define SRDS_PLLCR0_RFCK_SEL_161_13 0x40000000 macro
/dports/sysutils/u-boot-olinuxino-lime2-emmc/u-boot-2021.07/arch/arm/include/asm/arch-fsl-layerscape/
H A Dimmap_lsch2.h580 #define SRDS_PLLCR0_RFCK_SEL_161_13 0x40000000 macro

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