| /dports/emulators/qemu60/qemu-6.0.0/roms/u-boot/arch/arm/mach-omap2/ |
| H A D | timer.c | 41 writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST, in timer_init()
|
| /dports/sysutils/u-boot-pinebook/u-boot-2021.07/arch/arm/include/asm/arch-omap4/ |
| H A D | cpu.h | 59 #define TCLR_PRE (0x1 << 5) macro
|
| /dports/sysutils/u-boot-rpi/u-boot-2021.07/arch/arm/include/asm/arch-omap4/ |
| H A D | cpu.h | 59 #define TCLR_PRE (0x1 << 5) macro
|
| /dports/sysutils/u-boot-qemu-riscv64/u-boot-2021.07/arch/arm/mach-omap2/ |
| H A D | timer.c | 45 writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST, in timer_init()
|
| /dports/sysutils/u-boot-qemu-riscv64/u-boot-2021.07/arch/arm/include/asm/arch-omap4/ |
| H A D | cpu.h | 59 #define TCLR_PRE (0x1 << 5) macro
|
| /dports/sysutils/u-boot-qemu-arm/u-boot-2021.07/arch/arm/include/asm/arch-omap4/ |
| H A D | cpu.h | 59 #define TCLR_PRE (0x1 << 5) macro
|
| /dports/sysutils/u-boot-rpi/u-boot-2021.07/arch/arm/mach-omap2/ |
| H A D | timer.c | 45 writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST, in timer_init()
|
| /dports/sysutils/u-boot-qemu-arm/u-boot-2021.07/arch/arm/mach-omap2/ |
| H A D | timer.c | 45 writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST, in timer_init()
|
| /dports/sysutils/u-boot-rpi-arm64/u-boot-2021.07/arch/arm/include/asm/arch-omap4/ |
| H A D | cpu.h | 59 #define TCLR_PRE (0x1 << 5) macro
|
| /dports/sysutils/u-boot-rpi-arm64/u-boot-2021.07/arch/arm/mach-omap2/ |
| H A D | timer.c | 45 writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST, in timer_init()
|
| /dports/sysutils/u-boot-riotboard/u-boot-2021.07/arch/arm/include/asm/arch-omap4/ |
| H A D | cpu.h | 59 #define TCLR_PRE (0x1 << 5) macro
|
| /dports/sysutils/u-boot-rpi2/u-boot-2021.07/arch/arm/include/asm/arch-omap4/ |
| H A D | cpu.h | 59 #define TCLR_PRE (0x1 << 5) macro
|
| /dports/sysutils/u-boot-rpi2/u-boot-2021.07/arch/arm/mach-omap2/ |
| H A D | timer.c | 45 writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST, in timer_init()
|
| /dports/sysutils/u-boot-riotboard/u-boot-2021.07/arch/arm/mach-omap2/ |
| H A D | timer.c | 45 writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST, in timer_init()
|
| /dports/sysutils/u-boot-rock-pi-4/u-boot-2021.07/arch/arm/mach-omap2/ |
| H A D | timer.c | 45 writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST, in timer_init()
|
| /dports/sysutils/u-boot-rpi3/u-boot-2021.07/arch/arm/mach-omap2/ |
| H A D | timer.c | 45 writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST, in timer_init()
|
| /dports/sysutils/u-boot-rpi3/u-boot-2021.07/arch/arm/include/asm/arch-omap4/ |
| H A D | cpu.h | 59 #define TCLR_PRE (0x1 << 5) macro
|
| /dports/sysutils/u-boot-rock-pi-4/u-boot-2021.07/arch/arm/include/asm/arch-omap4/ |
| H A D | cpu.h | 59 #define TCLR_PRE (0x1 << 5) macro
|
| /dports/sysutils/u-boot-rpi3-32/u-boot-2021.07/arch/arm/mach-omap2/ |
| H A D | timer.c | 45 writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST, in timer_init()
|
| /dports/sysutils/u-boot-rock64/u-boot-2021.07/arch/arm/mach-omap2/ |
| H A D | timer.c | 45 writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST, in timer_init()
|
| /dports/sysutils/u-boot-rpi3-32/u-boot-2021.07/arch/arm/include/asm/arch-omap4/ |
| H A D | cpu.h | 59 #define TCLR_PRE (0x1 << 5) macro
|
| /dports/sysutils/u-boot-utilite/u-boot-2015.07/arch/arm/include/asm/arch-omap5/ |
| H A D | cpu.h | 66 #define TCLR_PRE (0x1 << 5) macro
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot/arch/arm/include/asm/arch-omap5/ |
| H A D | cpu.h | 66 #define TCLR_PRE (0x1 << 5) macro
|
| /dports/emulators/qemu/qemu-6.2.0/roms/u-boot/arch/arm/include/asm/arch-omap5/ |
| H A D | cpu.h | 66 #define TCLR_PRE (0x1 << 5) macro
|
| /dports/emulators/qemu5/qemu-5.2.0/roms/u-boot/arch/arm/include/asm/arch-omap5/ |
| H A D | cpu.h | 66 #define TCLR_PRE (0x1 << 5) macro
|