| /dports/sysutils/u-boot-chip/u-boot-2021.07/arch/arm/mach-omap2/ |
| H A D | timer.c | 45 writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST, in timer_init()
|
| /dports/emulators/qemu-guest-agent/qemu-5.0.1/roms/u-boot-sam460ex/arch/arm/cpu/arm_cortexa8/omap3/ |
| H A D | timer.c | 58 writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST, in timer_init()
|
| /dports/emulators/qemu-powernv/qemu-powernv-3.0.50/roms/u-boot-sam460ex/arch/arm/cpu/arm_cortexa8/omap3/ |
| H A D | timer.c | 58 writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST, in timer_init()
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/mach-omap2/ |
| H A D | timer.c | 45 writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST, in timer_init()
|
| /dports/sysutils/u-boot-cubox-hummingboard/u-boot-2021.07/arch/arm/include/asm/arch-omap4/ |
| H A D | cpu.h | 59 #define TCLR_PRE (0x1 << 5) macro
|
| /dports/sysutils/u-boot-firefly-rk3399/u-boot-2021.07/arch/arm/include/asm/arch-omap4/ |
| H A D | cpu.h | 59 #define TCLR_PRE (0x1 << 5) macro
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/mach-omap2/ |
| H A D | timer.c | 45 writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST, in timer_init()
|
| /dports/sysutils/u-boot-sinovoip-bpi-m3/u-boot-2021.07/arch/arm/mach-omap2/ |
| H A D | timer.c | 45 writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST, in timer_init()
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/include/asm/arch-omap4/ |
| H A D | cpu.h | 59 #define TCLR_PRE (0x1 << 5) macro
|
| /dports/sysutils/u-boot-a64-olinuxino/u-boot-2021.07/arch/arm/mach-omap2/ |
| H A D | timer.c | 45 writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST, in timer_init()
|
| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/mach-omap2/ |
| H A D | timer.c | 45 writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST, in timer_init()
|
| /dports/sysutils/u-boot-a13-olinuxino/u-boot-2021.07/arch/arm/include/asm/arch-omap4/ |
| H A D | cpu.h | 59 #define TCLR_PRE (0x1 << 5) macro
|
| /dports/sysutils/u-boot-sopine/u-boot-2021.07/arch/arm/include/asm/arch-omap4/ |
| H A D | cpu.h | 59 #define TCLR_PRE (0x1 << 5) macro
|
| /dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/mach-omap2/ |
| H A D | timer.c | 45 writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST, in timer_init()
|
| /dports/sysutils/u-boot-sopine-spi/u-boot-2021.07/arch/arm/include/asm/arch-omap4/ |
| H A D | cpu.h | 59 #define TCLR_PRE (0x1 << 5) macro
|
| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/include/asm/arch-omap4/ |
| H A D | cpu.h | 59 #define TCLR_PRE (0x1 << 5) macro
|
| /dports/sysutils/u-boot-qemu-arm64/u-boot-2021.07/arch/arm/mach-omap2/ |
| H A D | timer.c | 45 writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST, in timer_init()
|
| /dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/include/asm/arch-omap4/ |
| H A D | cpu.h | 59 #define TCLR_PRE (0x1 << 5) macro
|
| /dports/sysutils/u-boot-rpi-0-w/u-boot-2021.07/arch/arm/mach-omap2/ |
| H A D | timer.c | 45 writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST, in timer_init()
|
| /dports/emulators/qemu42/qemu-4.2.1/roms/u-boot-sam460ex/arch/arm/cpu/arm_cortexa8/omap3/ |
| H A D | timer.c | 58 writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST, in timer_init()
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/include/asm/arch-omap4/ |
| H A D | cpu.h | 59 #define TCLR_PRE (0x1 << 5) macro
|
| /dports/sysutils/u-boot-olimex-a20-som-evb/u-boot-2021.07/arch/arm/mach-omap2/ |
| H A D | timer.c | 45 writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST, in timer_init()
|
| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/include/asm/arch-omap4/ |
| H A D | cpu.h | 59 #define TCLR_PRE (0x1 << 5) macro
|
| /dports/sysutils/u-boot-nanopi-r4s/u-boot-2021.07/arch/arm/mach-omap2/ |
| H A D | timer.c | 45 writel((CONFIG_SYS_PTV << 2) | TCLR_PRE | TCLR_AR | TCLR_ST, in timer_init()
|
| /dports/sysutils/u-boot-nanopi-neo/u-boot-2021.07/arch/arm/include/asm/arch-omap4/ |
| H A D | cpu.h | 59 #define TCLR_PRE (0x1 << 5) macro
|